I overdramatized a little, the input stage of the buffer amplifier isn't actually that hard to isolate. Here's the animal with all its inputs/outputs annotated for convenience. I used Zeptobars LT1021-5 image because of higher resolution; looks similar enough.
REF - input from the reference divider. I agree with Noopy that R1~R4 are wired exactly as per the datasheet and that the trim pads can only adjust R1.
FB - feedback from the output pin.
OUT - this drives the output stage.
BIAS - goes to some NPN collector, presumably a constant sink.
RE1/RE2 - mirror emitter degeneration, goes to a pair of resistors with external trim.

The topology is similar to LM101. What's on the right must be NPNs because it wouldn't make sense to connect the inputs to PNP collectors. They work as emitter followers, collectors powered from FB at the very bottom. The lower transistor has some tiny spot connected to REF on its base, probably a clamping diode. Notably, their emitter areas aren't equal.
Next up, split collector PNPs. One collector of each is pulled down by BIAS, another goes to an NPN current mirror. The bases are also connected to BIAS, but one is level-shifted down by a series resistor on the BIAS connection.
I don't understand the purpose of those asymmetries, but I can imagine that they introduce some minor offset voltage and/or a controlled amount of thermal drift.
Trimming the externally accessible resistors RE1/RE2 will imbalance the mirror, forcing a few mV of input offset voltage to develop and change the proportion of currents going through each PNP to make the mirror happy again.
This isn't going to turn a 5V reference into 7V or 10V. These versions must use different metal layers, or more.