### Author Topic: DIY high resolution multi-slope converter  (Read 133716 times)

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#### NNNI

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##### Re: DIY high resolution multi-slope converter
« Reply #550 on: June 11, 2023, 12:34:05 pm »
The thing that leaves me most confused about MS-IV is its apparent complexity, but at the same time upon analyzing the schematics it looks like a regular multislope with a couple of extras. The first one is the DAM switch, described in detail in US Patent 6876241. From what I can see at least, it's basically just a level shifter and a CMOS output stage, somewhat like a logic inverter. I assume they had to come up with this because analog switches were not fast enough for what they were planning. The second thing is that they read the integrator waveforms using a coarse ADC, and according to AoE 3 this is so they can keep the integrator bounded. A window comparator would have worked for that as well, but there must have been a good reason to do it using an ADC. I hope to figure most of this stuff out once I get a closer look at the ADC waveforms. I did some calculations about reading speed in this log: https://hackaday.io/project/190528-multislope-adc/log/219031-integrators-dam-switches-and-speed

Regarding multiple rundown slopes - do you think that might be one of the main reasons for low INL and noise? I assume that the ultimate limiting factor in a 34401A-style multislope is the residue ADC itself.

#### Kleinstein

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##### Re: DIY high resolution multi-slope converter
« Reply #551 on: June 11, 2023, 01:53:38 pm »
The rundown part does not give good linearity. It is more like a way to get high resolution / low noise.
The MS3 ADC has one major weak point to start with: the limited resolution of the residual charge ADC. The resolution in (counts) is given by the auxiliary ADC resolution times the modulation frequency minus a little overhead.  Be sides the nominal resolution the ADC in the µC also has quite some noise (a few LSB). To get at least a little more resolution the modulation is chosen rather fast. By itself a good choice but it comes with compromises.

A second weak point comes from the relatively slow settling integrator, that needs quite some minimum length of the pulses and with the fast modulation this looses quite a bit of the input range. So quite a bit of the time is lost to the fixed ref. setting part. To still get a 12 V input full scale range this needed the effective divider with 100 K and 42 K to ground in the input path. The ADC would actually work better if the input would use 30 K and a 3 V input range instead - possibly an earlier design stage left over from the 3457. The divider at the input / only part of the range actually used amplifies quite a lot of the other noise sources in the ADC.

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#### NNNI

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##### Re: DIY high resolution multi-slope converter
« Reply #552 on: June 12, 2023, 10:27:59 am »
Could you elaborate a little more about integrator settling time? I assume this would matter more during rundown or residue reading than during runup.

#### Kleinstein

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##### Re: DIY high resolution multi-slope converter
« Reply #553 on: June 12, 2023, 10:42:11 am »
After switching the reference there is a small voltage pulse on the integrator input and it takes some time for settling after that. For the simple 1 OP-amp integrator this is a step in the voltage so a more permanent voltage. With the 2 OP-amp integrator one has a pulse only. The settling time depends on the speed of the amplifiers and other circuit details (e.g. RC at the input, divider between the stages).
The rundown part has only a limited number of switching events, so the settling part can cause some error, but only a rather small one. Especially for the initial part one can make sure the pulses are not too short. The run-up part may be more relevant because of many switching events (e.g. some 1000), but the timing could be more predictable so that some constant effect can be seen as part of the offset

For the residual charge reading it helps to have a fixed time from the last switching event (for the measurement on the fly) or enough waiting time (for the residual charge after rundown).

#### NNNI

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##### Re: DIY high resolution multi-slope converter
« Reply #554 on: June 12, 2023, 11:25:31 am »
I see, and would adding a small value (100s of pF) capacitor to the summing junction help mitigate these effects? almost all multislope implementations I've seen have such a capacitor.

#### Kleinstein

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##### Re: DIY high resolution multi-slope converter
« Reply #555 on: June 12, 2023, 11:32:56 am »
Capacitance from the summing junction to ground may help with the very fast part, but in most cases for the main visible settling it does not help or even makes things ring more.
To effect the settling it is more an RC series element that can make a difference in dampening ringing.

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#### Alex Nikitin

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##### Re: DIY high resolution multi-slope converter
« Reply #556 on: June 13, 2023, 02:39:48 pm »
In my ADC I use the LV4053 with 5 V supply and a measured on resistance of some 20 Ohm. With 10 K resistors (and 10 V at the input) the INL contribution is quite significant already. So even the TMUX1134 may want a little more than 10 K - maybe 20 K as a resonable lower limit. Besides the R_on a higher supply voltage also help in reducing the voltage dependence.
The 50 K resistors already allow quite low a noise and noise wise there is little need to go much lower with a 10 V or similar input range.

Perhaps ADG6412 worth a try? 0.5 Ohm and exceptionally linear across the voltage range.

Cheers

Alex

#### Kleinstein

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##### Re: DIY high resolution multi-slope converter
« Reply #557 on: June 13, 2023, 03:20:56 pm »
For my ADC configuration with switching at the integrator input there is no need for a 20 V switch. It is more about a good balance of on resistance, capacitance and charge injection.
Possible alternatives would be more other low voltage switches like max4619 or the aready mentioned TMUX1133.

The LV4053 with some 20 Ohm (5 V) is not such a bad choice and OK with 50 K input resistors. The nonlinear contribution is small (e.g. 0.1 ppm range) and if needed one could numerical correct for some of this or as in my current front end do an internal averaging over positive and negative reading, so that the U² part does not matter that much.
Even just 2 x LV4053 in parallel may work if less than 50 K for the input are wanted.

With smaller resistors also the self heating part gets more tricky and this part can be temperature dependent  and thus more difficult to compensate for.

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#### dietert1

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##### Re: DIY high resolution multi-slope converter
« Reply #558 on: June 13, 2023, 04:11:25 pm »
Others use active current sources. The Advantest R6581T schematic shows active current sources for the unknown and for the principal rundown current. In the Prema 6048 the unknown is a current source, too. In some sense the rundown current source is active, too, as it includes a sense line to correct for the switch behaviour. Looks like active current sources are appropriate for a 8.5 meter.
To convert the run-down current source of a Prema 6048 into an active one for near ground current routing, one can use a dual opamp, a small mosfet and 2x 1K and 1x 10K resistors of an LT5400. The divider raises the reference from 7 to 7.64 V and then senses the current at 0.64 V. That is the headroom for the mosfet, the switch and maybe some kind of filter. One might use something similar for the unknown. A little more complicated if it needs to be bipolar.

Regards, Dieter

#### Kleinstein

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##### Re: DIY high resolution multi-slope converter
« Reply #559 on: June 13, 2023, 05:04:12 pm »
Active current sources offer some advantage, but also make the circuit more complicated.
As a downside one needs more complicated reference voltage levels and tends to loose a bit headroom. On the upside the switches can be low capacitance as the resistance does not matter that much. In the 6581 circuit one sees quite some effort (JFET+2 OP-amps) needed to make the current sources fast settling.
For the input part a current source is tricky - the prema solution with the extra supply is nice, but prone to pic up hum from the supply. This may need the PLL that is otherwise not that attractive.
A bipolar active current source for the input is more than just a little more tricky. Limiting the input to 1 polarity is a bit limiting.

One could combine current sources for the reference with a very low resistance (e.g. 1 Ohm range) for the signal input. Matching in the resistance / switches is to get TC compensation for the combined switch + resistor combinations. With a very kow on resistance the compensation is no longer needed. The input switch is only switched on/off once per conversion and capacitance thus less relevant.

For higher input and reference curent (to get even lower noise) active current source are definitely an option.
My ADC circuit was initial designed to get a rather simple multi-slope ADC. The higher performance target was later with a few minor changes (change HC4053 to LV4053, added sync flip-flops and adding filtering for the reference).

#### NNNI

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##### Re: DIY high resolution multi-slope converter
« Reply #560 on: June 17, 2023, 12:09:37 pm »
I was doing some LTSpice simulations of a composite integrator, and out of curiosity I tried different dividers on the output of the "slow" input stage op-amp. Looks like the divider ratio does determine how fast the integrator settles after the input current changes, just like Kleinstein said.
« Last Edit: June 17, 2023, 12:11:48 pm by NNNI »

#### wanghar

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##### Re: DIY high resolution multi-slope converter
« Reply #561 on: May 17, 2024, 08:09:14 am »
Kleinstein,

About STM32based ADC version, the C file you published on #reply 478 has been  imported into a MDK project and complied OK.  Could you please  make a brief comment about how to get approperiate slow_ratio and adc_ratio which are used to calculate the final result of voltage ?

Thanks!
Harvey

#### Kleinstein

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##### Re: DIY high resolution multi-slope converter
« Reply #562 on: May 17, 2024, 08:42:25 am »
It is some time since I did the adjustment / test. I really should have documeted it better - need to dig into this anyway and to check the constants with my hardware.

The STM32 version uses a simplified version for the adjustment. So no extra control loops, but only different conversion modes that intentionally have a rather different (higher) weight to the small contributions. One runs these tests with a zero signal (e.g. shorted input or no current) and the commands  3t and 4t and using the raw data output. The 2 readings should than get the same result.

edit:
The raw data look about like this for the 2 case. The collumns are the counts for (pos-neg) ref , (pos+neg) ref , difference in ADC readings
Code: [Select]
   160558  120494   14   163008   11842    0   160558  120494    2   163008   11842   15   160558  120494    0   163008   11842   14   160558  120496  -75   163008   11842   29   160558  120494   33   163008   11844  -81   160558  120494   22   163008   11842   22     162116   50264  995   162116   50284  -988   162115   50307  979   162116   50284  -982   162116   50264 1011   162116   50284  -999   162116   50264 1008   162116   50284 -1035   162116   50264 1005   162116   50284 -1049   162115   50307 1009   162116   50282  -944The ref. ratio is than from the first part (0z 3t) as  (col1 - col4) / (col2-col5) for the small ref. This is ignoring the residual ADC that averages out over the long run. If really needed one could inlcude it.
The residual ADC scaling is than similar from the other data. if needed on could include the cases where the coarse counts change, but one could as well just skip these lines.
« Last Edit: May 17, 2024, 09:52:19 am by Kleinstein »

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#### wanghar

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##### Re: DIY high resolution multi-slope converter
« Reply #563 on: May 17, 2024, 02:37:06 pm »
Thank you Kleinstein for quick update!
According to your above guide, the corresponding output data @(0z 3t) and @(0z 4t) are as below:

Code: [Select]
160554  120448  10     162985  11747  -26160554  120450  163   162985  11751   133160554  120448  89     162985  11753    79160554  120448  -2      162985  11751  -134 162100  50176  1335  162100  50192  -1264162100  50176  1310  162100  50198  -1211162100  50178  1284  162100  50198  -1309162100  50180  1271  162100  50196  -1201
I figured out the slow_ratio is about 44.7  based on the first group of data（ is this correct？).
How to work out the residual ADC scaling from the  bottom group?

#### Kleinstein

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##### Re: DIY high resolution multi-slope converter
« Reply #564 on: May 17, 2024, 03:07:43 pm »
For the slow slope ratio I get a similar number with more points averaged. After all the data come in fast (25 lines per second).
For the auxiliary ADC I somehow have an odd result:  normally the 2 readings should give the same result. This would mean a result similar to before from (col3-col6) / (col2-col35)  (using only those point where col. 1 and 4 are the same (which is the more normal case). This gives a value of around 100.
On the other hand the code adds an addition 10 cycles or 20 steps for the slow slope. So the ADC difference of around +-1000 in col. 3 and 6 should correspont to 20 counts. This way one gets a factor of about 50.  As  a 3rd way to get the aux ADC scale one can also look at a stable reading and many points. The aux ADC part should scatter by a little more than 1 step or 2 counts.  In this way I also got a value of around 50  for my hardware.

I remember that I had this odd point before, but can't remember why the way with (col3-col6) / (col2-col35)  gives the wrong (2x to large) result.

Edit:
I finally found why the (col3-col6) / (col2-col35) way does not work: the result does not include the delay part. This normally is not a problem as it only is an offset. Only for the auxiliary ADC slope case one has to include is as as an extra part as (col3-col6) / (col2-col35 - 20).
« Last Edit: May 18, 2024, 03:14:00 pm by Kleinstein »

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#### wanghar

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##### Re: DIY high resolution multi-slope converter
« Reply #565 on: May 18, 2024, 09:51:15 am »

got it! if different serial terminal used the col no. may vary. For my case I use  (col3-col6) / (col2-col5 - 20) and get the aux ADC scale around 64.

#### Kleinstein

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##### Re: DIY high resolution multi-slope converter
« Reply #566 on: May 18, 2024, 03:12:42 pm »
Different terminals should not make a difference. It was a typo from may side. (col3-col6) / (col2-col5 - 20)  is the right way with the additional delay of 10.
If there is more gain to the auxiliary ADC (e.g. a smaller integration capacitor) one may have to reduce the extra delay, no to leave the linear range or hit the ADC limits.

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Smf