Author Topic: DIY low frequency noise meter and some measurement result of voltage references  (Read 68381 times)

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Online Kleinstein

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After reading your post...I decided to run some SPICE simulations of frequency response and changes in R1 and R2.   Results are shown below.   Based on this I will likely raise R2 to 100K and leave the jumper J3 out for most uses.
....
If you increase R2 you will also increase current noise of the LT1037.
So you will definitely need a different OP-Amp with lower input bias current.
See Design Notes DN3, DN6 and DN140 of Linear Technology.

A higher R2 will only increase the noise below the input RC passband. The noise of R2 is effectively shorted with the signal source in the pass band. The current noise generated by R2 matters and this is higher with a smaller resistor. An apparent increase in the effect of OPs current noise is due to higher gain at low frequencies. So one would need a different (e.g. addition stage) filter for the low pass to get an overall comparable response. In the pass band region the input capacitor is what matters when it comes to the current noise of the OP.

Still 100 K for R2 might be a little on the high side, as initial settling will take a considerable time.

For the OP it is not directly the input bias that matters, but the input current noise in asymmetrical mode (current for one input only).  Some data-sheets might neglect the correlated part of the input noise, like it applies to an application with a high resistance at both inputs.  So current  noise spec's have to be taken with a grain of salt, especially with AZ OPs.

With simple OPs current noise correlates with input bias, but OPs like the LT1037 or OP07 have input current compensation and with these OPs input bias can be low despite of current noise. So a low bias does not per se guarantees low current noise. It is only a high bias that can guarantee a high current noise.


 
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Offline Insatman

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After reading your post...I decided to run some SPICE simulations of frequency response and changes in R1 and R2.   Results are shown below.   Based on this I will likely raise R2 to 100K and leave the jumper J3 out for most uses.
....
If you increase R2 you will also increase current noise of the LT1037.
So you will definitely need a different OP-Amp with lower input bias current.
See Design Notes DN3, DN6 and DN140 of Linear Technology.

A higher R2 will only increase the noise below the input RC passband. The noise of R2 is effectively shorted with the signal source in the pass band. The current noise generated by R2 matters and this is higher with a smaller resistor. An apparent increase in the effect of OPs current noise is due to higher gain at low frequencies. So one would need a different (e.g. addition stage) filter for the low pass to get an overall comparable response. In the pass band region the input capacitor is what matters when it comes to the current noise of the OP.

Still 100 K for R2 might be a little on the high side, as initial settling will take a considerable time.

For the OP it is not directly the input bias that matters, but the input current noise in asymmetrical mode (current for one input only).  Some data-sheets might neglect the correlated part of the input noise, like it applies to an application with a high resistance at both inputs.  So current  noise spec's have to be taken with a grain of salt, especially with AZ OPs.

With simple OPs current noise correlates with input bias, but OPs like the LT1037 or OP07 have input current compensation and with these OPs input bias can be low despite of current noise. So a low bias does not per se guarantees low current noise. It is only a high bias that can guarantee a high current noise.

After reading this exchange I decided to hedge my bets and add an "Input R Selection" header to the circuit.  This gives me three options for input impedance with an easy way to change between them.
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Offline Insatman

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Note:  I managed to find non-polarized electrolytic capacitors for the 1000uF and 2200uF coupling capacitors (Rubicon I think).

Do not forget to select the input capacitor for low leakage current (with maximum used input voltage active).
I fear that bipolar capacitors will have more leakage current than unipolar standard 85 deg C types.
(But you will shurely measure it and report here).

With best regards

Andreas

I will hedge my bets here as well and measure both bi-polar and polar types.  It will be interesting.   What sort of leakage current is acceptable or normal for this application?
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Offline Insatman

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Note:  I managed to find non-polarized electrolytic capacitors for the 1000uF and 2200uF coupling capacitors (Rubicon I think).

Do not forget to select the input capacitor for low leakage current (with maximum used input voltage active).
I fear that bipolar capacitors will have more leakage current than unipolar standard 85 deg C types.
(But you will shurely measure it and report here).

With best regards

Andreas

I will hedge my bets here as well and measure both bi-polar and polar types.  It will be interesting.   What sort of leakage current is acceptable or normal for this application?

I got to thinking....always dangerous for me...what if I could eliminate the electrolytic caps altogether?  Since I already had the SPICE model running and a good quality 100uF film cap in stock, I ran the simulations.   Not bad response curve.  So just in case, I modified the PCB layout for this configuration as well. 
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Online Kleinstein

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The smaller the input cap, the more important the current noise if the OP gets. It is mainly the size of the cap and not R2 that determines the sensitivity to OPs current noise. So there is the option to use a film cap, if a lower current noise OP is used. Due to the current noise, the LT1037 would not perform well with a 100 µF cap below about 1 Hz. The 1/f part of the current noise together with the impedance of the capacitor going up will give a 1/f² noise contribution that limits the use to very low frequencies or needs the very large cap.

Possible candidates would be  OPA140 (as a JFET OP with surprisingly low LF noise) and an low noise AZ OP like ADA4522.
However these OPs have higher voltage noise. So performance will be a bit different - better at some points (frequencies) but worse at others.
These 2 alternatives where discussed earlier in the thread.

All 3 options should be still lower noise than the usual refs over much of the range.  All three have different advantages: The LT1037 (or similar BJT-OP) based one is best in the > 1 Hz range. The OPA140 (maybe 2 in parallel) performs well in the middle and can get away with less protection and the smallest coupling cap. The AZ OP is best at very low frequencies.
 
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Online Andreas

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I will hedge my bets here as well and measure both bi-polar and polar types.  It will be interesting.   What sort of leakage current is acceptable or normal for this application?

Hello,

Linear Technology specifies in AN124 a 5 nA max leakage (appendix B) for a 1K2 input pull down resistor.
Design goal is to measure the 775 nVpp of a LTC6655

I specify < 20 nA for the whole input capacitors and a 1K input pull down resistor.
Since I do not want to spend several hundred dollars for a wet tantalum.
See cirquit simulation here:
https://www.eevblog.com/forum/metrology/diy-low-frenquency-noise-meter/msg1148584/#msg1148584

Sometimes I get some low frequency artefacts up to 0.2uV (usually noise floor below 120nV) when the capacitor is under bias.
But for a LTZ1000 measurement this noise floor is acceptable.

So the acceptable leakage current is dependant on input resistor and the level where you want to measure.
(you should have at least factor 3-5 lower noise floor as that what you want to measure).

This low leakage current is usually reached after around 2 days of charging.
So I use a 9V block to keep the input capacitor under bias since when not measuring,
since I do not want to wait 2 days for each measurement.

With best regards

Andreas
 
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Offline chuckb

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Here are some of my experiences over the last two months.

I have used the Nichicon UKL series of Low Leakage coupling capacitors with good results. I use the 2,200 ufd 35V model and they have less than 15na of leakage at 7V. With a new cap I charge it at it's rated voltage for a few days to make sure the dielectric is fully formed. I have not noticed any noise artifacts with them. At 32V the leakage is 65nA.

From a cold start my system is usable within an hour. A precharge battery would certainly help.

After my limited analysis and testing, I decided to use the ADA4522 Chopper for the 10,000x preamplifier. I parallel 4 amplifiers and I have a noise floor under 70 nVpp (0.1 to 10Hz). I tried several other op-amps before settling on the ADA4522. I actually need a little more gain to stay out of the noise floor of the Digital Scope.

The LT1028A Ultra low voltage noise bipolar, had way too much current noise for the 2,200ufd input capacitor, 600nVpp.
The OP627 Super JFET had way too much voltage noise, 500nVpp.
The OPA189 chopper had twice the voltage noise called out in the data sheet. Must have been current noise causing the 200nVpp.

Hope this helps!
 
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Offline Insatman

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Here are some of my experiences over the last two months.

I have used the Nichicon UKL series of Low Leakage coupling capacitors with good results. I use the 2,200 ufd 35V model and they have less than 15na of leakage at 7V. With a new cap I charge it at it's rated voltage for a few days to make sure the dielectric is fully formed. I have not noticed any noise artifacts with them. At 32V the leakage is 65nA.

From a cold start my system is usable within an hour. A precharge battery would certainly help.

After my limited analysis and testing, I decided to use the ADA4522 Chopper for the 10,000x preamplifier. I parallel 4 amplifiers and I have a noise floor under 70 nVpp (0.1 to 10Hz). I tried several other op-amps before settling on the ADA4522. I actually need a little more gain to stay out of the noise floor of the Digital Scope.

The LT1028A Ultra low voltage noise bipolar, had way too much current noise for the 2,200ufd input capacitor, 600nVpp.
The OP627 Super JFET had way too much voltage noise, 500nVpp.
The OPA189 chopper had twice the voltage noise called out in the data sheet. Must have been current noise causing the 200nVpp.

Hope this helps!

Can you share the details of how your parallel the four amplifiers?  Separate feedback loops and some series R perhaps? 
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Offline David Hess

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What about a differential input stage using something like an LSK389 dual JFET driving an LT1001 with a chopper stabilized amplifier providing offset and low frequency correction?  Jim Williams showed this type of amplifier in AN124 and some earlier application notes.
 

Offline chuckb

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Overall my circuit is similar to Pipelie's design. I used his output filter values with Wima plastic leaded caps and R-R op-amps. After the input cap (two 2,200 ufd caps in parallel) and clamping diodes the signal splits into the input of four ADA4522 op-amps. They have a 200k MF (SMD 0805) feedback resistor and a 20 ohm MF to ground. These are all surface mount parts. I also use a leaded COG 0.1ufd cap across each 200k feedback resistor to minimize high frequency noise. The output of each amplifier passes through a 10k resistor to sum the signals together before feeding the output filter stage.

I have not asked Analog Devices yet if the two amplifiers in the ADA4522-2 package are completely independent or if they share a common clock. If they share a clock the input and output noise spikes will be correlated and you will not achieve the theoretical noise reduction from paralleling.  Some dual and quad op-amps share a common bias circuit so a voltage overload on one op amp will affect the others in the same package.

I had a 12v battery handy to power the circuit so I use two diodes to develop a -1.2v bus and a +10.8v bus.
 
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Online Andreas

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I actually need a little more gain to stay out of the noise floor of the Digital Scope.
Hello,

Which scope do you use?

Usually you have at least a 20 MHz bandwidth limiter on a scope.
Better scopes have either some kind of oversampling (e.g. hi-res aquisition mode)
or a additional digital filter to further reduce scope noise.
For a 10 Hz bandwidth and enough horizontal sample points you can use
a 1 kHz bandwidth filter on the scope to reduce scope noise floor without spoiling the measurement.

with best regards

Andreas
 

Offline Insatman

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Overall my circuit is similar to Pipelie's design. I used his output filter values with Wima plastic leaded caps and R-R op-amps. After the input cap (two 2,200 ufd caps in parallel) and clamping diodes the signal splits into the input of four ADA4522 op-amps. They have a 200k MF (SMD 0805) feedback resistor and a 20 ohm MF to ground. These are all surface mount parts. I also use a leaded COG 0.1ufd cap across each 200k feedback resistor to minimize high frequency noise. The output of each amplifier passes through a 10k resistor to sum the signals together before feeding the output filter stage.

I have not asked Analog Devices yet if the two amplifiers in the ADA4522-2 package are completely independent or if they share a common clock. If they share a clock the input and output noise spikes will be correlated and you will not achieve the theoretical noise reduction from paralleling.  Some dual and quad op-amps share a common bias circuit so a voltage overload on one op amp will affect the others in the same package.

I had a 12v battery handy to power the circuit so I use two diodes to develop a -1.2v bus and a +10.8v bus.

I submitted a question to AD via their website asking about a common clock on the ADA4522-2 and ADA4522-4 parts.   I will post a reply if I get one.
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Offline Pipelie

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Overall my circuit is similar to Pipelie's design. I used his output filter values with Wima plastic leaded caps and R-R op-amps. After the input cap (two 2,200 ufd caps in parallel) and clamping diodes the signal splits into the input of four ADA4522 op-amps. They have a 200k MF (SMD 0805) feedback resistor and a 20 ohm MF to ground. These are all surface mount parts. I also use a leaded COG 0.1ufd cap across each 200k feedback resistor to minimize high frequency noise. The output of each amplifier passes through a 10k resistor to sum the signals together before feeding the output filter stage.

I have not asked Analog Devices yet if the two amplifiers in the ADA4522-2 package are completely independent or if they share a common clock. If they share a clock the input and output noise spikes will be correlated and you will not achieve the theoretical noise reduction from paralleling.  Some dual and quad op-amps share a common bias circuit so a voltage overload on one op amp will affect the others in the same package.

I had a 12v battery handy to power the circuit so I use two diodes to develop a -1.2v bus and a +10.8v bus.

archwang from BBS.38HOT.NET successfully to use ada4522-4 in paralleling, and 60nVpp noise floor achieved when input short.
and  100nVpp when the input is open.
here is the photo



test setup:


test results:
1.input short



2.input open:


3.testing a 9V battery


here is the link of  archwang's article.
http://bbs.38hot.net/forum.php?mod=viewthread&tid=164706

Have fun!
 
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Offline chuckb

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I actually need a little more gain to stay out of the noise floor of the Digital Scope.
Hello,

Which scope do you use?

Usually you have at least a 20 MHz bandwidth limiter on a scope.
Better scopes have either some kind of oversampling (e.g. hi-res aquisition mode)
or a additional digital filter to further reduce scope noise.
For a 10 Hz bandwidth and enough horizontal sample points you can use
a 1 kHz bandwidth filter on the scope to reduce scope noise floor without spoiling the measurement.

with best regards

Andreas

I'm using an old TDS3034, with floppy drives! It has 360-380uVpp noise with the input shorted and BWL at 20MHz. With the full 100 Mhz BW it has 700-800uVpp. That's all the noise filtering this scope has.

I'm working on connecting it to a Dynamic Signal Analyzer (HP3582A) to plot the actual preamp stage gain and the output filter performance. I have to attenuate the tracking generator output before it gets to the preamp. I have lots of 60Hz noise right now. The specs tell me it weights 54 lbs, it feels a lot heavier than that. It's on the corner of the bench and it's staying there.
Take care
 
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Offline Insatman

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Re: 10/100K:1 Amplifier

After absorbing a lot of advice and modifying my original layout many times, I decided to start over.   The schematic was out of sync with the PCB and I really need more space to do what I wanted.  So here is the next and hopefully close to last iteration.   I will be traveling for the next few days, so forgive me if I don't respond until the weekend.  On the schematic, the yellow capacitors have alternate footprints allowing for use of different components.  These are for the largest values only.   The first op-amp can be one of two types.  All circuit values assume use of an ADA4522-4 Quad op-amp for the first amplifier.   The LT1037 shown highlighted in blue, can be used instead.  In that case, R8 is changed to 2.5K and all components associated with the other three ADA4522 channels are not used (HIGHLIGHTED in magenta).  The circuit allows for 10K:1 or 100K:1 via a jumper on the second stage amplifier.   Also variable is the input resistance in three steps, 100K, 16.7K and 990 ohms.   The range of the pot and "boost adj" jumper should allow for calibration in all combinations of J3 and J4.   

On a side note I am also measuring leakage on several types of electrolytic capacitors.  My setup needs improvement....measuring nA isn't easy.   I plan on putting the measurement into a steel enclosure and trying again once the box arrives late next week (hopefully).   I, can measure down to 10's of nA currently, but the noise prevents anything less than that. 

Comments and suggestions are solicited.

Note the schematic has been replaced with the correct version.  An incorrect version was previously posted.

Note this post has been superseded by a later version posted 14 Apr.

« Last Edit: April 14, 2018, 03:23:04 am by Insatman »
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Online MiDi

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The caps are Panasonic Series: M Typ: A 85°C 2000h.
Had two 3,3mF 25V for first test, one went down to ~2nA, the other to ~3,5nA @~11,5V.
They were formed @11,5V 48h + ~1week disconnected @20°C and <30%rH.
Perhaps my cheap SMPS with "high ripple" had an effect on that, for rechargeable batteries the positive effect with reflex/pulse charging is well known...
Tested with ADA4530-1 @12V as buffer for 12h with recording of voltage drop.
So the 2nA are before soldering, did not test after.

Do not know how others did, but I used an ADA4530-1 as buffer and recorded voltage drop over decent time.
fA op amp is a bit overkill for this purpose, but did this for measuring leakage of film caps in first place.
 

Offline chuckb

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I determine leakage current by measuring the voltage drop across a 10k charge resistor. Initially the cap is connected directly to the power supply but after a few hours I add a resistor in line. With a cap connected directly to the PS through an ammeter I realized I was really measuring to power supply voltage ripple. The 10k will convert 10na of leakage into a 100uV DC signal. This worked fine for me even using a very noisy 10 amp switching power supply.

In bad cases you could run two of the RC filters in series. One to clean up the PS and the second to actually test the capacitor.

Side note-
I make it a point to not connect a discharged cap directly across a PS at full voltage. Also I don't short out the charged caps, I use a resistor to limit the peak current, the 10k does double duty. I had a custom low ESR Wet Tantalum capacitor developed for one project many years ago. As a test, I measured over 500 amps of charging current into the capacitor. Yes, the sparks are fun but I just worry about developing secondary problems at the internal weld between the lead to foil (for Al Electrolytics).

« Last Edit: April 09, 2018, 01:33:49 pm by chuckb »
 

Online Kleinstein

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For the low pass filtering stages, there are quite a few caps and the values do not all make sense. There are plenty of low pass stages, so there should be no need to have the large caps at the 4 parallel ADA4522 stages. This would also alow to use the first stage only with higher bandwidth if needed.
R20 does not make that much sense with the up to 4 parallel 10 K resistors at the OPs. So likely C24 is too large.

The wiring of the lower two AD4522 is wrong.

There are still the sets of 3 caps for decoupling - this is only needed for super fast parts like 74AC... or OPs in GHz GBW range, not for a slow LT1012. The LT1012 is happy with just a 10 µF electrolytic cap somewhere on the board.  For the caps layout is often more important than a pure number. An extra 33 nF at more than a 1 cm away from the chip does not help anymore an is more like a possible problem.

The layout is kind of a mess. With the very high overall amplification a simple ground plane may not be such a good idea, especially with the decoupling caps spread all over the board.

Using a +-9 V supply may not be the best option, as there is no real need for a high voltage. The ADA4522-4 is perfectly fine with just 4-6 V or so, but it needs quite some current.
 
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Offline Insatman

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For the low pass filtering stages, there are quite a few caps and the values do not all make sense. There are plenty of low pass stages, so there should be no need to have the large caps at the 4 parallel ADA4522 stages. This would also alow to use the first stage only with higher bandwidth if needed.
R20 does not make that much sense with the up to 4 parallel 10 K resistors at the OPs. So likely C24 is too large.

The wiring of the lower two AD4522 is wrong.

There are still the sets of 3 caps for decoupling - this is only needed for super fast parts like 74AC... or OPs in GHz GBW range, not for a slow LT1012. The LT1012 is happy with just a 10 µF electrolytic cap somewhere on the board.  For the caps layout is often more important than a pure number. An extra 33 nF at more than a 1 cm away from the chip does not help anymore an is more like a possible problem.

The layout is kind of a mess. With the very high overall amplification a simple ground plane may not be such a good idea, especially with the decoupling caps spread all over the board.

Using a +-9 V supply may not be the best option, as there is no real need for a high voltage. The ADA4522-4 is perfectly fine with just 4-6 V or so, but it needs quite some current.

This circuit is based on a previous successful design previously posted here on EEVBlog.  I'm not sure if Andreas was the first to post this design or not, but i got the basic circuit from his posts.  I have modified this circuit in a variety of ways, among them using a quad op-amp, duplicating the values used in the single op-amp design and summing the outputs.   In the original circuit 3.6K in series was used between op-amp stages.  I wanted to use 10K summing resistors basically because I have a large stock of this common value, this necessitated R20 to make up the difference between the parallel combination of the 4x 10K resistors and the 3.6K net value I wanted to preserve.   I have also added some small value capacitors in the hope to minimize noise.  These can of course simply not be used if experimentation shows them unnecessary or detrimental.   I also realize that component values may not be optimum, but I want to design a PCB that would allow me to return to a design that is known to work, but would also allow for some experimentation, both in component values and additional components where I thought they might be beneficial.

The schematic error was actually caught during the PCB routing process, but unfortunately, I posted the uncorrected schematic in error.  The corrected version is attached and has also been replaced in the original post.

I understand that the value of the bypass caps seems very large for these op-amps, but that was what was used in the original circuit (470uF).  So I wanted to preserve the option in the PCB, thus using large enough pads to accommodate them.   A test with smaller values would be interesting.   I also see you point about using both 100nF and 33nF bypass caps...again I can eliminate one set, giving the option to avoid surface mount components if desired. 

The layout isn't perfect to be sure, but should work with some further modification.  I agree on your observation about the ground plane and my thinking while traveling this week on how to change it to further isolate ground currents from the sensitive input circuitry.  I will post another version of the layout soon.   

Your point on 5V supply voltage is well taken.   The original circuit used 9V, but going with 4x 1.5V AA or AAA cells in series per side might be a better choice.  Again I will experiment with this. 
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Offline Insatman

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Overall my circuit is similar to Pipelie's design. I used his output filter values with Wima plastic leaded caps and R-R op-amps. After the input cap (two 2,200 ufd caps in parallel) and clamping diodes the signal splits into the input of four ADA4522 op-amps. They have a 200k MF (SMD 0805) feedback resistor and a 20 ohm MF to ground. These are all surface mount parts. I also use a leaded COG 0.1ufd cap across each 200k feedback resistor to minimize high frequency noise. The output of each amplifier passes through a 10k resistor to sum the signals together before feeding the output filter stage.

I have not asked Analog Devices yet if the two amplifiers in the ADA4522-2 package are completely independent or if they share a common clock. If they share a clock the input and output noise spikes will be correlated and you will not achieve the theoretical noise reduction from paralleling.  Some dual and quad op-amps share a common bias circuit so a voltage overload on one op amp will affect the others in the same package.

I had a 12v battery handy to power the circuit so I use two diodes to develop a -1.2v bus and a +10.8v bus.

I submitted a question to AD via their website asking about a common clock on the ADA4522-2 and ADA4522-4 parts.   I will post a reply if I get one.

I got an answer from Analog Devices on this matter:

Hi Insatman (name replaced with my handle here),
It is a common clock but quite high up around 5MHz.
There's also another balancing chopper circuit running around 800kHz.
These are noted in Figure 62.

Thus, you'll probably need an 80kHz LPF. 

Chris

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Online Andreas

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I understand that the value of the bypass caps seems very large for these op-amps, but that was what was used in the original circuit (470uF).

Hello,

actually I am using 1000uF for the decoupling because I have several left from the leakage current selection process.
Together with the 100R decoupling resistors they give a fine low pass for the supply in the first stage.
The fact that a LT1037 which was previous in the output stage gives oscillations shows that decoupling is not uncritical.

with best regards

Andreas
 
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Offline Insatman

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This is the version of the 10/100K:1 amplifier I sent out for fabrication today.
I should have the boards in 5-10 days.

I wish to thank all those who gave me advise and/or criticism...it results in a better design and learning experience for us all.
 
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Offline Insatman

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Do not forget to select the input capacitor for low leakage current (with maximum used input voltage active).
I fear that bipolar capacitors will have more leakage current than unipolar standard 85 deg C types.
(But you will shurely measure it and report here).

With best regards

Andreas

I have done some tests on various Electrolytic capacitors.   11 were tested comprising of 8 individual types.   The data is presented in a table as well as three bar charts. 

Note that the time tested for various caps was not equal.  I tended to end the test when the current was well below 5nA and/or I established a trend in the data upward/downward.  Most tests were started with the caps pre-charged tp 10.0 volts for some hours beforehand.  One test was started at 9.7V which is what my 9V battery had pre-charged the capacitor too before the test.   Another test was started at 0.0V and run overnight.   

I built a steel enclosure and special cables to do these tests.  The enclosure was made by Hoffman and is heavy gauge steel.  All seams were sealed with conductive glue copper tape as well.  Contact surfaces between the lid and box were also copper taped.   The cables were made from RG58 coax with the shields terminated just short of the banana connection points to the power supply or bench meter.  Only one connection between box/shield ground was made at the power supply to avoid any ground loops.   All cables were fitted with ferrite cores as well.  This resulted in an exceptionally quiet setup.   

Leakage current was measured across a metal film 1 Meg ohm resistor.  The meter used was an HP34401A with 1Gohm input impedance selected.  This allowed me to get 1mV per nA on the meter.  Noise floor was estimated to be typically below 100's of pA based on the observed fluctuations of the readings.   

One bar chart shows starting and ending currents by capacitor number (1-11).  Another chart shows the leakage current per uF of capacitance for an easier comparison of types.  the third chart shows the rate of change in the data to get an idea of the average trend when the test was stopped.   Note 2 capacitors had an upward trend in leakage current.  I would reject these two capacitors. 

Overall the Nichicon Gold Audio caps are favored by me at present.  One of the three had upward current trend, but the other two performed very well.   Second choice would be the Nichicon KL series.   The Bi-polar types had very low leakage currents if you soaked them long enough in the direction you intended to use them in.  I think they would also work.

One photo shows the test setup on my messy workbench.  The capacitor being measured at 540nA was fully discharged before the test began.  This test is to get and idea of how long conditioning takes from a cold start.   Note the various caps being pre-charged on the protoboard on top of the steel box used for testing.

I will be leaving on a vacation soon, so If I may be slow to respond to comments depending on when they are made. 
« Last Edit: April 28, 2018, 04:15:52 am by Insatman »
Retired Pulsed Power Engineer/Physicist...now I just dabble in electronics
 
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Offline Insatman

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Back in the middle of April I submitted a design for a 10/100K to one amplifier based on the design that Andreas had previously described.   I included a variety of modifications to that design to hopefully lower the noise level and also too provide some flexibility for experiments with various components.   After much testing I have some results.
I started testing using my Rigol 1054Z but found the noise floor to be excessive at about 1mV pk-pk.  Further work was done on my Tek 784D with pk-pk noise of <200uV.  These values were measured with 20M bandpass, 1M input impedance, DC coupling and open input.

All tests were done at 10000:1  the 100K:1 option was not tested at this time.

Two PCBs were made.  One, dubbed “Orig” is pretty close to the circuit that Andreas described with the addition of some ferrites and small bypass capacitors on the input and outputs.   This version uses the LT1037 for the 1st stage amplifier and an LT1012 for the second stage.   This unit was tested using the original 1K input load resistor that Andreas had and also with an alternative 20K input load resistor with 2K in series with the input.   The Orig circuit performed well with a noise floor of about 1.3mV (equating to 130nV) on average.  The 1K version was very slightly lower noise than the 2k/20K version.  Frequency response was surprising however.  Both the 1K version and 2/20K versions had -3dB points of ~0.1-4Hz.   Settling time for each measurement is long…often taking a minute or so for both op-amps to come out of saturation and settle near the baseline.

The 2nd PCB, dubbed “New” incorporates a surface mount quad op-amp (with all amps in parallel) for the first stage.  The op-amp selected is the ADA4522-4.  This was chosen because of Pipelie’s recent posts.   The 2nd stage amplifier is the same LT1012 circuit used on the Orig circuit.   This new version was first tested using a 100uF film capacitor instead of the 3300uF electrolytic used on the Orig PCB.  The 100uF cap was only tested in the 2/20K mode.   Noise floor was similar to the Orig version with 3300uF capacitor at ~1.3mV (130nV) pk-pk.  Frequency response for this version was ~0.2Hz-4Hz (-3dB).
At this point I decided to address the bandpass and get the high-end to around 10Hz rather than 4Hz.   Doing some SPICE simulations, I zeroed in on the value of some capacitors in the original circuit.  Namely C16, C25, C26 and C27.  All were 220nF.  I changed all four to 47nF (FILM).   Subsequent bandpass tests showed ~0.2Hz to 9Hz (-3dB). 
Next tests involved changing the 100uF capacitor out for another 3300uF Nichicon Gold Audio capacitor.  The same type used in the Orig circuit.  Note these caps were selected for very low leakage current (<5nA at 10VDC).  Of the six caps purchased four met this test but required several hours to overnight 10V bias before getting down to that level.   I did not bias the caps before testing however.  All testing was one without pre-bias being applied.

The New circuit using the 3300uF cap and 1K shunt resistor yielded the best performance.  Noise was typically around 1.2mV pk-pk (120nV),   Frequency response was ~0.1Hz to 11Hz (-3dB). 

Setting the gain for each circuit setup was done by applying a 1Hz sinewave attenuated to ~5mV.  This is directly measured on the scope.  An additional checked 20dB attenuator is then placed in series to give ~500uV signal.   The amplifier gain is then adjusted to get ~5V output (whatever the calculated input signal is x10000).  Then the signal is further attenuated to ~5uV and the resulting signal check for reasonableness.  I found the apparent gain was always larger than expected by 6-13% when doing this check.  A check of my attenuators on the SA showed then not to be the primary source of this error.   
Could it be that gain at very low input voltage is somewhat non-linear?   Even with the apparent gain error, the amplifier is still quite useful, but it does put some uncertainty on amplitude of noise measurements.

Insatman


« Last Edit: May 31, 2018, 04:40:17 am by Insatman »
Retired Pulsed Power Engineer/Physicist...now I just dabble in electronics
 

Online Kleinstein

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To measure the noise of the amplifier itself, the short circuit case is more relevant than the open case. This will especially lower the noise for the version with higher resistor to ground (e.g. 2 K / 20 K and 100 µF cap). Usually signal sources are kind of low impedance compared to the resistor at the input - if not, one has to include the reduced gain / source loading. So the open circuit test is misleading.

The gain is expected to be linear down to low amplitudes. There are quite a few resistors that reduce the gain a little, but the simulation should tell.
 


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