Fluke 5520A - Err 104

[Jetecnet]

I don't have the calibrator at the moment, it went back into service as its 99% functional.
The only other symptom is failure to boot sometimes which is why I wanted info on the Altera operation, how it boot loads etc.
You have a service manual with schematics for the 5520A?
I'm using a combination of manuals to service this. The circuits on the A6 board are good apart from no activity on the SRC line.
I may get the calibrator back after the holidays here.

[Jetecnet]

Can you confirm your problem solution with R128 A6 board, 10ohm? I'm using 57fc.pdf schematics, R128 is 1K, DCLK pull up for U2 ECP1.

[Ugur]

I am sorry this is my mistake.
  R128 10 Ohm is on the 5500A A6 board, not on the 5520A A6 board.

[Analogdevice]

Hi Analog, I hope you are still monitoring this thread. Interesting repair.
I have a 5520A that has a problem with the thermocouple read/zero. I believe I'm missing a "SRC" signal direct from the Altera chip. From your post I'm see you replaced the Altera? and I think you are saying that EPC1 (U12?) will reprogram a replacement? Is it that simple? Just replace the Altera chip? Or do I need to somehow tell EPC1 to do the reprogramming? Not very familiar with this FPGA stuff.
Thanks for any reply. JC

Quote:
I also replaced altera, but now I have Err104 permanent with relay cycling.

Altera (U5) is configured by configuring device EPC1. I checked all config pins and this looks good. As you can see in picture below, when nCONFIG goes high, CLK is activated (altera's internal generator) and DATA is transfered from EPC1 EPROM to altera (via DATA0). When configuring id done, the CONF_DONE goes high and reset FPGA to user mode via MAX705 supervisory circuit. Some signals are present, e.g. strobe for DAC reference (600Hz), which means that altera was configured succesfully (also nSTATUS is still low, so during configuring there were no err's). But when "loading waveforms" appears at display, there are no data flow to RAM. The only problem is that I really don't know, where are data of waveforms stored - from where are coming to RAM. I thought that it's stored at outguard CPU, but serial communication is working (watchdog is not tripping and also there is no err message that inguard is not responding).

Hi, I'm sorry, I wasn't here so long.
Answer is - yes, is it that simple. Altera is configured after powering up every time from EPC1, then waveforms are loaded from outguard CPU to inguard CPU. There's no magic, just remove old altera and place there new one. Done.

[Jetecnet]

That's great, thanks!

[Analogdevice]

Don't mention it!

Can you write there symptoms, please? As I can see on schematics from 57LFC, TC sourcing is obtained from V3_3 - is 3V3 range working in Voltage mode?
When zero or selftest mode is activated, signals from temp. meas/sens. is routed via U82 (DG444) - either TC meas or ISO meas to PMUX switched to ADC.
U82 is driven by TC MEAS or ISO MEAS (also activated when temperature sensing mode). These signals are coming from altera, pins 148 and 149. Are these signals OK? Be careful, I'm looking to 57LFC schematics where altera 10k is used, it's different.

Thanks.

[Jetecnet]

The 5520A works fine except zero check throws up TCmeasZ Constant outside limits.
U82,U13,U6 were replaced as where U1,U2,U3 on the thermocouple board.
There is switching on some lines, presumably comparing the buried TC with the active TC but there is no activity on the SRC line from the Altera, at power on or reset.
If I remember correctly its held high.
On selecting TC Meas it displays 1000 deg C, removing the TC shows open TC.
"Measure" flashes up on the display at regular intervals.
I don't have access to the unit at the moment, its in service.
JC

[calija]

Dear All,

I got some problem with my 5520A.

DC voltage is OK.

AC voltage is OK for this voltage:
- 100 V
- 200 V
- 380 V
- 400 V
- 500 V
- 600 V
- 700 V

and not OK for this:
- 220 V
- 250 V
- 300 V
- 700 V
- 800 V
- 900 V
- 1000 V

It is not possible to make ZERO, then give this errors:
- 1505 (DDE:FRS ) VDAC counts out of range
- 399 (QYE:F ) Fault during %s
- 104 (DDE:FR D) Hardware relay trip occurred

yesterday when start self test - DIAG i got this errors:
- 399 (QYE:F ) Fault during %s  - AVOG33
- 314 (DDE:FR ) Divide by zero encountered
- 104 (DDE:FR D) Hardware relay trip occurred

Today self test pass? 

Today ZERO stops on 330 uA offset and got this errors:
- 1505 (DDE:FRS ) VDAC counts out of range
- 399 (QYE:F ) Fault during DIZ330U
- 104 (DDE:FR D) Hardware relay trip occurred

Do you got some suggestions? 

Best regards!!!!

[Ugur]

Hello,
There could be many reasons for this, can you check these parts first?

U24 AD620B on A7 board
VR5-7-9-10 on A8 board

[calija]

Dear All,

I got modest knowledge for testing of components on board.

I look some zener diodes on board and find that:
- VR5 got voltage 2 times bigger than VR7 and VR9 - value is 1.369V
- VR4 in both directions got approximately 0.336V

Maybe some of other components make some disturbances and from that reason I got this results.

Some other diode got 0 V when I testing them with DMM:
- CR15
- CR36

U24 AD620B on A/ board - I don t know how to test it?

Best regards and thanks for help!!!!
 

[Jetecnet]

Hi Analog,
just wondering if you successfully rebuilt the Z2 precision resistor network. I have one that is junk so I thought I might try.
It seems to be 4.3, 43, 400 ohm but I guess 4,40,400 might work?
TIA JC