Guarding high resistance measurements; LLMH 7th edition

[donlisms]

So...  I'd like to understand guarding for measuring high resistances, e.g. with the electrometer, where there is a convenient guard voltage available, and delivered to my test chamber on the inner shield.  I'm looking through Low Level Measurements Handbook, 7th edition, at figure 2-16b.  It shows a resistance measurement test chamber, with the guard voltage tied to a base plate, and two leaky standoff insulators holding the resistor under test.

If the base plate is at HI force, then there is no potential difference at the first standoff, and no current through it.

But the second standoff is sitting on the HI force voltage at the base and the top of it is at LO force /ground.  This seems like a potential difference that would drive a current through the second standoff leakage (upward) and join the measurement current through DUT.  The second standoff leakage resistance is effectively in parallel with the DUT, is it not?  4-wire would fix it, but with this 2-wire connection, it seems wildly wrong to me.

And then, a similar but opposite situation exists if the base plate is at ground.

I always first I assume I'm wrong.  What am I missing?  Is that the right way to configure a simple 2-wire high-value resistance test chamber?

[Anders Petersson]

Here's the illustration 2-16b for reference.

[KT88]

What you want to measure is Im.
No current is flowing into the left (not right - thanks Anders) RL (zero volts between guard and out_HI).
The Rdut and the left RL 'see' the excitation voltage. The current flows through the DUT and the meter and in parallel through the right RL into the guard driver output.
As the result the DUT sees only the excitation voltage with no parasitic load (an offset of the guard driver would result into a tiny leakage through the left RL though).

Cheers

Andreas

[Anders Petersson]

As KT88 said, the measurement is IM, that is HI current. I think the left RL doesn't see any voltage drop, hence no current. The right RL does see a voltage drop so current will flow. But this extra current comes from the guard and is not part of IM. I don't understand the text "IL = 0" -- I guess it's meant only for the left RL?

The illustration arrow IM = IDUT is misleading as its drawn by the LO network. This is not where IM flows.

I'm not completely sure, but I think measuring the current at LO force would not be possible as the setup connects LO to ground and that could mess up how the current flows. Perhaps someone can confirm?

I think KT88 mixed up when he wrote "No current is flowing into the right RL" as this would be the left RL.

[KT88]

Oops, yes mixed left and right...
IL=0 can only refer to the *left* RL (they should have differentiated between the two leakage resistances....
There is explicitly 0V shown across it.

I'm not completely sure, but I think measuring the current at LO force would not be possible as the setup connects LO to ground and that could mess up how the current flows. Perhaps someone can confirm?

They could have switched the polarity and moved the guard to LO...
But with the shown setup the leakage of the *right* RL would be in parallel to the DUT - not good....

Cheers

Andreas

[mjs]

The current through the right RL flows from 'low' impedance guard terminal to low impedance LO. So, that leakage does not show up in I_m.

(A small detail is that the feedthrough for HI should also be guarded. Triax connectors FTW!)