EEVblog® Electronics Community Forum
Electronics => Metrology => Topic started by: cellularmitosis on April 26, 2018, 12:48:59 am
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I thought I'd start a thread for hacking on the 34401A, as a "hacked" 34401A seems to be one of the next-best options for volt-nuts who aren't (yet) willing to fork over the cash for a 3458A. :-DMM
I'll kick us off with this one:
I believe I've just confirmed that you can substitute whatever 7V Vref you'd like in place of the LM399. This means an LTZ1000 upgrade should be possible. :-+ (or paralleled LM399's for lower noise)
The core of the 34401A Vref is a bootstrapped LM399 (see attached).
I removed R409, unplugged the LM399 (U403) (it is socketed! :wtf:), and plugged an MV106 into the zener pins of the LM399 socket. I was able to move the ADC reading around by changing the dials on the MV106.
Note that there is a leg of resistors hanging off of +Vz (a voltage divider which forms a 5V ref: R441 and R442), which total to about 50k, so your 7V ref will need to supply about 140uA.
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(pics)
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I wonder if the decision to socket the LM399 was so that they didn't throw away any pre-ageing by soldering in the LM399.
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I wonder if the decision to socket the LM399 was so that they didn't throw away any pre-ageing by soldering in the LM399.
In which case, why not a crimp?
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I wonder if the decision to socket the LM399 was so that they didn't throw away any pre-ageing by soldering in the LM399.
In which case, why not a crimp?
Good question.
I have noticed that the selected zeners (1N829A) in EDC gear are soldered in place, which is an interesting counter-point.
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hello Jason,
nice work :-+
now if you could replace the MV106 with a series connected 6x NiCd cells totalling around 7.2V
and then measure 1x, 2x, 3x ... 6x cells of other NiCd cells and plotting the histogram of values obtained.
and then repeat the test with LM399 / MV106 / LTZ1000 as a reference.
best regards.
-zia
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hello Jason,
nice work :-+
now if you could replace the MV106 with a series connected 6x NiCd cells totalling around 7.2V
and then measure 1x, 2x, 3x ... 6x cells of other NiCd cells and plotting the histogram of values obtained.
and then repeat the test with LM399 / MV106 / LTZ1000 as a reference.
best regards.
-zia
Use the NiCad cells to find the noise floor of the ADC / frontend?
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yes, and the potential headroom for vref noise improvement.
also an interesting way to evaluate references wrt. noise.
(maybe somebody does this for an HP 3458A ;) )
best regards.
-zia
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I wonder if the decision to socket the LM399 was so that they didn't throw away any pre-ageing by soldering in the LM399.
maybe some kind of factory adjustment procedure by plugging in a test-pod?
-zia
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Opening the thread I thought messing with a 34401A is a terrible idea. Reading the thread it sounds like potentially a great idea. Carry on! ;D
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Looks like you could easily make an L bracket off the side of the chassis to support an LTZ1000 ref board. Maybe even shock mounted with rubber grommets. I would even look at buffering the LTZ down to the same voltage as the LM399 it would be replacing. Since the buffer would have - gain, there should be little harm in noise or stability.
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The ADC in the 34401 has some intrinsic limitations. The reference is not really the worst part of the 34401. So even without the reference noise, there will be considerable noise and possible INL left. Some of the weakness is an intrinsic problem of limited resolution of the µC internal ADC and the resistors to the integrator - so nothing one can do about it as a kind of hack.
As just replacing the socketed LM399 is kind of reversible, it can be still a possible way. However the effect is likely limited.
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I remember someone over 38hot.bbs did LTZ mod for 34401A.
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The ADC in the 34401 has some intrinsic limitations. The reference is not really the worst part of the 34401. So even without the reference noise, there will be considerable noise and possible INL left. Some of the weakness is an intrinsic problem of limited resolution of the µC internal ADC and the resistors to the integrator - so nothing one can do about it as a kind of hack.
As just replacing the socketed LM399 is kind of reversible, it can be still a possible way. However the effect is likely limited.
hello,
here is a scenario:
(pardon me if i sound naive, i am)
1. let us make 2 reference sources for the "hacked" 34401A, call them REF-A and REF-B
2. REF-A is an inaccurate voltage source using some NiCd batteries in the general ballpark of 7V (required for 34401A)
3. REF-B is an accurate / calibrated reference source using a long-term stable device such as LTZ1000 / LM399 etc.
4. there is a computer controlled switch which can switch between REF-A and REF-B at will.
5. switch in REF-A and measure REF-A itself and REF-B and call these long term records AA and AB.
6. switch in REF-B and measure REF-B itself and REF-A and call these long term records BB and BA.
7. switch in REF-A and measure Vx and call this long term record AX.
8. switch in REF-B and measure Vx and call this long term record BX.
now the question:-
what can be said about real value of Vx using AA, AB, BA, BB, AX and BX? and using what kind of analysis?
how "long" is long-term?
(fourier, correlation, autocorrelation, other?)
the scheme can also be generalized to N+1 references being switched, one being the low-noise one and others being long term stable ones.
best regards.
-zia
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I remember someone over 38hot.bbs did LTZ mod for 34401A.
I think I found an LTZ mod for the 34410A: http://bbs.38hot.net/thread-69139-1-1.html (http://bbs.38hot.net/thread-69139-1-1.html)
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The ADC in the 34401 has some intrinsic limitations. The reference is not really the worst part of the 34401. So even without the reference noise, there will be considerable noise and possible INL left. Some of the weakness is an intrinsic problem of limited resolution of the µC internal ADC and the resistors to the integrator - so nothing one can do about it as a kind of hack.
As just replacing the socketed LM399 is kind of reversible, it can be still a possible way. However the effect is likely limited.
hello,
here is a scenario:
(pardon me if i sound naive, i am)
1. let us make 2 reference sources for the "hacked" 34401A, call them REF-A and REF-B
2. REF-A is an inaccurate voltage source using some NiCd batteries in the general ballpark of 7V (required for 34401A)
3. REF-B is an accurate / calibrated reference source using a long-term stable device such as LTZ1000 / LM399 etc.
4. there is a computer controlled switch which can switch between REF-A and REF-B at will.
5. switch in REF-A and measure REF-A itself and REF-B and call these long term records AA and AB.
6. switch in REF-B and measure REF-B itself and REF-A and call these long term records BB and BA.
7. switch in REF-A and measure Vx and call this long term record AX.
8. switch in REF-B and measure Vx and call this long term record BX.
now the question:-
what can be said about real value of Vx using AA, AB, BA, BB, AX and BX? and using what kind of analysis?
how "long" is long-term?
(fourier, correlation, autocorrelation, other?)
the scheme can also be generalized to N+1 references being switched, one being the low-noise one and others being long term stable ones.
best regards.
-zia
There is no need for such a complicated switching scheme - if would loose quite some time for data not or hardly used.
The idea of using 2 references is not that new. AFAIK some of the Keithley meters (e.g. K2001,K2010,K2182) use this : a low noise zener reference for the ADC itself and a long term stable LM399 that is measured to get a stable scale. The measurement of a reference is needed anyway to compensate for possible gain drift of the ADC. How often to measure the long term reference and how to use those data depends. The extremes are a kind of extra ACAL step that is done rather infrequent and a reference conversion after each measurement.
One has to find a good compromise between not loosing to much time for the actual input measurement and added noise from infrequent reference measurements. Ideally one would have a kind of digital filtering on the reference data, so that the long time reference (e.g. LM399) would give the very low frequency part (e.g. < 0.01 Hz or even lower) only, while the low noise reference at the ADC (e.g. 1N82x, 2DW232 ?, battery ?) would be responsible for higher frequencies.
However using 2 refs in a good way would need a suitable software control. So this is nothing to easily add to an existing meter.
The LTZ1000 offers long time stability and low noise, so it can be used for both the ADC and long time reference. The measurement of the 7 V ref is than mainly to compensate for ADC gain drift and is less influenced by reference noise. So it is still better to have a single reference that is both low noise and low drift.
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There is no need for such a complicated switching scheme - if would loose quite some time for data not or hardly used.
The idea of using 2 references is not that new. AFAIK some of the Keithley meters (e.g. K2001,K2010,K2182) use this : a low noise zener reference for the ADC itself and a long term stable LM399 that is measured to get a stable scale. The measurement of a reference is needed anyway to compensate for possible gain drift of the ADC. How often to measure the long term reference and how to use those data depends. The extremes are a kind of extra ACAL step that is done rather infrequent and a reference conversion after each measurement.
One has to find a good compromise between not loosing to much time for the actual input measurement and added noise from infrequent reference measurements. Ideally one would have a kind of digital filtering on the reference data, so that the long time reference (e.g. LM399) would give the very low frequency part (e.g. < 0.01 Hz or even lower) only, while the low noise reference at the ADC (e.g. 1N82x, 2DW232 ?, battery ?) would be responsible for higher frequencies.
However using 2 refs in a good way would need a suitable software control. So this is nothing to easily add to an existing meter.
The LTZ1000 offers long time stability and low noise, so it can be used for both the ADC and long time reference. The measurement of the 7 V ref is than mainly to compensate for ADC gain drift and is less influenced by reference noise. So it is still better to have a single reference that is both low noise and low drift.
thanks Kleinstein.
as far as adding functionality to existing meter, i am not proposing that, instead i am proposing to use a computer for this analysis.
moreover, if the "character" of noise introduced by the ADC is measured by switching in the lowest-possible noise reference source (battery),
then this "character" can somehow be "subtracted" from measurements to enhance accuracy and/or resolution. moreover the datasets
represented by AB and BA can be used to determine the base-line measurements of both reference sources.
best regards.
-zia
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The reference sections around the LM399 inside the 34401A and the 34410/411A are very similar; only difference is the value of the sourcing resistor, 750Ohm inside the 41xA, for +/-9V ADC reference, and 1k47 inside the 34401A for +/-10V.
Both circuits deliver 2mA to the LM399 zener, as stated in the 38hot blog.
If you think about the 34465A /34470A, these are probably copy/paste circuits from the 41xA instruments, as they have the very same multislope IV A/D converter.. so the reference topology is probably the same.
If you look at the pictures of the 465A and 470A main boards, there seems to be no difference.
They only replaced the LM399 by the LTZ1000A board, which is virtually identical to the 3458A reference board.
Of course the supply is a bit different, but the LTZ reference output itself just plugs into the LM399, and the original 2mA supply is just sourced by the LTZ circuit, i.e. there's no need to remove the 1k47 / 750 Ohm resistors.
Unfortunately, I did not succeed in fully reverse engineer the exact way KS merged the LTZ1000 circuit into the LM399 topology, but I think it would be easy to include the whole board inside the case of the instruments w/o external supply.
Frank
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thanks Kleinstein.
as far as adding functionality to existing meter, i am not proposing that, instead i am proposing to use a computer for this analysis.
moreover, if the "character" of noise introduced by the ADC is measured by switching in the lowest-possible noise reference source (battery),
then this "character" can somehow be "subtracted" from measurements to enhance accuracy and/or resolution. moreover the datasets
represented by AB and BA can be used to determine the base-line measurements of both reference sources.
best regards.
-zia
There is no way to subtract the "character" / typical noise from normal DC measurements in DC. Noise is unpredictable random with an average value of 0 and thus the best guess is to subtract 0. It might be possible in some noise / AC measurements to subtract some "offset" due to the instrument noise, but that is different and does not need a special extra reference, more like a dummy input (e.g. short).
Doing the analysis afterwards it would need quite some channel switching and looses time measuring the input. It might be viable, but likely in the more simple way with a low noise at the ADC and a long time reference measure through the normal input channel.
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Quantifying the noise behavior will give you more refined uncertainties, but you can't remove them because they are random. You *can* reduce the errors by averaging, but every 6 dB of improvement will cost a 4x increase in measurement time. TANSTAFL.
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Quantifying the noise behavior will give you more refined uncertainties, but you can't remove them because they are random. You *can* reduce the errors by averaging, but every 6 dB of improvement will cost a 4x increase in measurement time. TANSTAFL.
are we assuming that the noise introduced by the ADC alone is random?
(assuming that the reference is noiseless - batteries)
-zia
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I'm referring to the thermal and 1/f noise. My analysis to date has been limited to the aliased thermal noise of an integrating ADC. I've not looked into the ADC noise. I've also not rigorously examined the 1/f noise. But as it is random, I don't see anything one can do about it.
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Looking at the main A/D, U501 CMOS gate-array contains a 24-bit counter driven by 12MHz clock.
I don't see the integrator period as enough, with 30K, 10Vref, 440pF integration capacitor. It seems low for close to 6.5 digits, or is my math is wrong here.
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Looking at the main A/D, U501 CMOS gate-array contains a 24-bit counter driven by 12MHz clock.
I don't see the integrator period as enough, with 30K, 10Vref, 440pF integration capacitor. It seems low for close to 6.5 digits, or is my math is wrong here.
AFIAK the ADC uses the feedback from the current sources and in addition the µC internal 10 Bit ADC to measure residual charge. As there is no switch to separate the input, the ADC runs continuously more like the old Solartron's, but with the extra residual charge reading. So the µC internal ADC should add some extra resolution.
With the rather fast modulation (needed due to the small cap) I find it difficult to get the not that fast ADC to sample at the right time to really get significant extra resolution, but it somehow seems to work.
Due to the rather close timing, I consider it a good idea not to touch / modify anything here. There is essentially no chance to improve the µC internal ADC limitation anyway. From my analysis I see the 10 Bit ADC as a limiting factor for short integration times and the current noise of the OP27 in the integrator as the limiting factor for longer integration times.
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How has this developed? Anyone modified their 34401a with a LTZ1000 with or without sucess?
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in theory you can, on a practical side, i doubt of any improvement, soo guess none done.
i may assume original 399 are selected , and some dmm like 10-20 years old, means, do replace original 399 with same long-term stability would be a significant challenge.
quite interesting set an array of few modern adr1399, but again do it right \ selection \ageing takes triple cost of used unit. I'm speculating, that out of set 10 399 about 1-2 would be acceptable for drifting
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I don't consider the reference the major weak point of the 34401. A slight upgrade to an ADR1399 may be OK, but the old, well aged LM399 is likely more stable.
IFAIK the 34401 does not do an ACAL to correct for dirft in the ADC gain. So the resistor array would also effect the gain. Usually the 34401 still hold up calibration very well.
The ADC has quite some noise on it's own and no easy way to improve on this, at least not by much. So the main point of a better reference would be less popcorn noise.
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Frankly, I think the most important mod for the 34401A is the installing an internal temperature sensor.
You may cope with the noise with some averaging/smoothing, but without knowing the meter's internal temperature (and subsequently its TC) you cannot target any improvement, imho.
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Thanks for input on LTZ1000 mod.
I bought 2 very nice looking 33401a locally for 200 USD each. One early Agilent and one HP. Didn't really need them but thought I could have them for some experiments, and LTZ1000 mod came to mind. Not that I think it would make the meter much better, but more because you can thing. I may still do it, and if so will report back on outcome.
I am now starting off with changing electrolytic caps as first step.
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There is one weak point of the 34401 that one could improve on:
https://www.eevblog.com/forum/repair/hp34401a-autorange-not-functioning-with-half-wave-rectifier/msg4768076/#msg4768076 (https://www.eevblog.com/forum/repair/hp34401a-autorange-not-functioning-with-half-wave-rectifier/msg4768076/#msg4768076)
The meter has no way to tell if the input drives the amplifier into saturation for short times. The aut-ranging and also over range detection can only use the ADC result, but has to way to see short time overflow. Clipping at the integrator could be visible in theory, but amplifier clipping may happen first and not sure the ASIC supports it - it does no seem to help with the autoranging example.
One could add a relatively simple window compartor for the amplifier output signal and show overflow with a LED, so one would at least know if there could be clipping (the threshold would have to be a little lower than actual clipping). It could still be a bit tricky to ignore overshoot from switching, so in times when it would not matter.
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..and an another hack would be to add an LED (turquoise one) - for when the box is powered on and the display is set off.. :)
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another thing that I noticed : Linear VR using board as a thermal sink. in a theory it unevenly warm up the board.
im not sure if desolder it and make vertical with own heatsink, may improve something. it may do better runaway from cold to hot state.
would be great to find one in close state to graveyard , would be no much of remorse if killed , but its kinda impossible task.
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so i got one, half dead , while in process of repair, i did play with 18V sources ,
basically as for developers it always no space on board to put everything they want, im guess caps was cut off as well
so 50uf poly i add as shunt to adj 317\337 ; and special 2700 low esr to output
fast 6 digit gives me around 0.5 - 0.7 uV P-P noise , while slow was 0.12 uV ish ..
i'm guessin it the same numbers as non mod version.
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Can you look at the +/-18V rails for noise - strangely it powers the A/D but also the VFD... and there was a change to the Front Panel board grounding (ribbon cable) and some ferrite beads added in later models. It might be something that can be improved.
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There is not much that can be done about the ADC noise of the 34401. The main noise sources are from the quantization and other noise of the 80196 µC internal ADC. So if a little more supply filtering could help it would be at the 5 V for the µC.
The design of the 34401 is not made for high performance, but for low cost. There is not that much that can be changed as quite some parts rely on the ASCI and custom resistor arrays that make it nearly impossible to change much. Instead of tweaking the old design it would be likely easier to build a new one.
I don't think the board space was such a constraint for the developers, more the costs and maybe not touching the working ADC design as it needs quite some testing to verify that a design actually works also with the scattering parts. The noise is more like the easy part. The linearity part is more tricky.
For the voltage regulators large very low ESR capacitors at the output side are more like a problem for the regulator and may make regulation worse (increased ringing).
Much larger capacitors at the input side for ripple filtering mean more load to the transformer from a reduced power factor and the more pulse like current can cause more problems with hum. So more capacitance is not always better.
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What would be the theoretical improvement provided the 80196's ADC will be replaced by a modern 14-16bit external one?
PS: the 80196' ADC has got its 5V Vref (pin13) off the 399 via a 706 opamp - see below. I wonder whether there is something to improve around the "+5REF"..
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so
play with 5V bus - and really nothing much
shielded display cable by sticky aluminum foil - nothing much
but ... after everything , my AC V noise , around 0.2 microvolts, that much less then DC,
i'm not certain if AC has more samples for averageing so result less noisy or finally all this actions accumulated? no idea ...
but my another where wasnt my dirty hand - for ac gives around 1.4 microvolts.
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Hmm,
the 34401A is very non-linear below 0.5 mV AC
https://www.eevblog.com/forum/metrology/low-ac-voltage-measurement-issues/msg3842051/#msg3842051 (https://www.eevblog.com/forum/metrology/low-ac-voltage-measurement-issues/msg3842051/#msg3842051)
with best regards
Andreas
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What would be the theoretical improvement provided the 80196's ADC will be replaced by a modern 14-16bit external one?
PS: the 80196' ADC has got its 5V Vref (pin13) off the 399 via a 706 opamp - see below. I wonder whether there is something to improve around the "+5REF"..
A better ADC could improve the noise quite a bit. However the useful resolution is somewhat limited as the TC of the integrator capacitor (likely C0G and thus < 30-50 ppm/K) enters in the gain there.
So more than some 12 bits would be of limited use. I pefect ADC could reduce the noise about 3 fold for the 10 PLC case and more with shorter integration. It would still be quite some effort and more like a new design of the ADC with a few more changes to also help with other noise sources.
From my calculation I get an RMS noise for the 10 PLC mode of about 1-1.5 µV from the µC internal ADC noise and some 0.5-0.7 µV from the 1/f current noise of the OP27 as the 2 largest noise sources. There are than 3 sources that contribute some 350 nV: The resistors, non filtered part of higher frequency reference noise, jitter (mainly the HC4053). The noise adds as squares (geometric sum) and the larger ones are thus more imports.
If at all a better supply filtering could help with the 80196 to reduce the ADC noise there. Chances are it is already OK and not that much room for improvement and it could be just the intrinsic noise of the µC internal ADC.
The low hanging fruits are more the OP27, the HC4053 and adding a little filtering to the reference. Still this is only a small part of the noise and tweaking an existing ciruit is tricky. At some point is may be easier to build a separate, simple voltmeter with a similar cuircuit (e.g. use a more modern µC to replace the 80196 and ASIC).
The AC part with an analog RMS->DC converter does not work well at very low voltages. It is tricky to look at the noise of the AC mode. There is the rather nonlinear response at low voltages (different units may behave differenet in the details) and also a bandwidth that gets lower with low amplitude. So it is expected that the noise depends on the AC level and possibly the AC waveform.
The AC part has some filtering for the result and the AC readings are this a bit slow by design. When reading slow the ADC uses multiple 10 PLC conversions and averaging for DC and likely also for AC.
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If anyone wants to have more of an idea of how the FW calculations and ADC work on the 34401A then there are some interesting reverse-engineering notes from alan.bain here:
https://www.eevblog.com/forum/testgear/hp-agilent-34401a-hidden-menu/msg4644106/#msg4644106 (https://www.eevblog.com/forum/testgear/hp-agilent-34401a-hidden-menu/msg4644106/#msg4644106)
I guess it might be possible to graft in a better ADC to get some improvement as noted above, but I suspect the software hacking effort would be pretty heroic - just gonna enjoy mine as is (well, with the other added FW features from that thread), and use another meter when I need better performance at short integration times (or indeed the ability to use 6.5 digits at <10PLC at all without fiddling with the custom aperture setting).
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The linked other thread has indeed a really great describtion of the software details.
A somewaht tricky point with measuring the charge on the fly is the right timing on when the ADC is sampled. Dending on the exact time when the µC internal ADC is sampling a fraction of the last run-up count (pos or neg reference) may be included or not. For the software description it looks like they adjusted the timing just right to have only full cycles included and no frational part.
Another interesting point is that they include a numerical correction for an U² part of the ADC nonlinearity. This part would to a large part come from the 74HC4053. So changing that chip (and possibly also just the supply of this chip) would requite a new (may be special low level ?) calibration. They could get this correction parameter from the cal steps with +10 V and -10 V so it could be part of the normal calibration.
I am a bit surprized to also see a correction for a U³ part. AFAIK the normal calibration does not include an extra test point for 5 or 7 V to also measure this parameter. So to measure this correction may need a special (low level) calibration.
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im not sure about AC linearity , as it basically AC-DC RMS AD637 converter , same i see in the fluke 8840\42 ; same in Keithley 175 (4.5) 197(5.5) , and many others .
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Interesting discussions on the HP34401A, but maybe a couple of simple mods are still in order. The 34401A takes (mine at least) 2+ hours to internally stabilise the temperature, indicating many opportunities for some improvements.
- Replace the 3x 0.01uf XR7 capacitors in the Vref circuit with COG, as any local heating causes the short-term Vref to vary considerably.
- R409 1k47 +/- 100ppm resistor supplying the LM399 current could be replaced with either 1k47 +/-10ppm or 1k5 +/- (2-5) ppm, lage TC improvment
- to a small extent the Vref start circuit diode leakage could be reduced by replacing the diode with a BJT diode.
- The +5V reference divider resistors R441,R442 are +/-100ppm and could be easily replaced with +/-10ppm resistors while only a small change like the BJT diode it improves the TC and the +5V ref stability.
- I'm not sure if anyone noticed the +5V change in ground reference from AGND to GND C449. This could be an opportunity for greater noise filtering.
- ADC MUX IC U411 HC4053 seems to be less than ideal, the three switches being operated at +/-20mV )(approx) into the virtual ground -ve input, the MUX resistance and non-linearity is poor with the ohms/V being high (the ideal is (VCC-VEE)/2). Is it possible to add a -5V VEE (shift the input switch to the idea (VCC-VEE) /2 to not only lower each switch resistor but also decrease the delta R and improve the linearity? Unless this mod would increase the switching charge injection into the channel? The biggest problem or opportunity is the replace the MUX with a modern typ but the packages are not available in SOIC.
Anyway somthing to think about.
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Given the large rectified voltage headroom before the linear regulators, I'm using a bucking transformer to reduce nominal 240Vac to 210Vac, as one way to alleviate internal heat dissipation. Another easy mod is to solder copper strips to the pcb ground grid around the linear regulators (aka heatsink fins), to enhance the thermal transfer to internal airspace, as a way of reducing pcb temp rise/gradient around the linear regs. Both those mods should alleviate the warm-up time, along with turning off the screen.
I also added an LM35C and used a DB9 spare terminal to allow monitoring of the internal shield temp - more so as a way to confirm known internal temp conditions when doing cross-comparisons.
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The LM399 circuit does not really need that stable resistor around. The differential resistance is quite small for the reference.
There is not that much that can be done for the ADC. The main limiting part is the noise of the µC internal ADC followed by the quatization noise. So a point could be additional / better decoupling at the µC.
There are other weak points too, but it would be hard to see the small improvements from the smaller noise contributions.
The 5 V to power the HC4053 mux at the ADC has likely an only moderate effect. There is some effect on the swich resistance, but this compensated out quite well because of the symmetry.
As a small upgrade one could replace the HC4053 with an SN74LV4053 (the LV version from phillips / ONS is different). The LV4053 is available in DIP and SOIC, so no problem there. The advantages are lower R_on, slightly less capacitance and likely less jitter.
Another small point could be a little filtering for the higher frequency (e.g. 100 kHz range) part of the ref. noise.
One could get faster settling of the internal temperature by adding a fan - still this comes with noise.
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Agee would be good to regulate the incoming AC to better manage the internal temp. Keithly managed to do that within one of their DMM I seem to remember, for the same reason.
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im not sure about AC linearity , as it basically AC-DC RMS AD637 converter , same i see in the fluke 8840\42 ; same in Keithley 175 (4.5) 197(5.5) , and many others .
With a Gilbert cell ac-rms converter there is a trade-off between keeping some output set for 0 in to give a better low level linearity. using a calibrator in the past allowed me to see how taking away all the noise left one with worse linearity, so the best settings depend upon your particular dmm.
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I spent some time with filtering the 399 zener. Cut the trace and applied an RC in the front of the AD706 - 1k/10k/47k/100k / 3u3 foil. It changes the calibration, and I did not see any measurable change in stddev while measuring my 10V.
Also mind the analog part of the ADC is powered by +/-18.3V, where the +/-15V is made of 3.2V zeners (3 or 4 pairs) in series with the power lines. Unbelievable, indeed..
One important prerequisite with all those improvement attempts is your ability to completly re-adjust the meter.
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..
I also added an LM35C and used a DB9 spare terminal to allow monitoring of the internal shield temp - more so as a way to confirm known internal temp conditions when doing cross-comparisons.
What is the TC of your meter? Where you put the temperature sensor?
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iMo, I followed your comments from https://www.eevblog.com/forum/metrology/getting-one-more-digit-from-a-6-5-digit-meter-without-using-gpib/ (https://www.eevblog.com/forum/metrology/getting-one-more-digit-from-a-6-5-digit-meter-without-using-gpib/) on location for LM35C, and noted your tempco comments. Meter tempco (whatever it is) was the main reason to take note of internal temperature as a first-order and cheap way of mitigating meter temperature difference when making comparison measurements with other meters and/or voltage references over time. I haven't as yet made a plot of internal temp versus bench ambient, so can't confirm what temp rise I get and how influenced that is by diurnal benchtop temp, or whether there is any benefit in implementing some local temp controlled heater for the local meter environment to buffer from room temperature changes, and further stabilise internal meter temperature.
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Yes I did similar, soldering some copper wings on the LRs to at least attempt to lower the peak temperatures and speed up the distribution of heat by way of a greater surface area. My mains voltage is typically 240V but ranges from brief periods of 230V to 250V during the day with all our solar PV systems lifting the mains voltage. Most houses where I live have solar PVs. The other thing I did to paint the internal aluminium shield matt black, which goes from a very good IR reflector to a good absorber and radiator to speed up the thermal transfers to hopefully reach some equilibrium quicker.
The Linear Regulars are dumping a lot of heat, the designers of the 34401 made sure the DMM was under regulation down to 200V or below (for 230V mains) or so.
The thermal environment of the 34401 has both external ambient and internal heating to contend with.
The ideal world would stabilise both the mains voltage to just above the LRs regulation point around say 210VAC and then the external ambient temperature.
I did plot the temperature of the internal shield, it takes hours to stabilise, a log curve, you need at least two hours before it flattens off then with both the mains voltage variations (variable LR heat dissipation) and ambient temperature fluctuations.
I did a quick check with all the covers off and used my soldering heat gun set to 100C i.e. a small point source of hot air. While watching the external Voltage plot from the DVM, applied the heat source briefly to the various components. The good news most of the instrument makes only small differences, but the three Vref 0.01uF X7R capacitors are extremely sensitive and cause significant changes to the measurement voltage.
Replacing only three 0.01uF capacitors from X7R to COG around the Vref circuit would eliminate one source of TC instability affecting the warm-up period in particular. One could ask why such unstable TC components were used in the Vref circuit in the first place apart from the cost 10+ years ago.
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So, the potential changes around the Vref..
The 78/7915 are the placeholders for a low drop regulators (18.3->15V), there are just the 3V2 dropper zeners there now (and the same situation at the ADC powering too).
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Hello,
caution. 7915 (and usually LDOs) need more than 100 nF as output capacitor.
And do not forget the reverse bias diodes (anti parallel to output) to prevent latch up during start up.
(especially when putting a large capacitor across the heater).
with best regards
Andreas
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So, the linear regulators love some lower mains voltage, sometimes?
A trick for old radios comes to mind:
Put a 24V mains transformer in a box and connect it so that the 24VAC are substracted from the mains voltage before feeding the unit.
cooler device without opening.
BR
Hendrik
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One hack I tried has been with the RC filter after the HP399.
Tried with 10k/47k/100k and 3.3uF wima foil.
Cut the trace and carefully soldered the RC in (WARNING: any soldering around the opamp's pins WILL move the calibration by some ppms!).
I did not see any "significant" change at 10V, however. It would need more elaboration..
See below ADEV with 10k/3u3..
I saw a significant change when I replaced the HP399 with my lowest noise LM399 - some 20-30% based on a quick stddev evaluation. It would require a complete readjustment of the meter, however. Moreover, my LM399 does shot from time to time (like 2-4x per day) making around 5uV (@10V range) shift in one direction.
Another thing to eleborate is to add a small capacitor at the input of the ADC in the MCU.
There is 3K16+1k resistor in front of it, so perhaps 100-300pF against chip's ground might show something..
Also decoupling of the MCU might help.
The ADC's comparator is in the ASIC, so decoupling of the chip there could be worth of try as well.
And the replacement with a 1399 will be the best move.. It means to add the RC snubber (do not do it at the 399 pcb pads directly as that would increase the noise due to thermal flows), and replacement of the zener's cathode resistor.
Needs complete readjustment.
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..and a preregulator like in the Keithley 2001 might help too.. :)
V2 is the voltage generated by an LED->optocell, the LED driven by electronics on the secondary side..
Keeping "stable" 220V AC at the primary.
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The µC internal ADC has to be quite fast as the feedback waveform does not stop. Adding a capacitor there would add a delay and settling time.
The comparator performance is not relevant. The comparator is only used to control the feedback and it's noise has essentially no effect unless excessive to cause saturation of the integrator. The "comparator" could even be something like a schmidt trigger input and not a real comparator.
The main point with the ADC is that the quantization noise is limiting and there is nothing (except a complete redesign, like a different µC) that can be done about this part. So all improvements for the shorter time scale are small.
The preregulator like in the K2001 could help a little with the thermals - lot of effort with a limited potential.
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The µC internal ADC has to be quite fast as the feedback waveform does not stop. Adding a capacitor there would add a delay and settling time.
Indeed, but worth of seeing the impact.. We do not know how is the exact timing of the ADC's sampling..
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We don't know the exact timing, but there is not much room to play. The switching is with some 1 µs and 1.6 µs and the sampling time of the ADC is some 1 µs - no barely enoug time and of the long time slot is used any delay effects how much of the last feedback step is effective.
One could test the impact, but i have little hope for an improvement and it can have a negative effect on the linearity.
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80C196KB has got a separate Vref input for the internal 10bit ADC, so we may try to filter there..
ADC timing - see below (we run it at 12MHz).. For higher than 6MHz clock the prescaler should be on..
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The ADC needs to run rather fast and there is now good way to change anything there. So likely no room for the prescaler. I had just looks at a shorted DS from Intel, that shows 1 µs as min sampling time. Even that is not very fast for the given signal that is modulated to some 370 kHz and thus not stable for the 1 µs. Already the quantization noise is limiting, extra noise from the ADC would be on top. How noisy the ADC is with the relatively high clock and very likely no prescaler is another question.
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Does it sample at 370kHz modulation? I can hardly imagine it can do something with that data at 12MHz clock and intel 16bit architecture (many clocks per instr.).
Moreover the ADC conversion time will be something like 23us at those 12MHz.. (say max 50kHz sampling rate)..
My bet would be it does sample the residual voltage at the beginning and after say 1000 runups or something like that..
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There is no way to stop the run-up modulation. It has to contineously run to avoid saturation. IFAIK it only samples the voltage 2 times, once for the start and once for the end of the effective integration. So only 2 µC internal ADC conversions per conversion, but still with the 375 kHz of modulation going on all the time. The effective integration time is defined by the time when the µC internal ADC reads the integrator.
Already the µC internal ADC can not follow the 375 kHz - so at most the µC could sample the voltage for every 4th cycle and average a little. This could give a little improvement, but I doubt that they use this.
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The ADC "conversion time" cannot be 2us. Noooo way. It is 10x time longer at least..
ADC's "S/H acquisition" time could be 2us when overclocked.
I highly doubt the 80C196 at 12MHz with its ADC can follow 370kHz modulation and do something with the data (or the above DS table is wrong)..
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In the DS that I have they claim down to 1 µs aquisation time, though already with a desiclaimer : "1. These values are expected for most parts at 25°C but are not tested or guaranteed." They would want a pretty short aquisition time, even though the relevant part is mainly from the end of this time anyway. So even if they have more only the last 500 ns or so would really matter if the signal changes.
The 375 kHz feedback cycle is handled by the ASIC and the control is via the "comparator" input there and not from the µC. The µC only has to somehow synchronize the ADC conversion with that cycle and do the 2 conversions for start and stop and read the counters inside the ASIC.
The somewhat tricky part not described that well in the patent is when to exactly sample the integrator and how to handle the feedback phase during the sampling. Chances are this would include 2 feedback steps that are only partially effective. Chances are they have to do some calibration measurement to see how to split the 2 steps to before an after. They may avoid the split steps when sampling just before the actual variable time, even though this includes the reference switching.
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They define in DS the minimal "conversion time" is 91 "state times".
The state time is 2 clocks (based on the DS) that is say 166ns at 12MHz clock.
The internal clock of the MCU == state time (166ns period with 12MHz external clock).
That is 15us for the conversion time when overclocked (no prescaler).
Add the "acquisition time" which is minimal 8 state times when overclocked (DS) that is 1.3us.
So you cannot get an ADC value into the MCU's ADC register earlier than after 16.3us overclocked.
Then you have to do something with the ADC value, you would need a couple of us to place it somewhere, no math, no decisions, imho..
The average instruction exec time with primitives is aprox 6 state times (aprox 1us) with simple math instr. perhaps 14 or more state times (User's Guide p 20-21).
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Got to my HP 34401. I was lucky and the multimeter is in good condition. It looks like it was not used much. The screen is in excellent condition.
Question about electrolytes: The capacitors have typical measurements and it looks like it is in good condition (for example, i add foto other new narmal and Low-ESR capacitor). Do they need to be replaced? I am considering quality Nichicon UHW1H102 capacitors (High Reliability 10kHours, Low Esr)
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Mine is from 1999 and I replaced the all big elytes with those black-gold ones. The old one were all ok, so there was no need to replace them, actually. Also the tantalum one seem to work ok. The issue with tantalum caps is when they got short they will smoke the zeners (usually short them). The zeners create +/-15V off the +/-18V (a primitive series dropper) on many places and when a zener is replaced the adjusting might be needed.
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I want to do a thorough preventative maintenance and upgrade all reasonable weak points, and install the ADR1399 and send it in for recalibration after minimal aging.
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Then people recommend to replace all tantalum bricks with same capacitance bricks but higher max voltage (like 25V or 35V - doublecheck) than the original one, afaik.
PS: with 1399 you have to change the zener's cathode resistor (such you get 3.5mA) and you have to add the RC snubber. Also I would not solder anything directly at the 1399's socket pins (from the bottom side) as it visibly increases noise (perhaps because the higher thermal flows) then.
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I want to do a thorough preventative maintenance and upgrade all reasonable weak points, and install the ADR1399 and send it in for recalibration after minimal aging.
Do you really think that replacing a manufacturer selected (from many, to meet the specs) and pre-aged LM399 with a arbitrary ADR1399 with unknown drift and history is a upgrade?
Before doing this I would pre-age a bunch of ADR1399 and then select them for minimal drift, 1/f noise and T.C.
with best regards
Andreas
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I don't know why you would want to replace an electrolytic that tests good unless it's extremely old, in a position where failure would cause damage, or there's another reason to be suspicious (e.g. another of the same type is bad, or it's a known problem part - are these known to go bad often in a 34401A?).
I've got plenty of stuff from the 90s and earlier built with quality caps that work as good as new (at least where they aren't abused or in particularly stressful use).
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are these known to go bad often in a 34401A?).
I am only aware of some Keithley production lots which used leaking electrolytes (from 2002-2004)
https://www.eevblog.com/forum/testgear/keithley-2000-and-the-leaking-caps/msg458613/#msg458613 (https://www.eevblog.com/forum/testgear/keithley-2000-and-the-leaking-caps/msg458613/#msg458613)
with best regards
Andreas
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Thankfully my Keithley gear is mostly from the brown era (and by and large has not needed any caps replaced, other than the early 80s K181 which had been abused by a prior owner). If I had a K200x I'd certainly be swapping caps, I've seen enough horror repairs documented on those!
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My 34401A is one of the first instruments, I bought it in 1990.
Up to now, no need at all to replace the capacitors, they do not leak, and ESR / cap value are perfect for their age.
Please use an ESR meter, before uselessly changing them.
I even had not to replace U203 in the Ohms current source yet.
Frank
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Found two radiators from the 220th. Bent the side fins and attached to the 317/337. I will leave the installation of AD1399 for the very end. For now, I will make a small upgrade and see if it will give any effect. I am making a list of spare parts. Tantalum capacitors, and update on 0.01 COG, I need to determine which ones. Does it make sense to replace HC4053 with SN74LV4053 as suggested in the thread earlier?
Before doing this I would pre-age a bunch of ADR1399 and then select them for minimal drift, 1/f noise and T.C.
I have been warming up two demo boards with ADR1399 for three months now (more than 2000 hours). In the last days I have not noticed any deviations (at least if I believe that it turned out to be 6.5 dmm Siglent SDM3065x)
Please use an ESR meter, before uselessly changing them.
I checked their parameters, they are normal. But for peace of mind I would like to install LongLife capacitors.
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Please use an ESR meter, before uselessly changing them.
I checked their parameters, they are normal. But for peace of mind I would like to install LongLife capacitors.
"Peace of Mind" hat offensichtlich nichts mit Enegineering zu tun, das ist nur Voodoo Quatsch.
Such Dir besser ein anderes Hobby.
Frank
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Found two radiators from the 220th. Bent the side fins and attached to the 317/337. I will leave the installation of AD1399 for the very end. For now, I will make a small upgrade and see if it will give any effect. I am making a list of spare parts. Tantalum capacitors, and update on 0.01 COG, I need to determine which ones. Does it make sense to replace HC4053 with SN74LV4053 as suggested in the thread earlier?
First do ignore Frank's comment.. This is a forum for Enthusiasts.. :)
Replacing the critical parts in the ADC could be dangerous, as it is not known how the adjustment software actually works. There are perhaps many settings related to ADC itself (see some previous posts on the math inside) made by HP after manufacturing and when you replace the components in the ADC the changes might not be considered by the adjustment procedure.
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The ADC of the 34401 has intrinsic limitations, especially the noise and resolution of the ADC inside the 80196 µC. Another limitation is the resistor ratio at the integrator input that amplifies many noise source about 3 fold compared to the simpler equal resistor case.
So even with replacing parts like the switches and OP-amp there is not much improvement expected. On the downside it can effect the adjustment of the µC internal ADC scale and thus can effect the linearity. The main advantage of the ADC in the 34401 was the relatively low cost and OK linearity, not so much the low noise.
To get a significant improvement it would need more changes, like replacing the µC and ASIC - so not much left of the original 34401 ADC.
An alternative to modifying the existing DMM with quite some fixed parts is to build your own (or an existing project) ADC / DMM from scratch.
A modern µC can control a similar MS-ADC as in the 34401 without the support of the ASIC.
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I am interested in achieving long-term stability from 34401. That is, to make maximum quality once with minimum efforts. I have another thread where I am starting the topic of building an ADC. Studying the upgrade topic more and more, I am inclined to abandon the idea of ADR1399 due to the lack of guarantees of success. But I like the idea of adding a fan that will try to control the temperature inside.
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Uh, I don't know. The 34401A is a fine bench meter as is. I don't think there is much to be improved on without major rework at which time you're better off starting from scratch. I'd leave it as it. If it doesn't suit your needs, get one which does and sell the 34401A to offset the cost of that better one. But then, what are you really trying to accomplish? What makes you think the 34401A is not adequate?
I have a multitude of DMMs and the 34401A might on the 10VDC range be the most accurate I have. It's actually quite difficult to say with certainty.
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..But I like the idea of adding a fan that will try to control the temperature inside.
Why to mess with fan? Simply measure the temperature inside and adjust the measurement accordingly in math.. I can imagine the fan might help to speed up the internal temperature distribution. Also the big "advantage" of the meter is it has no fan so it is silent :) ..
PS: the typical temperature inside (measured at the aluminum shield over the ADC) is Tambient+18C, fyi.
And there are two free pins in the RS232 connector..
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"Peace of Mind" hat offensichtlich nichts mit Enegineering zu tun, das ist nur Voodoo Quatsch.
Such Dir besser ein anderes Hobby.
Frank, your message is very informative and meaningful. And most importantly, it shows friendliness and a desire to help! :box:
- Ingenieurskunst ohne praktische Beweise ist nur Gerede!
Perhaps I will listen to your advice and take up another hobby.
Speaking of "peace of mind" I mean that while I will now spend the necessary time, then I will forget and not climb inside for many years. And also, if I decide to sell the device to my friend, I will not be gnawing at the worm that there are capacitors there that would be good to replace, because I do not know how much longer they will last. This is my point, formed by servicing the devices I have developed, as well as based on the experience of servicing rare equipment.
While the parts arrive to me, I will put everything back together and leave it under supervision to work for some time (with the screen turned off). In the meantime, I will free up the table for other things and start making a reference to track the result of the modifications.
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34401a is a fine meter the way it was designed in that time, unless some capacitors or tantalums goes bad, you don't touch anything in it, it was designed like this and should stay like this
anything added in it may affect it's performance and stability, theses meters age pretty well if well taken care of
had 3 of them, and at least 20 to 25 years old, and pretty spot on
one was calibrated (after a non needed full recap of lytics and tants) and frankly was not outside it's specs
the 2 others: one needed an new x-former and the other a new vfd
the only real upgrades at some point is some mcu fw updates, keysight offer the mcu v11 .. but you need to buy the chip too, but it was leaked on the web
and what is mostly known is the front panel pcb unobtanium NEC vfd driver chip, normally look the banana plugs, all red is mostly the "old / unobtanium", and black red are the newest vfd drivers
but to be sure there is a Hp Agilent document with the changes according to the serial numbers ....
you can not mix an old vfd front panel board with the newest ones, or the opposite.
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Another easy hack idea: to replace 3 or 4 pairs of 3.2V zeners (serial voltage droppers creating +/-15V off the +/-18V) with a single pair of 7815/7915 (or better regulators). Remove the smd zeners and feed the voltages via wires accordingly. Adjustment recommended.
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Completed work: replacing large electrolytic capacitors with new Nichicon HW (LongLife, standard ESR).
Tantalum capacitors were replaced with new Vishay TH3 (+150 °C). Tantalum at 1uF, replaced with polypropylene, In the LM399 reference circuit, X7R were replaced with NPO. There was a contact failure of the resistive matrix for 4W. Carefully soldered and everything worked. Front/rear switch and everything is fine.
I got 34470 and compared the measurements of the reference on ADR1399.
As for me, 34401, released in 2000, has preserved its PPM very well))
I am delighted with 34401.
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After almost a month of using the HP34401, its readings have changed slightly and they are close to the readings of the 34470A.
Self-calibration?
Infected with PPMs? :-DD
Or normalization of electronics after a long downtime in the warehouse?
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could be an heat transfert of the instrument(s) on top of it, i would make 1 inch space clearance around and on top of it
you are not optimal, it's not how i have my instruments, each one has it's own tablet, no mechanical contacts with others around them
my 2 cents
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For "precise" measurements you may need to know the internal temperature of the meter - as the meter has got some TC (you have to know that TC as well). 34401A follows the ambient temperature with some delta_T (like 17-18degC) and with some propagation delay (like 30minutes)..
PS: also it may take many hours/days to get it settled after power on..
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out of curiosity i record a difference cold - hot for about dozen 01A
10V , turn ON , wait 5min, record; in 24 hours - record ... difference
the best was 36 microvolts , the bad one 137 microvolts. 11A was 47 uV
average tend to 60 80h ish .. something
newer with round button shows better drift comparing to rectangular one , except one without back bracket and front glass - 43 .. I guess due to cooling effect of holes , so it not counted ..
I'm still thinking of addon , to measure internal temp, get a data by AR488 , recalculate data ( 7 digits + temp correlation + stats + graph , and throw it on some large screen ..
( wild think ... large sensor screen as a add-on insert to the front as replacement to existing controls .. no need to do anything just clip on front style , But i just imagine the amount of coding thingi ..)
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The simplest hack would be to mount a 10k NTC thermistor inside the 01A and enable the temperature measurement in the fw. There are 2 free pins in the RS232 rear connector, so you may access the thermistor via those pins (mount the thermistor isolated such you do not short inguard and outguard grounds).
More complicated is to have an external MCU doing a "data fusion" - reading the first thermistor (or any temp_sensor) placed inside the dmm, the second/third outside (for ambient and a DUT temperature) as well as the serial dmm data (adding the time from the RTC), making the filtering/smoothing/calibration/temp_calibration etc. inside the MCU, thus creating a long .csv record upon each 10/100NPLC measurement, the record you may save then somewhere. I've been doing that for years - using two LM35 sensors, transmitting the fused data via bluetooth into my smartphones, where I've been logging the .csv records with help of a terminal app. My 01A display is constantly off, and I read the actual data off my smartphone.
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What is the typical TC folks are seeing with the older HP and newer AG34401As operating around room temp 25~26C?
BTW like the idea of using a couple DB-9 RS232 unused pins for an internal temp sensor :-+
Best
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The typical TC of 01A in my case is aprox +0.5ppm/C in 10V range from 38C till 46C internal temperature (that is aprox 20-28C ambient), pretty linear fit.
PS: I've been using the 2 free pins like this - one pin is +5V from the outguard's 5V regulator (for powering the stm32f103+2xADS1110+HC-10_BT+DS3231_RTC and some LEDs), the second pin is the output of the internal LM35 temp sensor (powered from the outguard 5V) glued on the shield above the 01A's ADC, read by the ADS1110.. I would recommend to use an ADS1115 instead (4 inputs), for example, but I had bunch of ADS1110s at that time handy (1 input).
You may wire an LCD display to the MCU and have the fused data there (instead of using the 01A's display).
I also planned to switch off the filament of the internal display (several Watts), but have not found the suitable place for the switch yet..
..it is 6y already.. :palm:
https://www.eevblog.com/forum/projects/thermostating-the-hp-34401a-meter/msg2617395/#msg2617395 (https://www.eevblog.com/forum/projects/thermostating-the-hp-34401a-meter/msg2617395/#msg2617395)
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iMo, did the approx +0.5ppm/C include an 'open air' front panel 4mm plug connection to your 10V ref, or bare copper wire wedged into front panel sockets, or ..?
To minimise the tempco contribution from my 34401A, from previous threads I've also implemented the LM35 and RS232 socket internal measurement capability, as well as psuedo-buffer the enclosure top/bottom/sides and rear from ambient, and modified the internal heating situation by soldering in copper tab heatsinks around the regulators and using a 240V to 210V bucked mains feed. I turn off the display (and use Patel's software), but also haven't attempted to de-energise the display filament supply. I have a make-shift foam cover for front panel 4mm connections, as I tend to use generic commercial cable interconnects. The nominal internal temp is circa 45C for 23C ambient, but I haven't tried to log a 34401A specific tempco.
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The tempco of my 01A was measured many times, where I used banana plugs, and the front panel incl. wires and plugs was covered by several layers of thick cloth (as well as the entire meter). The internal temperature slowly rose from ambient (in winter from aprox 18C) to aprox 50C. Also I compared that TC with many measurements done at "stable" ambient temperatures between 20C and 26C. You also have to consider the TC of your external 10V reference.
For very precise measurement you would need a temp chamber and wait for several hours (like 6) for the meter to settle at each temp step, however.
PS: I have been using an internal thermo sleeve (aprox 3mm thick foam) and the internal temperature is aprox 18C higher than ambient. Your is delta is higher, but that is perhaps matter of the LM35 mounting place. Never considered the mains voltage (a good point to look at), but my final data are adjusted by the internal temperature and the known TC_dmm, so it does not matter much in my case.
Another hack could be the mounting of an internal fan, to speed up the initial warm up. I collected small size fans from blade servers, but again, there is not much place for a switch in the rear (two switches - for the filament and the fan).
The switches could be avoided when using a small 8pin mcu inside the meter, driving a relay for filament (based on some internal signal when the display gets off) and and for fan (based on the internal temperature).
A nice Sunday's afternoon project, indeed.. :)
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my # really approx
4 round units S\N 47 around 0.3 (at best) to 0.5
4 old "red" S/N 32 (???) - 0.5-.8
3 old black - 0.4 - .6
it about the same but round was a bit better ... and really coarse approx ...
i live in underground facility my ambient 18-21C all year round , if +35 outside , it +22 .. it doesn't count ..
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Maybe that can help You a bit ;)
I have started long term monitoring of old CCCP Voltage reference using four 34401A I own.
Voltage reference: https://github.com/felixs-lab/hardware-vref-iona-cccp
You will find there:
- AC voltages
- Environment data (room temp, humidity, pressure)
- inter-instrument comparison etc.
DDMs under test:
* [1] AGILENT 34401A MY45037309
* [2] AGILENT 34401A US36109397
* [3] HP 34401A US36067486 - my first 34401A
* [4] HP 34401A FLAMEIT001 (my recent buy - old HP 34401 - most probably 1998 version. Serial number is missing)
You can notice stable room tamperature for last few days. I have managed to finally keep the room closed
It will stay that way for 7 more days.
Grafana: https://monigra.flameit.io/public-dashboards/502ed47be1574d5aaeb2303422a8f8fb
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Hmm, your meters show identical waveforms at the sub 1uV level, as I can see..
That is weird, as with the 34401As their noise at 8V might be 4-7uVpp (100NPLC), imho..
PS: could it be the heavy smoothing did the the trick?
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Hmm, your meters show identical waveforms at the sub 1uV level, as I can see..
That is weird, as with the 34401As their noise at 8V might be 4-7uVpp (100NPLC), imho..
PS: could it be the heavy smoothing did the the trick?
It's just the "mathematics of drawing a graph" that caused the graphic similarity. Details are lost because they're too fine for this scale. These aren't digital clones; they have different DNA when enlarged appropriately.
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Hmm, your meters show identical waveforms at the sub 1uV level, as I can see..
That is weird, as with the 34401As their noise at 8V might be 4-7uVpp (100NPLC), imho..
PS: could it be the heavy smoothing did the the trick?
Yes I have made averaging on data. Please check TOP LEFT chart labels/names. Yellow circles.
Furthermore if You click on individual names on charts You can see individual data (red lines on image below). It works on every chart. If You hold CTRL and click names You can select data You are interested in.
ALL DMMs are set to 100 PLC and autorange, which strangely causes oldest HP 34401A with 3-1-1 FW to autorange ffrom 10V to 100V with no reason during that run. You can see some individual, solo downspikes with 4th DMM.
Last attached picture shows difference between individual DMMs (1-2 / 1-3 etc). Data in one graph is 1h averaged, one is not.
EDIT: I have also updated first graph in Grafana. I have duplicated it removing averaging from one. So You have now "pure 100PLC DMM data" there.
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While still targeting the HP399 replacement with my ADR1399 (showing lowest noise off all my 399s) I've made the first step - adding a 3.3u foil (wima red brick) in parallel to R442.
So far my ext_ref_10V dropped by aprox 2.5ppm (2h after soldering the capacitor in).
FYI - the MCU_ADC in the 80C196 and the 4053 switch in the ADC are powered from the output of the "U401-B" (AD706) creating 5V from the divider wired to the 399.
+5REF - powers the MCU_ADC (aprox 5mA based on DS)
+5VB - powers the 4053 integrator switch in the main ADC
.. :palm:
See below the planned changes. Based on my simulation the RMS noise at +REF10 should drop by 43% (0.1-10Hz) and 5.4x (0.1Hz-10kHz). The -10REF should be aprox 10% worse then. That drops thanks the 47k/3.3uF low pass. Another drop will be made by the 1399 itself (..hopefully).
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shorting +-15 by 10uf not so much .... i would short each 0.1 by some polymer caps, at least 100uf , and do per each capacitors everywhere as +-15 everywhere . ideally separate this opamp by 20-50 ohm resistors , if PSRR low ... ( but it would be difficult, you may look at short C441, no sure how it may behave ... for zener you can try 40uf .... or even 2 polymer caps in series with resistor ... the 47K at input , how much noise from R ?
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While still targeting the HP399 replacement with my ADR1399 (showing lowest noise off all my 399s) I've made the first step - adding a 3.3u foil (wima red brick) in parallel to R442.
So far my ext_ref_10V dropped by aprox 2.5ppm (2h after soldering the capacitor in).
FYI - the MCU_ADC in the 80C196 and the 4053 switch in the ADC are powered from the output of the "U401-B" (AD706) creating 5V from the divider wired to the 399.
+5REF - powers the MCU_ADC (aprox 5mA based on DS)
+5VB - powers the 4053 integrator switch in the main ADC
.. :palm:
See below the planned changes. Based on my simulation the RMS noise at +REF10 should drop by 43% (0.1-10Hz) and 5.4x (0.1Hz-10kHz). The -10REF should be aprox 10% worse then. That drops thanks the 47k/3.3uF low pass. Another drop will be made by the 1399 itself (..hopefully).
Good idea to replace the LM399 by the ADR1399. I just want to do the same on my old 34401A.
I can confirm, that the ADR1399 gives a noise advantage over the LM399, at least in my FLUKE 343A calibrator:
https://www.eevblog.com/forum/repair/fluke-343a-cleaning-repair-and-improvements/msg6225429/#msg6225429 (https://www.eevblog.com/forum/repair/fluke-343a-cleaning-repair-and-improvements/msg6225429/#msg6225429)
Here, noise improved by about 10% only, but I guess that the electronic components from 1969, as well the 584V bias voltage overwhelm the real noise improvement effect by far.
I had replaced the LM399 inside my 34465A by an LTZ1000A and found a 50% noise improvement. As the ADR1399 is in the noise ballpark of the LTZ, I estimate, that you might get a 20..30% improvement for the 34401A.
Please keep us updated about the noise improvement, Thanks a lot.
Frank
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The 34401 has a rather noisy ADC and there is not much that can be done about this (much of the noise is from the µC internal ADC).
A ADR1399 reference could help a little with longer time noise. It mainly avoids the popcorn type jumps of the LM399 and thus low frequency reference noise. For the short term (e.g. less than 10 seconds) there is little improvement expected. Some extra filtering of the reference can help, but the 47 K 3.3 µF is likely overkill in combination with the ADR1399. With some 160 ms RC one can nearly bridge the AZ loop with 10 PLC (the zero reading makes littel use of the reference voltage). It likely still makes little difference as the ADC is more noisy than the reference at that frequency.
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@GigaJoe:
Simulation with ADR1399 and AD706 and HP schematics:
RMS noise in nV at +REF10, R=47k, C=3u3
0.1Hz-10Hz 0.1Hz-10kHz
no RC 326 5451
R only 349 5240
RC 188 982
I've also tried to block +5REF (powers the entire MCU_ADC module, btw.) and the FLASH ADC_MCU input (fed by 1k off the AD711). Soldered directly at the MCU pins, against ANGND (in schematics wired together with VSS).
The FLASH blocked by 82p C0G, it messed up the reading - tens of uVolts randomly jumping.
The 100nF ceramics at +5REF dropped by aprox 1ppm, and increased a little bit the STD.
The 4n7 foil at +5REF with no drop visible, and STD under investigation, next morning we will see..
The lowest STD was with none capacitor at +5REF.
Could it be the U401-B AD706 is somehow unstable with such large capacitive loads??
The load in original schematics is 100ohm/100nF at +5REF and in parallel 46ohm/100nF at 4053.
@Frank: Way back I replaced the HP399 with one of my lowest noise LM399 and the noise decrease was visible. The issue with that LM399 was it popped couple of times per day (nice 5uV jumps).
PS: nVolts in the above table, of course..
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The AD706 datasheet shows an example with 1 nF capacitive load: quite some overshoot, but still not oscillating. So the OP-amp is somewhat tolerant to capacitive loading. The extra resistors of 100 ohms and 46 ohms would provide extra isolation of the capacitive load. It is a bit on the low side for isolation, but one also does not want too much resistance.
The relevant frequencies for the reference noise depend on the PLC setting. Likely one would use 10 PLC and longer, which is averaging 10 PLC conversions.
The main frequencies that would contribute are
1) the very low frequency range, below some 1.2 Hz, often well below 1 Hz, here the RC filter is barely effective
2) some aliasing from not really using the reference only half the time (zero conversions): 1.3 - 3.7 Hz (can become a narrower band around 2.5 Hz for higher PLC), the RC filter has some limited effect
3) around 1/2 modulation frequency , ~ 170 kHz range, filtering is easy. The limited speed of the OP-amps already provides some filtering.
Filtering the "flash" ADC input is not a real option. The ADC reading is only the fly and thus needs to be relatively fast.
The µC internal ADC is not a flash type, but a conventional, relatively fast for it's time SAR type with 10 bits.
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Frankly, this is the first time I've been digging into that AD706 output - there are two +5VB and +5BV voltages in the schematics so a little bit confusing to find the labels easily..
Seeing now the entire MCU_ADC module in the 80C196 AND the 4053 switches in the integrator are powered by that single AD706 opamp via those simple RC filters is something I would call a Tragedy.. :(
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The HC4053 switches would not need much power (should be some 100 µA). Most of the 80C196 µC is still powered normally. Only the ADC reference is from the AD706. So both are light loads.
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..Most of the 80C196 µC is still powered normally. Only the ADC reference is from the AD706..
That would be nice, but it is not the case, I am afraid..
Max 5mA IREF of the ADC module (analog+digital) powered by +5VREF (and the power loss at the AD706 powered off 15V??)..
Imagine the "digital" mess at the +5VREF node (the 0.5V lost at the 100ohm).. ::)
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Below an overnight measurement without a capacitor and with 4n7 foil between pins 12 and 13 of the MCU (+5VREF power and ANGND).
STD made with a sliding window of 100 samples, 100NPLC, 10V ADR1001#1 ref, both with the 3u3 foil at U401-B input, still with the HP399.
Median of that data (simple math approach but otherwise visible first glance):
none cap median: 749nV
with 4n7 foil median: 838nV
Either the AD706 is at the edge of instability or there is a grounding issue, or..
PS: the voltage at the 4n7 (+5VREF against ANGND) while measuring is 4.977V, at the U401B's input is 4.993V, HP399 out is 7.002V, power is +14.706V and -14.390V.
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The VREF pin of the µC has already 100 ohms in series for isolation and there are already 100 nF in the plan. So I doubt an extra 4.7 n would make a difference to the OP-amp loading. It is more that the EMI pic up can change.
The curves show quite some spikes, so the noise seems to include random jumps, like reference popcorn noise. So the test for noise should be done with a shorted input. Also noise would better be measured for the 10 PLC mode and thus with less averaging before.
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Yep, the spikes are the main reason I want to change the HP399.
Added some voltages above. It seems the MCU_ADC IREF is indeed small.
The additional noise may come from coupling to the 4n7 capacitor off the MCU package, for example.. Anyhow, the traces are long, the 5V from the 399 divider goes to the AD706 placed obove near the HP array (and 4053) and then it goes back down to the MCU, so perhaps 20cm or more. Therefore I mess with the 4n7 there..
Shot from xdevs.com.. Traces not accurate, demo only..
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..Also noise would better be measured for the 10 PLC mode and thus with less averaging before.
While still waiting for the low TC resistors delivery, I replaced the HP399 with my lowest noise LM399#2. Thankfully it did not jump over this overnight measurement.
10NPLC against myADR1001, raw data with STD sliding 100samples (the std over last 40secs).
4n7 at +5REF removed, the 3u3 at the 5V divider (U401B input) still there.
PS: with shorted inputs at 10V range the std=1.7uV (over 1000 samples).
So at the same level as the measurement above.. The ADR1399 will not help much it seems..
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The 120 nV noise for the shorted input case looks like it is for auto ranging and thus in the 100 mV range. That would be noise mainly from the amplifier.
For check of the ADC and comparison for the 10 V range the more interesting number would be for the manual 10 V range.
The 10 PLC noise of some 1.8 µV looks relatively good for a 34401 and this is already with a 10 V input. With a shorted input one could expect a little less (though not that much).
I looked again at the calculated noise for the 10 PLC case. The µC internal ADC part is still a significant part, but there is also the OP27 current noise as a large contribution at 10 PLC. The current noise specs are not that detailed (only 1 values for 2 inputs with partial correlation). So there is quite some uncertainty in how noisy the OP27 actually is.
There are now alternatives with a slightly lower noise (for some 15 K source impedance at 2.5 Hz) : e.g. OPA205, OPA141 ?. Besides changing the OP27 one would also need to adjust the divider for the different speed (maybe also replace the rather slow AD711 in the integrator).
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.. corrected above.. it went to 100mV range.. ::)
The shorted inputs std I see now is 1.707uV calc over 1000 samples at 10NPLC at the manually set 10V range. So the ADR1399 will not help much, unless we hack the ADC somehow..
Below raw data and std over sliding 100samples.
PS: added a longer STD - interesting fluctuations.. Mean at aprox 1.6uV..
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Replacing the LM399 with a ADR1399 would help with the typical popcorn noise of the LM399. The sample without the visible popcorn noise is the exception and one can still not be sure if it would eventually jump (I have one that jmps about once an hour and yours may be even slower). With the ADC noise with a short the better reference could not help - there a little filtering for the reference is more effective (still a small effect).
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..the LM399#2 (I have in there now) jumps from perhaps 1 to 3x per day (based on three longer measurements, a typical 5uV sharp step up, and then after X hours down, or vice versa).
No idea how the ADR1399#1 jumps, it got perhaps 2000+ hours burnin, but I never did long term measurments with it. Its noise I saw with my noise meter was the half of the LM399#2. The second ADR1399#2 (worse noise to #1) died, perhaps a static or what while I messed with it (it started to fluctuate significantly like mV).
The old HP399 does not "jump in a typical sharp 5uV step", but its random walk is large compared to the LM399#2 (I see "almost" none).
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..
I looked again at the calculated noise for the 10 PLC case. The µC internal ADC part is still a significant part, but there is also the OP27 current noise as a large contribution at 10 PLC. The current noise specs are not that detailed (only 1 values for 2 inputs with partial correlation). So there is quite some uncertainty in how noisy the OP27 actually is.
There are now alternatives with a slightly lower noise (for some 15 K source impedance at 2.5 Hz) : e.g. OPA205, OPA141 ?. Besides changing the OP27 one would also need to adjust the divider for the different speed (maybe also replace the rather slow AD711 in the integrator).
I have here some OPA140, OPA145.. The issue I see with such a replacement is whether the built in "service-guide adjustment" algorithm will incorporate such changes. In a thread in past a perhaps insider had revealed some math used in the meter, with some crazy second and third order coefficients, etc. So the question is whether a simple service-guide adjustment "off the front panel" is enough to incorporate the opamps repalcements.
If yes, I would be prone to replace them.. :D
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I would not expect that there would be any changes be needed to special calibration parameters.
A 3rd order correction term could be there to compensate for a thermal effect of the input resistor. With 100 K at the input one may very well get away without it. So I don't expect this to be an issue.
A U² part could come from the R_on nonlinearity of the HC4053. Again with 100 K this would not be very much (maybe 1 ppm FS, likely less)
This may be a part corrected from the positive 10 V and negative 10 V adjustment step.
An abs (U) part or different gain for the positive and negative side. This may happen from interactions from the switches to the clock. Ideally this should not be much. This may be a part corrected from the positive 10 V and negative 10 V adjustment step. However one could have only one parameter abs(U) or U² from this 2 scale factors.
There is a adjustment factor for the µC internal ADC and integrator gain. This is DNL relatated and may well be the special service mode.
There should be one more factor to take into account how much of the last reference step still counts to before the auxiliary ADC reading and how much is effecting only the next conversion. This parameter would mainly effect the noise, as the last (and first) ref step is somewhat random. It would make sense to measure this parameter together with the µC internal ADC gain.
I see very little effect of the integrator on these parameters. So likely no change needed. If at all it could be last parameter of how to split the last step that could be slightly effected from a change in the settling. Ideally the internal ADC reading should be at a time where the integrator is settled (e.g. just before switching). To get the last step to be 100% effective, the sampling may however overlap with the switching and thus react to settling.
With a replacement of the OP27 one would also have to adjust the divider after the OP-amp because of the different GBW:
e.g. for an OPA140 or OPA141: a larger value for R420, roughly 12 K because of a higher GBW (11 MHz typ)
e.g. for an OPA145: a smaller value for R420, roughly 5.6 K because of a lower GBW (5.5 MHz typ)
With the resistor adjusted according to the GBW, the settling should not change much. It would be changing the AD711 to something faster that could change (improve) the settling.
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The posts of alan.bain on the math and cal constants inside an 34401A:
https://www.eevblog.com/forum/testgear/hp-agilent-34401a-hidden-menu/msg4644106/#msg4644106 (https://www.eevblog.com/forum/testgear/hp-agilent-34401a-hidden-menu/msg4644106/#msg4644106)
https://www.eevblog.com/forum/testgear/hp-agilent-34401a-hidden-menu/msg5130093/#msg5130093 (https://www.eevblog.com/forum/testgear/hp-agilent-34401a-hidden-menu/msg5130093/#msg5130093)
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I assume anything recalculated under calibration process.. otherwise , under manuf. process chips need a bin selection process, it doesn't make sense.
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FYI - latest overnight maesurement with my lowest noise LM399#2 in 34401A, raw data, 10PLC etc. as above. A pity..
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I assume anything recalculated under calibration process.. otherwise , under manuf. process chips need a bin selection process, it doesn't make sense.
Based on the math above there are second and third order coeficients for the curvature compensation of the ADC. I somehow doubt those come from the simple adjustment procedure described in the service manual (like for the 10V DC range - enter the calibration voltage close to 10V and press Enter). I also somehow doubt these coeficients are kept constant during X years of the DMM production (because of the spread of the parts parameters actually used, for example)..
PS: ..my current understanding (perhaps wrong one, btw) is that every DMM (or its motherboard) undergoes a special adjustment procedure during the fab process and gets its own set of "coeficients". Afterwards, the user may adjust "some of them only" during that simple service-manual-adjustment-procedure. This user-adj-proc is intended for simple "linear-like ax+b" adjustments only, like a reference_drift/ref_replacement (ie 399, LTZ1000, etc.) or 10k cal resistor drift/replacement, etc..
So, when somebody replaces some components in the ADC and then shows at the end 10.000000V on the display - the story may not be over..
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AFAIK the normal adjustment procedure has seprate +10 V and -10 V steps that can be adjusted. As in the cal constants there is only 1 gain, the parameter to correct for a difference is via the U² correction term. So that linearity correction parameter is very likely adjusted there. The service manual also states that this step is corrent ADC linearity.
The µC internal ADC is likely also adjusted with the normal calibration: the math looks like the multiply the coarse steps with the number. This would mean, that after adjusting that number one would have to recalculate the "normal" calibration gain factors. To avoid rounding errors it would make sense to at least redo the normal adjustment after the scale factor for the µC internal ADC is changed. It could still be part of a special calibration step, that should suggset redoing gain calibration after this.
The optional 500 V step for the 1000V range is very likely doing the 3rd order correction for that range. This because heating of the divider is a major contribution for this range.
The open question is the 3rd order term for the other ranges. This would need accurate test voltages like 5V and 10 V.
This is likely some factory or special service calibration step, as it is demanding on the testpoints to be better than the intrinsic ADC accuracy.
Because of the LM399 refrence noise the test / adjustment should do several repeats. Even with my much lower ADC it takes quite some time.
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So perhaps next week I would have following components at hand:
47k 0603 10ppm/C - variant A for the RC filter
8k2 0603 10ppm/C - variant B for the RC filter
820 1206 10ppm/C - for the I_1399 (aprox 3.6mA)
5.1 1206 for the 1399 snubber
wima foil red bricks 3u3, 1u, 100n
ceramic 1u/25V 0805 for the snubber..
I think the setup will work for both ADR1399 and LM399. Now what values to choose for the RC filter ?
The 0603 sizes because of the rather limited space on the pcb (will be soldered over an already cut trace near the AD706 U400-A).
Btw there is an error in my schemtics and info above - the blocking capacitor at the +5REF is 10nF in the HP/Agilent schematics (so 100ohm/10nF), not 100nF as I mentioned above. The blocking cap at the 4053 Vcc is 100nF in the HP schematics (so 46ohm/100nF). Was discussed re AD706 U401-B as the power source for the MCU_ADC and 4053.
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The resistor for the RC filter does not have to be stable. There would be no problem using the cheapest carbon type or Pt1000. A moderate change in the time constant is absolutely no issue. Depending on the position on the PCB a large thermal EMF at the resistor could be an issue, but usually not much temperature difference over a 603 size resistor.
The filtering part is a compromise: a larger resistor give additional white noise and some extra drift from drift in the AD706 input current.
A 47 K resistor could be a sensible compromise. The cross over is just low enough to get much of the 3 or 2.5 Hz noise band from the 10 PLC AZ cycle sampling the reference mainly half the time only.
The part of the reference noise that is removed is still not much, especially with a ADR1399 reference.
For the 10 PLC case the noise part would be roghly 2-4 Hz * 50-100 nV/sqrt(Hz) or some 100-200 nV RMS noise that could be removed. compared to the ADC noise this is still only relatively little. So not sure much filtering is really worth it.
Filtering the really low frequencies (like < 0.1 Hz) as seen in logging are very hard to filter anyway. Here the ADR reference would be the main step up.
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I've repositioned the 3u3 at the input of the U401B (powering the MCU_ADC and 4053) to be not so close to the 399 and added the snubber as well..
;)
PS: What to do with the +5REF (of the MCU_ADC) decoupling?
There is 10nF only (I will doublecheck its value on the pcb later on)..
I will try to place an additional 10nF smd close to the MCU directly at the pcb..
Btw., it calls for an additional buffer opamp dedicated to the +5REF, placed on the top of the MCU (with a groundplane on the bottom side of a small pcb)..
All is needed is a small cut of the +5REF trace close to the MCU's pin.
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For the µC Vref filter one has kind of 2 options:
a) large capacitor, so that the voltage does not drop from an ADC conversion. One should also have only a small drop, even for high speed conversions. So one may want less resistance.
b) rel. small capacitor, so that the RC filter settles before the next conversion (e.g. < 1 ms range for the faster modes !)
100 ohms and 10 nF would be 1 ms and thus could be just recovering in time.
Another 10 nF might cause issues (noise) with the very fast conversions. If at all maybe add a lot of capacitance, like 10 µF to be more in the first regime.
One could try something like an extra, buffer for less drop / lower noise, but it is still only a 10 bit ADC with not very low noise to start with.
One may not even need to cut a trace: one could remove the R449 and use the pad for wire. The extra buffer could be from the input of U401B, so not in series with the existing butter, but separate.
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With low noise zeners and good decoupling, I would expect at an ideal situation we see a kind of banding with the ~10bit adc.
Like when the measured voltage will stay within 1LSB of the MCU_ADC for some "longer" duration..
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The auxiliary ADC is used for the difference from start to end. Which values are actually used is kind of random. This way INL errors of the µC internal ADC cause some extra noise there. Also the µC internal ADC is likely not super low noise to start with as it uses a pretty small sampling capacitor. Another point is the accuracy of the scale factor and having 2 difference values.
So I would not expect the overall result to be that stable to see stable values over repeated readings. If at all this may happen with the shortest integration times and thus limited overall resolution. So I would expect a hystogram well wider than just a few quantization steps.
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As the LM399#2 was telegraphing heavily I replaced it with LM399#7 with no morse (yet) but a little bit more noise.
While waiting on the low TC resistors, out of curiosity, I soldered in a 100k (0805 smd noname used, 100-200ppm/C) and fresh wima 3u3/50V red brick (glued in close to the AD706 U400A package).
The resistor did not fit into the extremely limited space therefore I used thin copper wires. The capacitor is wired in with thin copper wires as well. Capacitor is grounded in the same point as the snubber is (snubber is at the bottom side of the pcb). After some troublesome soldering I had not cleaned the pcb (because of tiny preliminary wiring), closed the dmm case (no additional foam hat on the 399) and let it ran overnight.
Below is the result - the expected level was ..135uV (measured before). Done with 10NPLC against the ADR1001#1.
Till the morning it [partially] settled down at aprox ..175uV, so the diff is about +40uV at the "10V", it means the input of the 706 dropped down by 40*0.7= 28uV.
With 100k R it means some 280pA through the R, assuming the C_leakage "much" lower than the input current of the 706, the 706's input current might be say 200pA (at say aprox 45C pcb temp, the aluminum shield above the pcb is at aprox 41.5C).
The initial capacitor leakage and TC may comtribute as well..
The shape of the relaxation after soldering close to the 706's package is pretty similar to the issue I mentioned couple of times - when my 34401 is switched off for a longer period the initial power on follows that shape with an initial up by 2-3ppm and then after couple of days it reaches the expected values. So it seems to me it is caused by the 706 epoxy package stress induced by the pcb.
EDIT: above deleted as it was a wrong deduction. Later on you may see the initial bump up and then relaxiation down is caused by the large leakage of the capacitor in the RC low pass, and the TC of the leakage, and of forming of the capacitor in time. With larger temperature, like 40C in the box, the leakage rampups significantly (it creates large voltage drop on the R and therefore the dmm's voltage reading tops) and then the C leakage slowly goes down (and the dmm's voltage reading goes down as the R drop lowers).
PS: noise with the RC filter - will be measured later on..
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Ok, installed fresh resistors from a reputable vendor, went fine, even the exercise is not for fainthearted makers.. :)
After an initial cleanup I fired up the meter - see below - and let it run overnight. The initial warmup looks pretty different compared to above LM399#7 and preliminary wiring. Below some data.
Note: the meter's 10V range has not been adjusted against my ADR1001#1 yet so it does not show the "proper 9.999896V" but 10.120.505 because the ADR1399#1's voltage is way lower than the HP399's one.
Because of kind of weird results I stopped the measurement this morning and double checked the voltages - ADR1399#1 shows 6.921V and all the other voltages look ok as well.
Now - the issues - the 6.921V creates 10.120500V against my ADR1001#1 reference, so the resolution is 1uV via serial (all my measurements before were below 10V with the "additional 7th digit"), the +5REF is now much lower as well.
The STD below is way much higher (one would say "all over the place") than with any previous 399s, also see the missing code in the TC plot.. With higher internal temperature the STD increases. So we have to investigate.. :o
Note:
- the TC plot below is against the internal dmm temperature during the warmup
- 10NPLC against ADR1001#1
- STD over sliding 100samples (40secs)
- the 47k (RN73R1JTTD4702F10CT-ND) and 820 ohm (RN73R2BTTD8200F10CT-ND) resistors are [should be] 10ppm/C thin film one (digikey), the snubber's R is a piece of manganin wire with aprox 6ohm
- I also replaced one zener dropper in +15V (BZX84C3V3) (was TH).
I let the meter run for a couple of days while thinking why the STD is such huge, and then I will adjust the 10V range against my ADR1001#1..
PS: could it be those resistors are such noisy?..
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When changing the 5 V Vref, one would need a new value for the internal CAL constant for the µC internal ADC. If not one gets additional noise and DNL error (may not be visible for the 10 PLC case, but could with 1 PLC and less). One may see this extra error in the histogram for 1 PLC conversions.
Without a new adjustment ( ? service CAL ?) changing the VREF part significant is no a good idea.
The higher noise could be from this adjustment. The extra noise would also be more with shorter integration.
If there is no way to do the software adjustment, one could trim the 5 V analog and aim for lowest noise with a fast (e.g. 0.02 PLC) mode.
Both the filter resistor and the snubber are not critical for the resistor quality: the TC, excess noise and exact value don't matter. So a +-20% 5000 ppm/K would be no worse. For the snubber parasitic inductance could be an issue, but likely not so bad.
Excess noise does not matter because the resistors see essentially no current.
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The adjustment could be done via front panel, I did it many times before. Of course it must be done, I want to do it step by step.
Hopefully it can accomodate the +5REF change when lower, with higher +5REF it showed "typical STD" without adjustment (with four 399s I had in there, with voltages 7.002, 7.026, 7.063 and 7.23V[MAC199] the STD was inside an say 1.6-2.1uV window).
Btw +5REF "should be close to the MCU_VCC" so the divider would perhaps need some adjustment as well.. No idea what -XXmV does there..
The 820ohm sees 3.6mA (but the zener's r=0.2ohm so perhaps its TC and noise is not so critical)..
PS: [OT] An anecdotal remark: those resistors are "..with improved moisture resistance by high humidity protective coating, low current noise, high reliability.." one. ..so they can keep moisture for a long time.. ;D
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Running overnight with adjusted 10V and ADR1399 (10NPLC) - preliminary..
Below ADEVs (TimeLab), the HP399 one were long measurements at 100NPLC and with larger ambient temp changes during the night.
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After adjusting at 10V range the STD looks similar to that of the LM399#7 - see below.
The difference for integration times below 100secs one can see in the above ADEV.
So my preliminary conclusion:
========================
1. the ADR1399 in HP34401A may help when the original HP399 pops, jumps, drifts too much, or random walks (my case).
2. as Kleinstein indicated couple of times - the filtering around XX399s in HP34401A has minor effect, the HP34401A's noise is dominated by the a) ADC, b) ADC_MCU and c) the DUT (ADR1001#1 in my case, "noisy").
That is visible with shorted input measurement of the STD where it was within an 1.3-1.9uV window. The xx399s and ADR1001#1 added perhaps 200-300nV on the top.
3. the other experiments/hacks may be focused on the filtering or buffering around ADC_MCU, and/or replacing the OP27 or AD711 or both in the ADC..
=======================
I will now let the ADR1399 run for several weeks and observe.
And during our regular summer metrology meetup at my yacht on Frigate Bay Beach we may try with Jaromir to measure his ultra low noise DUTs.
:)
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Replacing only the AD711 would not help much. Replacing the OP27 may help and also replaceing the AD711 would make it easier (or get away without) to adjust the resistors.
It really looks like adjusting the 10 V also fixed the noise issue, likely by also adjusting the µC internal ADC scale factor.
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I may try to play with the decoupling of the MCU_ADC (+5REF) later on when the new ADR1399 settles itself.
Perhaps there is a value of the capacitor C449 (10nF today) where the MCU_ADC's noise is "minimal". Also its increase to a much larger value (like that 10u discussed above) is worth trying.
For the adventurous hackers the adding of a separate buffer in front of the +5REF MCU's input might be an interesting experiment as well.
Replacement of the OP27 and AD711 has to be planned with great care, imho.
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When testing the µC ADC internal noise, it would likely make sense to do the test with 1 PLC or even super short integration. This gives more noise contribution from the µC internal ADC. The 10 PLC case already has some of the integrator noise.
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Btw., I've seen this when playing with the C449 today..
With 10u it was at 5uV std all the time, with 5n6 added (drop by 2ppm) it was lower std than shorted for aprox 5 minutes with box opened. When box closed it goes up to 1.6-2uV std. The lowest std I saw was wandering between 1.23-1.35uV..
The RC filter and powering at the +5REF MCU_ADC needs some tweaking, there is a clear dependance on internal temperature somewhere..
PS: I wired the ADR1001 reversely, the minus range not adjusted. All with 10NPLC.
Orange the std sliding over 100samples.
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1.6 - 2 µV would be a sensible std for the 10 PLC mode. For testing the effects of VREF filtering, I would look at the noise in the 1 PLC mode. This has 10 x the influence of the µC internal ADC and is thus more sensitive to changes at the filtering.
From the µC datasheet the ADC gain is not very temperature dependent. Also the integration capacitor should normall be a C0G type and thus low TC.
One may check how much the 5 V supply to the µC changes with temperature. This might effect the current for the Vref pin and this way the Vref.
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The problem with 1PLC might be the data rate and processing (like the std).. Never tried with 9k6 serial and 1PLC.. I think I have the std in directly the meter's menu, I will check later on.. Enough for today.. :D
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9600 baud should be just fast enough for 1 PLC auto zero date (some 24 or 29 SPS depending on mains frequency).
They give some 55/s for 4.5 digit mode. As the noise in AZ mode is approximately white noise it would not matter if reading are slower with extra delay.
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Below the AC signal at C449 (10n+5n6 cer.), 10NPLC 10V in. DC 4.918V. Box opened. Scope floating (isol.trafo).
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There are quite some spikes in the ref. voltage, that are likely mains frequency related (50 Hz). Are they real or more an artifact from probing.
If it is really in the signal and mains related, I would consider starting to look at the rectifier (maybe reverse recovery spikes from a slow rectifier and sharp edges in mains) and initial filtering. Maybe also look at the normal supply.
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i'm not much familiar with schematic ...
but for U401 , input voltage divider terminated to AGND, capacitor to GND ( can be same of split ground)
I think, R422 are failsafe to avoid negative output during transition process ..
it can be source of noise..
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Re those 20ms peaks - there is a suspicious signal "LSENSE" (most probably sensing the mains frequency) derived from a transformer winding via a 42k resistor and 6.2V zener CR554, fed directly into a MCU's pin.
The 50Hz almost square signal (there is a 100n capacitor parallel to the zener) at the zener is from 5.7V to -0.7V. This may create mess via ESD diodes, imho.
Btw there are aprox 100-300mV peaks of various freqs between all inguard ground segments.. It is a 2 layer board..
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i'm not much familiar with schematic ...
but for U401 , input voltage divider terminated to AGND, capacitor to GND ( can be same of split ground)
I think, R422 are failsafe to avoid negative output during transition process ..
it can be source of noise..
That R422 (46ohm) is a part of the RC filter for powering the 4053 switch in the integrator.. There are 5BV (5V for logic) and 5VB (the 4053 Vcc) voltages.. So the U401B is powering both MCU_ADC (+5REF) and 4053 integrator switch (via that +5VB output).
Above scope pictures are from +5REF signal - power of the MCU_ADC (both ref and digi/analog logic of that MCU_ADC).
Power up is done by R406 and CR404 diode..
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A signal the exceeds the supplies like the Lsense signal is really bad. Even if it does not damage the chip the extra substrate current can cause malfunction, like extra input bias or higher than normal noise. So limiting the LSENSe signal before it reaches the µC can be a good idea (may get away with shottky diodes).
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I wired a 3.9V in parallel as quick fix and the the voltage at LSENSE is from 3.9 to -0.7, but the result is 10.120V instead of 9.999..
This entire meter is build around zeners.. ;D
Would need a 5.1V zener and a schottky in parallel, or those two schottky one..
OK with 2x BAT42 I get 5.30 to -0.38V and it shows 9.999.. I let the 6.2V zener there..
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Some 3.9 V should be perfectly fine for a logical high. No need for more. It is a bit surprosing that the small change had so much effect one the reading - I had expected much less, like only a change in the noise, especially fewer outlyers. An extra schottky diode for the negative side could still help.
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I edited above:
OK with 2x BAT42 I get 5.30 to -0.38V and it shows 9.999.. I let the 6.2V zener soldered there, it cannot harm, as a backup :) ..
BATs soldered from the bottom side, fortunately there is a lot of vias, all are tinned through here (the shot at xdevs.com is from an older revision with many vias under solder mask)..
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I abandoned the RC filter at the input of the U400A (47k/3u3) due to effects introduced by the RC. I removed the other 3u3 at the U401B input as well.
After power on (when the C was disconnected for a day) it ramped up by aprox 13ppm (against 10V ref) in the same manner as shown in my replay #130 and then a continual discharge like process started taking 12+ hours, I never let it come to full steady state (the life is short). It means the voltage at the opamp input was slowly rising.
Most probably that wima 3.3u/50V is not the right C for that purpose, or, does the AD706's input current steal the C's i(R) charging current (plus minus C's leakage current and its TC) somehow??, or.., or mine wima is somehow faulty.
With the RC removed I land within 1ppm in aprox 2hours after the power on.
I also took a bunch of 4u7/50V 1206 ceramics I had in my junkbox and soldered from the bottom side at the +/-15V and 5V lines (against the respective ground segments). In total a dozen of pieces.
I currently let the stuff settle for some time and I will observe TC and the pops/jumps/walks (so far none, keep my finger crossed) with following changes applied:
1. 2x BAT42 for fixing the LSENSE signal amplitude issue
2. decoupling of various +/15V and 5V inguard power lines, 4u7/50V ceramic 1206
3. additional 5n6 ceramics to the C449
4. ADR1399 and its snubber.
PS: ..deleted because of a wrong assumption..
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While playing with the C449 capacitor (decoupling of the +5REF powering the auxiliary MCU_ADC module incl. its reference) I saw with larger capacitors, like 100n ceramic, 4u7 ceramic, 10u tant, that the 10PLC std was always larger, like 3.5-5uV (even after adjusting). With the stock 10n one it is around 1.7uV (walking 1.4-2uV).
I've tried to simulate the situation - see below. Any capacitor larger than 10n makes the voltage not "constant" (but still noisy a bit) during the SAR conversion period.
With the stock 10nF the dip is large, but inside the dip the conversion part (the second half of the conversion clock burst) is "kept at a constant level". Mind the resolution of the MCU_ADC is aprox 5mV (but perhaps 8.5bits ENOB only, imho).
So it seems one would need a fast buffer with low output impedance to get couple of stable LSBs out of it (but important one!!, not counting runup noise contribution). Another experiment could be to replace the stock 10nF X7R with a CG0 one..
The sim is a rough aproximation only as there are most probably other parasitic factors too (resonances, TC..).
PS: the MCU_ADC conv dip is aprox the same level as the spikes in my above scope shot - coming every 20ms with 10PLC..
PPS: the auxiliary MCU_ADC works together with ASIC's comparator, where the runup is organised by the asic such the residual voltage is always around the 2.5V. So the start2end of runup voltages should be centered around the mid of 5Vcc (not the half of the +5REF). So the comparator inside the ASIC might be the another source of noise.
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I went back with the RC filter wired after the 1399, installed the 8k2/3u3 this time (still the same wima MKS2B043301H00).
The voltage topped +30uV against "none RC" after 2h this time, and now slowly dropping.
So the similar scenario as with the R=47k above (where it topped aprx +150uV) which led to say 2.3nA..
With the R=8k2 the current through the R is 30uV*0.7/8k2 = 2.5nA.
So it seems those Wima red bricks (MKS2 3.3uF/50Vdc) are rather leakish, tbh.
I made a naive I_leakage measurement (7V and 10Meg) and with other 3 identical Wimas I saw 160-280pA at 24C (after short soaking). Now, how the leakage increases at ~40+C inside the dmm and where it finishes..
The Wima DS for this type only states >=5Gohm resistance at 10V for this type, which leads to <2nA.
I've found two bulkier capacitors which may physically fit there (0.8u and 1u) where both showed something like 10-20pA under the same measurement..
BTW, a sim is showing identical results with those leakages (with 38pA AD706 inp current)..
PS: a quick hairdryier at say ~50C shows 4-5nA current with one of my wima 3u3/50V..
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I am a bit surprised with that much leakage from the capacitor. with my ADC circuits I have a filter with 4.99 K and 4.7 or 6.8 µF MSK2 with some additional capacitance muliplication (capacitor from some -13.4 V). I have no checked for an effect on the gain, but have not seen slow settling. I actually see surprisingly fast start up (like within < 1 ppm after 1 minute), which in part could be from low power and thus not so much temperatuer rise on power up. There is a small initial delay expected from the dielectric absorbtion that gives a slowly decaying tail to the charge current. This should be on the order of 1000*RC for 1 PLC for 1 ppm and 10000*RC for 0.1 ppm - not exponential settling, but more like 1/ time. That should be in the 10s to a few minutes range and would normally be acceptable.
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.. added above a quick hairdryier test.. 4-5nA with one of my sample at 45-55C roughly.
Perhaps yours are for 100V or 160V, mine are the smallest for 50V..
And mind the temperature inside the 34401A - the AL shield 20mm above the pcb close to the HP resistor array is at ambient+19C, the temp on the pcb 35mm off the 1399 could be several degree higher..
I even added copper fins to the 337 and 317 main voltage regulators, as the pcb temperature on the bottom side beneath them was way above 50-60C (you cannot keep the finger at the pcb there for more than 1-2secs.. and that with the box opened, of course :) )..
PS: aprox 3.5hours of cooling (after the 3-4 minutes of the hairdryier torture) the leakage of the sample dropped down to 60pA (at 24C).
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A new capacitor - 1u yellow noname with 8k2 in RC low pass.
Below the warmup phase, 10PLC, meter was adjusted (no RC) to 10.00V 2 days back.. No overshoot like with the 3u3 Wima..
Mind the STD.. Attacking 1.1uV.. :D
How it would be with 47k/quality_3u3 ??
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There is already quite a bit gained from only a little fitlering (e.g. ref. noise in the 100 kHz range that is also active with shorted input).
The next frequency range that contributed is than already much lower (like < 30 Hz for 1 PLC and < 3 Hz for 10 PLC) and more difficult to filter. It would also only effect in proportion to the input signal. So 47 K and 3.3 µF is not that much more effective filtering - especially not for the shorted input and with a later change to an ADR1399 reference.
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It is not only about the filtering effect but leakage stability as well.
I have here an MKT 1822-15 0.8uF light green brick, still small and easier for mounting than the yellow one (the yellow is nogo from mechanical point of view there). It has got 10-20pA at 24C and aprox 160pA at ~50C. With the 8k2 it makes aprox 0.23ppm diff.
The actual diff is not critical even with 47k (1.4ppm diff), what is unknown is how is the TC of the leakage, its hysteresis, and how leakage is stable long term.
With leakages like 1-2nA at 40C it plays a significant role even with this cheapo gear.. :)
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tantalum smoke yesterday in my 92y 34401 , replaced to all polymer 680x25 ; and the 5v small tantalum as well, as well i noticed an old dmms , with red connectors tend to flipping LSD constantly ,comparing to newer models , it maybe internal chips design better , or in fw. better averaging.
Thinking .. changing caps to large one can be another 2 cents, and u may to look around for 0.1 ceramic that close to opamps, and add some 20-30uf tantalum in parallel, usually it another 2 cents.
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I added about 20 capacitors from bottom side, mainly 4u7/50V ceramics, in 4-6 positions in combination with tantalum drops. There are stock 100nF everywhere already. Of course, the 2 layer pcb did not allow for an optimal routing and decoupling/grounding..
I do not see the flipping of the LSD (red connectors here from '99 US) when talking here displayed value..With serial data I saw ie. 6 values in row with identical values at 10NPLC.. :)
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my REV: 03-01-01
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Mine is 10.05.02..
Below a longer measurement with RC 8k2 and 1u yellow.
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Perhaps the final version - this time 47k and 0.8uF MKT light green brick.
The capacitor glued from the bottom pcb side, first attempt went wrong (there is the bottom aluminum shield, of couse :) ), but hot glued so IPA worked quick.
2.5 hours after the power up it is aprox -0.3ppm below 10V, so lower than with 8k2/1u above (both at 24C amb), that means the voltage at the green capacitor is higher than it was with yellow (less leakage).
Noise wise - hard to say yet, but at the first glance it is attacking 1.2uV STD levels less times, so like the avarage is a little bit higher than with the 8k2/1u_yellow, we will see..
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Mine is 10.05.02..
Below a longer measurement with RC 8k2 and 1u yellow.
Thank you for all your effort.
Anyhow, as I still think that the replacement of the LM399 would give better noise performance, would you mind providing a NPLC100 ADEV diagram, so to have a direct comparison to the 34470A/34465A and the 3458A for me?
Maybe you already did that, then I have overlooked this.
Another hint: it would be great, if you could provide the rms noise = StD numbers inside each of your noise diagrams, like I always do it, like here:
https://www.eevblog.com/forum/repair/fluke-343a-cleaning-repair-and-improvements/msg6212225/#msg6212225 (https://www.eevblog.com/forum/repair/fluke-343a-cleaning-repair-and-improvements/msg6212225/#msg6212225)
Regards Frank
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Frank, I did ADEV above with 10PLC for the RC = 8k2/1u_yellow (1 day long).
I will do the ADEV with 10PLC for the new RC = 47k/0.8u_green.
I will do for ADEV with 100NPLC with the new RC as well (as I use 100PLC usually) later on.
STD - I do a sliding 100 samples window (40secs with 10NPLC) - for observing short time excesses it is ok, afaik. Also its mean is somehow an indication of the noise level.
Note: my all measurements are against my ADR1001#1 reference (~10V).
PS: out of curiousity I've made a sim of the ref noise for various combos below.
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The Allan deviation for 100 PLC would be not much different from the 10 PLC case (mainly missing the shorter time end). 100 PLC are done as averaging 10 PLC conversions and the Allan deviation uses averaging for the time scale. So there is no real need to do 100 PLC Allan deviation separately.
For full noise testing the point is more having the Allan deviation for both with a 10 V external reference and shorted inputs.
p.s.:
While there is some of the higher frequency reference noise (e.g. 170 kHz range) that can contribute, it would only be a few frequenices with an overall small bandwidth (like the ADC input BW). So it is not the integrated 0.1 - 100 kHz noise that matters.
Reference matters for the very low frequency band like 0.001 Hz - 1 Hz as classic reference noise.
Than some noise at around 1/ (2 * time for sample) ~ e.g. 1.2 Hz. This from doing a zero reading half the times and getting thus some kind of aliasing of the reference noise, doubling the noise BW. Due to the higher frequency this noise is not a big issue though.
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First data on 47k/0.8uF RC, 10PLC, first start - warmup.
PS: BTW., the "0.8uF" is a weird value, indeed, but it is written on top of the brick and it showed 0.810uF :) ..
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Tried the 8k2/1u_yellow 1 day measurement with GigaJoe's statistical package.
10PLC, fortunately I've been logging millis too :) ..
I have no clue what all that figures mean (especially the Report) :o, but my nice to have for potential updates:
1. place the printed out picture in the dir from where you run the script
2. an option like -M for reading the time in milliseconds (when using the -S format)..
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kinda a lot gibberish, and same stuff .. but you can look at:
BASIC STATISTICS
mean and median in ideal the same:
Std dev sigma - basically you RMS noise
Peak-to-Peak - it clear
same - min max
Skewness - it gaussian distribution
then you can look at
DRIFT & SYSTEMATIC ERRORS
you voltage +- error , let say
noise floor - MADEV
drift for 24H
24h periodic effect - if you have a long run like 48h or more , it trying to calculate day\night deviation and , add compensation ....
as i said , it basically i did try statistical mambo jumbo to calculate precise value eliminating, noise drift, etc ... i think it need a signific polishing before mass production :)
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A day with RC 47k and 0.8u green.
The temperatures spread was higher this time, so the ADEV is a little bit worse with longer taus.
The yellow capacitor was mounted above the pcb, the green on the bottom side of the pcb.
The mean of STDs (each sliding over 100samples) over entire measurement:
8k2/1u 1.48uV
47k/0.8u 1.45uV
PS: that tooth didn’t disappear — it went on vacation to Tooth Fairy Island.. :)
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Here is the comparison of three ADEVs (see the description in the graphs).
The 100NPLC with the ADR1399 measurement has just started and I will update the graph here with time..
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so your minimal noise 30sec samples as a single window, it takes all samples and apply this windows , getting "effective N" as average per window 321 in you case , than we calculate resultant and uncertainties in your case 0.1 microvolt
as best estimate ,and mean identical , it suppose almost ideal gaussan, non ideal are drift ..
spikes sanitized - 12841 samples as out of ordinary , and replaced by average.
in the text output you may find out calculated drift per 24h ,
that missed bin in gaussan - no numbers ? hm ..
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The missing bin in the histogram is odd. From the graph it looks like all levels are there. So the missing bin could be a rounding (e.g. convert to float and round back to the same resolution) issue with the SW generating the histogram.
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The 34401A does not return all numbers (when talking 6th and 7th decimal digit in case of voltages <10V) - see the thread on 34401A digits.
Below the .zip with .csv 624k samples from the measurement with missing bin.
Time, Elapsed_millis, DMM_temp, AMB_temp, DMM_voltage_raw (in exact string as it comes from 34401A serial).
You may investigate..
PS: the math inside 34401A is int32, with many tricks to fit into. It seems the final floating point format printed out via hpib/serial is simply formatted off that int32 math..
See - 95% of the voltage values (in that 624k samples) have got only 7 variants of the last 2 digits pairs ::) :
Observed digit pairs:
---------------------
26 : 139231 ( 22.31%)
36 : 120347 ( 19.28%)
15 : 118180 ( 18.94%)
05 : 74726 ( 11.97%)
47 : 71851 ( 11.51%)
94 : 37887 ( 6.07%)
57 : 29695 ( 4.76%)
83 : 15619 ( 2.50%)
68 : 8346 ( 1.34%)
73 : 5014 ( 0.80%)
78 : 1588 ( 0.25%)
62 : 1209 ( 0.19%)
89 : 203 ( 0.03%)
52 : 184 ( 0.03%)
41 : 24 ( 0.00%)
99 : 17 ( 0.00%)
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As the 100PLC looks almost identical as the 10PLC (see above the ADEV live) let me wrap up the HP399 replacement exercise:
1. the noise in 10V range at 10PLC and 100PLC went down by say 30%
2. in the RC lowpass after the ADR1399 the leakage of the C is extremely important, should be lower than 100pA at 45degC for best performance
3. the higher the R the more the leakage of the C is pronounced, the leakage and its TC (and other effects related) may create nasty slow fluctuations and hysteresis
4. the minimal RC configuration I would consider is R=10k and C=100-470nF (ie. MKP one with low leakage)
5. I would avoid Wima X.XuF red bricks for 50V= which have small physical size but large leakage at 45C..
The additional attempts to decrease the 34401A's measurement noise may include:
a) adding a fast buffer into the +5REF of the auxiliary ADC
b) replacing the OP27 and the AD711 in the integrator (with the divider ratio change based on the opamps used as per Kleinstein's advise above).
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As the 100PLC looks almost identical as the 10PLC (see above the ADEV live) let me wrap up the HP399 replacement exercise:
1. the noise in 10V range at 10PLC and 100PLC went down by say 30%
...
The additional attempts to decrease the 34401A's measurement noise may include:
a) adding a fast buffer into the +5REF of the auxiliary ADC
b) replacing the OP27 and the AD711 in the integrator (with the divider ratio change based on the opamps used as per Kleinstein's advise above).
Noise improvement is only as I expected recently: https://www.eevblog.com/forum/metrology/hp-34401a-hacks-and-upgrades/msg6245077/#msg6245077 (https://www.eevblog.com/forum/metrology/hp-34401a-hacks-and-upgrades/msg6245077/#msg6245077)
Yes, please check the newer OpAmps, if they are giving any improvement.
Thanks for your research!
Frank
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..Yes, please check the newer OpAmps, if they are giving any improvement.
The replacement of the opamps in the integrator has to be planned carefully.
Without having some indication (off an analysis or a simulation) the improvement will be, say, another at least 30-50%, I most probably will not do it.
When playing with the 1399 only there is always a chance to revert the changes back without introducing some irreversible effects.
My measurement/adjusting options are limited today so messing with the ADC's opamps is an exercise perhaps more suitable for people with easy access to high-end gear (to evaluate the impacts of such a change)..
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I just put the numbers in my spreadsheet for calculating the ADC noise. The numbers are not super accurate, as some numbers (e.g. jitter, µC noise) are just not known. At least the not op-amp related part is the same in both cases.
With the original OP27 it gives 1.39 µV RMS for 10 PLC (and shorted input).
With noise data of an OPA140 (13 nV/sqrt(Hz) at 2.5 Hz) it gives 0,97 µV.
With noise data of an OPA205 it gives 0,96 µV.
That would be around 30% less noise for 10 PLC. Starting with a little more measured noise (1.5 µV) this could mean more noise from other source (e.g. jitter and the µC) and thus a bit less noise reduction.
There is still quite some uncertainty on the OP27 current noise, as the main noise source from the OP27. I assume 4.5 pA/sqrt(Hz) at 2.5 Hz as the effective frequency for 10 PLC (50 Hz).
So I would expect roughly 20-40% noise reduction for 10 PLC.
For 1 PLC the difference would be quite a bit smaller as the µC internal ADC would dominate and there is less current noise at the higher frequency.
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The OPA205 has almost the same GBW as the AD711. Would it not introduce some instability/ringing etc? That may require different compensation of the opamps (ie. messing with caps and/or increasing the divider ratio between 205 and 711 somehow)..
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The OPA205 would be a replacement for the OP27, not for the AD711.
In the 34401 the OP27 is used for the precision part. That OP-amp needs low noise also at low frequencies, with a source resistance of some 15 K.
The current noise is the weak point of the OP27, especially at the relatively low frequency of 2.5 Hz for the 10 PLC mode.
The OP27 has a divider 8.2K 1 K behind it to effectively slow it down to a bit under 1 MHz. So the replacement for the OP27 should have at least 1 MHz GBW, ideally a bit more. The OPA205 is a little slower (3.6 MHz vs 8 MHz) and would thus want less divider (like 3 K and 1 K - may need to tweek it a bit) if used with the AD711. If it rings too much, one might want an extra 100 pF + 220 ohm to ground at the integrator input.
The AD711 is only the 2nd OP-amp in the integrator and essentially only needs to be fast and low current noise (e.g. any fast FET type would work).
The AD711 is a bit odd choice here. Faster would be better, but could have been a cost factor.
A slightly faster OP-amp would speed up settling / have less ringing at the integrator input which should not have a negative effect on INL. It would make the divider less critical, with an easier balance between speed and ringing for the integrator.
There are now many FET types with GBW in the 10 MHz range to choose from (e.g. OPA172, OPA197, OPA141, OPA1641). I don't like the TLE2071 very much as it gets extra supply current when saturated to one side. The OPA1677 would be OK, but AFAIK is not available in SO8.
Good combinations are:
OPA205 (in place of OP27), divider R420 -> 2.2 K and an OPA172 / OPA141 / OPA1641/ OPA197 (a bit lower power) in place of the AD711
or
OPA140 or OPA141 (in place of OP27), divider unchanged and an OPA172 / OPA141 / OPA1641 / OPA197 in place of the AD711
For my ADCs, I have (or had) working combinations with OPA145+TLE2071, OPA1641+OPA172, OPA141+ 1/2 of OPA1642. The later 2 are with a 6.8 K / 1 K divider, but 8.2 K and 1 K would work too.
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Here is a new hack: VFD replacement!
https://www.youtube.com/watch?v=MFfk2P_R7ck (https://www.youtube.com/watch?v=MFfk2P_R7ck)
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Another hack with the above LCD display could be to introduce median instead of the average HP natively makes in order to get their 100PLC and add the 6th decimal digit as it comes off the hpib/serial (but not sure the VFD protocol supports the 6th).
Easy to add into that stm32F103 used in that LCD controller.
Below ADEV at 10PLC with median vs the native 100PLC (I do the median in my stm32F103 hanging on the serial output).
You'll get a different meter :D ..
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..For my ADCs, I have (or had) working combinations with OPA145+TLE2071,..
@Kleinstein: what your excel calc would show for the OPA145+AD711 and OPA140+AD711 combos?
PS: asking as I have the 140/145 handy and the 711 is not so off of the others in that position (like 16V/us vs 20V/us, not sure how it is with settling time). The 145 is a little bit worse in TC of its offset against the 27 and 140. Also the input current of both 140/145 will rise 4x inside the box (compared to ambient).
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Noise wise the "fast" OP (AD711 in 34401) in the compound integrator should not matter. At least I don't have it in my calculation. It may have a small influence for the noise the µC internal ADC sees from the higher frequency part, but this should still not be much. The µC internal ADC is way more noisy than the AD711.
The OPA145 has marginally higher noise than the OPA140/141, but the difference is not large and one would hardly notice the difference.
The main point of replacing the AD711 would be to make it easier with the stability. With the OPA140 + AD711 one would have to tweak R420 (about 9 - 12 K range) and maybe add a RC element to the integrator input.
Ideally it should not be that tricky as it worked with the OP27 / AD711 combination. The relevant frequency should be some 1 MHz. The phase reserve around 1 MHz for the OPA140 should be even a bit higher than for the OP27. The OPA145 has a little less phase reserve, but still similar to the OP27.
If the combination OPA140+AD711 causes too much ringing, one could still change the AD711 to something like OPA141 or OPA172, which would make it easier (R420 = 5 K .. 10 K should work) to get a stable and fast settling solution.
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..and finally the STD and ADEV with shorted inputs..
Edit: added ADEV/MADEV with more samples..
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..and finally the STD and ADEV with shorted inputs..
Could you apply the variation study to the "data from the top image"?
I am curious about the "value" and how it improves with subsequent modifications, is there a trend visible?
variation-analytical statistics ---- Homoscedasticity_and_heteroscedasticity
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..let us wait on the improvements in the Statistical Package from GigaJoe, perhaps he will put there the variation analysis.
So far the trend is visible, the mean of the sliding STDs went down from 1.85uV to 1.45uV (with 10V ADR1001 input) and with the shorted input it is 1.39uV.
PS: Out of curiousity I asked Chatgpt to say something about the ADEV picture above and it basically said "..the taus till tens of secs are not dominated by the OP27's input current flicker..", "..the replacement of the OP27 with OPA140 may show some improvements for taus in the region of 100-5000 secs..".. But generally it suggests to be not overly optimistic about the result of the OP27 replacement..
The Grok in opposite said "..The dominant 1/f signature across this tau range (~1s till thousands of secs) aligns strongly with input current noise from the OP27 (bipolar) interacting with the high source impedance at the integrator summing node..", "..Probability of noticeable improvement: Quite good — I’d now [Note: after I told him the AZ was ON] estimate 18–35% reduction in the mid-to-long tau ADEV region and in the sliding STD average. Realistic target after swap: average sliding STD around 0.95–1.20 µV, with the ADEV curve shifting downward nicely in the 1–1000 s flicker region.." and it recommends me the swap of the OP27 for the OPA140 as the first step..
PPS: added NSD with the shorted inputs (the data are same as the above ADEV)..
================ NSD ANALYSIS ================
Samples : 194427
Start time : 0.000000 s
End time : 78594.275000 s
Median dt : 0.404000 s
Estimated fs : 2.475 Hz
Record length : 78594.27 s
DC mean removed : 9.976697e-06 V
RMS noise : 1.396133e-06 V
Integrated noise : 1.395591e-06 V_rms
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A sim with the 34401A's ADC - OPA140+AD711 with various R420 and R421.
This is not multislope (the ASIC logic is missing), but a sim for a look at signals around the opamps with different R420 and R421.
PS:
a) the first R parameter in the list is green..
b) the COMP goes to ASIC's comp set to 2.5V
c) the CMP goes from ASIC to the 7474 Data input (synced by clock)
d) the 7474's creates 2 sigs for B and C inputs of the 4053 switch (switching the current sources)
e) FLASH goes to the MCU_ADC
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The OPA140+AD711 integrator seams to not ring very much even with a 6.8 K / 1 K divider. How accurate the models are is still open. At least it suggsets that R420 is not that critical. So one could try even with the original 8.2 K for R420 first. From the simulations the R420 = 10 K looks slightly better, but not very much difference.
How the divider is adjusted (R420 or R421) should not make a difference. It should be only about the ratio.
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This with the OP27 and various R420s..
It looks like the edges are a litlle bit "lazier", say 100-200ns.
PS: added with OPA145 and R420 - the slowest variant..
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:palm:
OPA140 installed..
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All 10PLC against 10Vref (ADR1001#1).
ADEV/MADEV later on when DMM temp stable (so far ADEV at 1sec went down from 900nV/OP27_1399 to 613nV/OPA140_1399).
Sliding STD went down from 1.45uV/OP27_1399 to 1.0uV/OPA140_1399.
The 10V reading went up by ~45uV with OPA140_1399.
SHORTED inputs at 10PLC and 10V range with OPA14_1399 below..
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The noise improvement is about what was expected. It may be a bit more visible with the shorted input case. It is a bit surprising to see so mauch change in the gain / absolute reading at 10 V.
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Shorted inputs above..
STD with shorted input at 10PLC went down from 1390nV/OP27_1399 to 895nV/OPA140_1399.
Note: Last weekend I zeroed front/rear, btw. (was +9.7uV off).
I wonder what I can gain from playing with the R420..
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R420 could improve the settling speed a little. However the simulations did not show much ringing (the AD711 seams to be somewhat well behaved as integrator and maybe was choosen for this reason, despite of low speed).
One may want to check the DNL again (e.g. at 1 PLC or even faster). More ringing could have an effect on the INL.
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I now run an overnight+ measurement to get some ADEV/MADEV at more stable DMM temp.
I've also adjusted the 10V range to my ADR1001#1 voltage, thus we will be below 10V.
Next step will be to look at the OPA140's output with my scope as it is accessible from the bottom side of the pcb.
BTW: do we have a description of the MS_III algo they use? Perhaps I will try to write a state machine in LTspice thus we may simulate a complete measurement. The ASIC has got only 1bit input (say the COMParator's output) and 1bit output (into the D of the 7474 which creates then 2 bits for the 4053) related we need to handle there..
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The feedback part of the ADC is relatively simple, but I don't know the exact time when in the cycle the comparator is read. One comparator reading decides between the 2 possible PWM ratios. The exact time should not matter much. One would not even need a complex state machine: mainly another flip-flop and clock to latch the comparator and clocks to control the set / reset signals of the 7474 FF.
I don't know exactly when the µC ADC is reading the residual charge. My guess would be somewhere in the fixed part of the patter, like just before the variable part that changes with the comparator starts.
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This is a NSD from first measurments with OPA140 - I wonder where those 2 strong lines are coming from.. :o
Could it be a beat with the master ADC clock related stuff and 50Hz mains?
Or multislope related beats or tones?
PS: added similar with OP27..
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..and the ADEV/MADEV OPA140 vs. OP27..
NSD as well with 2 mysterious tones.. (??)
All 10PLC against ADR1001#1 (10V).
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The low frequency peaks (if measured with a shorted input) could be some kind of idle tones. With a zero reading the PWM ratio is close to 1:1 and the remaining small difference gives a slow drift that than from time to time gets reset with an extra phase. This can give a rather low frequency. With zero input the AZ switching is not disturbing this, as both conversion are for a zero reading.
Ideally the ADC should not care about the integrator average voltage shifting, but there can be small nonlinear effects (e.g. DA, loading) and also the maybe not perfect scale factor for the µC internal ADC that still gives a small error.
The OP27 and OPA140 will have a slightly different offset and bias current and this could be enough to shift the frequency.
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Above are the idle tones with 10V input.
In my replay #187 there is NSD with shorted inputs and OP27 and there is an idle tone at aprox 0.15Hz.
The tones are rather large amplitudes, btw..
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OPA140 output..
AD711 output (after the 3.16k resistor)..
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I installed the thin foam insulation (around the inner frame) I've been using since 2019 (not used during the above experiments in the last 3 weeks). Here is the initial experiment (https://www.eevblog.com/forum/projects/thermostating-the-hp-34401a-meter/msg2619108/#msg2619108) with it. It supresses the noisy thermal flows inside the box.
After installation of the foam the 2 idle tones above disappeared and I see only single one (smaller in amplitude) on a different freq. I repeated that 2x, so it seems it is temperature related (perhaps thermal oscillation?)..
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It does not need much to change the frequency of the beating from the idle tones.
Thermal oscillations are possible, but a frequency in the 0.5 Hz range is relatively high for this.
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..
It supresses the noisy thermal flows inside the box.
After installation of the foam the 2 idle tones above disappeared and I see only single one (smaller in amplitude) on a different freq. I repeated that 2x, so it seems it is temperature related (perhaps thermal oscillation?)..
I'll have a look in your link afterwards.
I'm surprised, that there should be a thermal flow inside, w/o a fan and a completely closed case.
In the 34465A, Keysight made exactly this thermal design flaw, i.e. the fan blows exactly across the reference and the aligned circuit |O, creating a lot of noise. I added a plastic box all across this reference area, problem solved.
Maybe, that's a solution for you as well. Sorry, I haven't got the link to my article right now.
Frank
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I've just studied your other thread.
That seems to be a different story.
I think, your solution with the inner insulation is counter productive, as it rises the inner temperature too much.
The problem with all (high) precision bench meters is their T.C., which are in the same ballpark, even for the 3458A, 8508, etc.
The 3458A has an overall T.C. in its 10V range of about 0.5ppm/°C, mine has 0.45ppm/°C, lower grade ones are more like 1..2ppm/°C, both is not great.
Other 8.5 digit meters, like the Datron 1281 has probably a slightly lower T.C. 0f 0.25ppm/°C as well in the 18..28°C temperature range (oddly specified), as a lot of Vishay BMF had been used, but its direct descendants 8508A, 8588 etc. have as well a T.C. of 0.5ppm/°C, but they are not able to adapt to varying room temperatures, like the 3458A.
Mine has about 0.15 ppm/°C from the reference and 0.3ppm/°C from the A/D circuit; latter can be corrected by ACAL.
So I could reduce its reference T.C. to zero, and would be left with the 0.3ppm/°C for the A/D for the experiment run.
Therefore, high precision drift experiments well below 1ppm are not much easier, neither my regular transfer measurements of 12 sources within about 20 minutes transfer time.
Your room is not really a lab environment, isn't it?
I have a basement lab with constant temperature (+/- 0.2°C for an experiment run over 24h, +/- 2°C over the whole year), no draughts as window and door are always closed, so I don't have any problems with either the 34401A, nor with my 3458A with air draughts and I can handle the T.C. issue quite well. Over these 20minutes, the R.T. does not change more than 0.1 .. 0.2°C (caused by the operator in front of the instrument), so the drift is currently limited to max. 0.1ppm transfer uncertainty.
Concerning these fast variations you see, when you have a breeze inside your room: Do you have the handle installed?
W/o it, that would be the only way, how an outside breeze could enter the instrument and create such short termed disturbances. Otherwise, my 34401A is completely tight (handle installed), and I could not figure out, where otherwise the outside breeze could enter.
The best and only chance for you is to have a better room with mostly constant R.T. during experiments, no air draught in the lab, always monitoring the R.T, and best the inner temperature of the 34401A, as I do it with my setup and the 3458A.
Currently, I leave my 3458A always in CAL mode. If I want to make very precise absolute measurements, I make an CAL 10 against my reference bank before the experiment. Nor the 3458A neither no other DMM is a 'standard', anyway, just an adjusted scaling device with quite bad uncertainty.
So maybe you could do it the same way, if you have a reliable and "better" external reference available.
Another idea is to do RATIO measurements against a known good external reference with the usual low T.C. of about 0.02ppm/°C, so not to compromise your calibration. The 34401A also got this feature, and that would delete all such T.C. problems, additionally its uncertainty problem (35ppm/y.) using the 34401A as a scaling instrument only.
Btw.: Please try out this great RATIO function, by ignoring its mediocre and sloppy specification by HP. This is a real hidden gem, if your DUT uses as well the same 10V range, as the reference voltage on SENSE.
In this case, not the individual 24h or 365d specification applies, but the transfer specification.
For the 34401A, even latter is as well very sloppily specified.
The 3458A has 0.1ppm transfer spec, for 10 min +/- 0.5°C.
This includes both, its INL of the A/D, i.e. 0.02ppm of range plus temperature drifts over 10min.
Therefore, the RATIO function on the 3458A should give even better results, as 2 consecutive measurements are made, within a few seconds. So, you' re even left basically with the INL error of the A/D.
Same applies to the 34401A. Its INL is specified as 2+1 ppm, but my unit is
about 0.5ppm only.
Therefore, using RATIO on the 34401A might give an additional (to the reference's) uncertainty of 0.5ppm of range and practically zero T.C.
Frank
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There can still be thermal fluctations and even thermal oscillations with a close case. I have seen this would by DIV DMM with also a close case of somwhat comparable dimensions. In my case I got some 0.1 Hz and 5 mK range amplitude. This is with low power (some 3 W) and with higher power in the 34401 it could be larger amplitude. Another point is that the amplitude can change with location, and more massive parts could not follow very fast.
Due to the often small amplitude I would not expect the 34401 to be much effected from thermal oscillations - it could be a thing for the 100 mV range and maybe the related 34420 nV meters.
Thermal isolation is not a good idea, as leakage currents tend to go up with temperature and it would cause more temperature swing from warm up and thus more warm up drift. Quite some of the older meters without a fan already ran a bit warm to start with.
To reduce thermal oscillations it would be more about adding metal shields / heat sinks that better conduct heat and this way reduce heat transport via convection flow.
The TC of DMMs can vary quite a bit between individual units. To a large part there is TC matching involved and the error there can go both ways.
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in my understanding his case a bit different , as the device has internal temp sensor, and he calculated compensated voltage taken over GPIB and temp. sensor. havin constant voltage source kinda simplistic to build a correction curve per specific range.
@iMo:
have you disassociate voltage regulators from PCB ? i think it also produce a temp gradient ...
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My thermal insulation does not increase the inner temperature much, perhaps 0.5C at the aluminum pcb shield. The meter follows the ambient so the ambient changes are way much larger than the difference caused by the insulation. It is about 2mm thick foam, from one side "hairy".
It supresses the temperature fluctuation measured at the aluminum pcb shield strongly, no doubt.
My understaning is there are intense flows between the pcb and outer box without it.
I am not saying there are there thermal oscillation in the electronics, but they could exist.
The thermal shielding affects the "idle tones", indeed. I will investigate more..
DMM TC compensation - I am not doing any TC comp with 1399 and OPA140 yet, that is a difficult exercise. It will be done after finalizing the replacement exercise and after the final adjustment.
With HP399 inside I made TC comp and it worked fine. The TC was aprox +0.47ppm/K, with the 1399 it looks be lower. With the HP399 meter did +6ppm from cold, now it is +3ppm. Not sure what was the contribution of the OP27.
>>> have you disassociate voltage regulators from PCB ? i think it also produce a temp gradient ..
Everything inside is producing temp gradients. The pcb is hot for touch even opened. Not only around the voltage regulators. I would not allow to pass the meter into production as-is, frankly..
PS: yep, I know it was created to be cheap..
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..
Btw.: Please try out this great RATIO function, by ignoring its mediocre and sloppy specification by HP. This is a real hidden gem..
Yes, I reported the same couple of months back last autumn here (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg6084435/#msg6084435) (using ADR1001#1_10V as the ref), the ratio works nice even the math is not float64. I will do it again after I close this exercise.
PS: here is a sliding STD over 10samples (40secs) at 100PLC against my Vref ADR1001#1.
You may guess when I was not sitting in my lab working with PC close to the meter and Vref.
My cable is twisted copper, copper to copper into the 34401A, but nickel to copper at the ADR1001#1 box Vref.
Also the other thermals and EMI apply.
:D
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As the leakage of the capacitor in the RC low-pass (placed at the front of the AD706 in Vref) seems to me the most critical component (its leakage) in the above exercise I replaced the 47k by the 8k2 again (after a brief chat with Kleinstein).
Below a run with the 47k and 8k2 (both with the 800n green MKT capacitor, 10PLC).
Both measurements aprox at the same ambient temperature spread profile (mean with 8k2 by 1degC higher).
On the first glance when looking on the 10PLC raw data with the 8k2 are a little bit more hairy, the mean of the sliding STD (40secs) is higher by 10-20nV. The NSD's knee of the 8k2 version at 0.1Hz is higher by some 15-20% as well.
What is different is the "longer term stability" which varied some 8uV with 47k, and only 2.5uV with 8k2. That is visible on the ADEV too. My bet that is caused by the capacitor, which could be forming itself (the 8k2 measurement was made after the 47k one), and/or its leakage is still high (and depends on temperature exponentially).
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The variations on the longer time scale can still depend on the enviromental variations. This can be the temperature, but also wind and the use of doors causing pressure variations that effect the temperature inside the case by fresh air comming in / out.
There can also be just random variations with the ADR1399 reference.
So much of the small difference between the curves may be just random and not directly from the resistor change.
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Back to ADC, op-amp replacement , would this variation be better: OPA140 → (same divider) → OPA1655
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Noise wise there should be essentially no difference between a combination of OPA140 with AD711 or OPA1655.
There might be a small difference with the linearity, but it is not clear. It may as well not be the limiting part.
For the combination OPA140 (11 MHZ) and OPA1655 (55 MHz GBW) one would ideally also change the divider a little.
The ADC design is limited by the feedback pattern set by the ASIC and the µC internal ADC performance. It is just not made for high performace, but for low cost at it's time.
There is a point where a complete new build is easier (and can get better performance) than tweaking the old ADC with its limitations.
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DC amplifier module 3, make sense to replace ?
U106-A OP27
U103,U153 AD706
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There is little need to replace the amplifier parts. The amplifier is not great from the overall design (source followers and OP27 behind), but it is also not that bad. U103 and U153 are not critical - here already the AD706 is overkill.
The 104 K for the protection give likely more noise than the amplifier. For symmetry reasons the amps ranges also have a 100 K resistor in series.
One could have a look at the 100 mV or amps range to check the amplifier noise, but I would not expect a weak point here.
With the 34401 the amplifier is a bit less critical than with the Keithey 2001, as they do the AZ math better (though simpler) and are thus not as sensitive to 1/f noise.
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Later 34401As (including mine) seem to have a different input amp with a bootstrapped OPA130, as detailed here: https://www.eevblog.com/forum/repair/34401a-bumbling-repair-attempt/msg3739384/#msg3739384 (https://www.eevblog.com/forum/repair/34401a-bumbling-repair-attempt/msg3739384/#msg3739384)
Any comments on whether it's worth looking to improve that version? (No idea whether the newer amp is better or worse than the old JFET one)
Or the ADC architecture still makes any change futile?
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An upgrade of the OPA130 might be worth it. The obvious upgrade that is also suggest by Ti is the OPA145.
From my experiance with a bootstrapped amplifier is that it might help to limit the voltage range (e.g. a dual zener where C1 is).
I would still first test how noisy the 100 mV / 1 A range is. The improvement would be mainly with these ranges with gain, not with 10 V range.
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Thanks, the OPA145 recommendation lines up with my thoughts too (lower BW compared to options like OPA140 is probably a good thing here I'm assuming). I assume the dual zener suggestion is in case there's potential instability in the boostrapped amplifier (especially with an opamp change)? I'd assume that say ~15V would be about right here?
If I do mess with anything I'll certainly do some testing on the more sensitive ranges first (and try and do some comparisons with other meters first before I mess with this one, probably best to leave it well enough alone if it's still within say 1yr cal specs, as I'd rather avoid adjustment if I can).
I will be going ahead with similar changes on some other meters (e.g. my Keithley 181 with bootstrapped AD542 as an input amp, though I'm sure that's far from the worst issue in that meter given the late-70s/early-80s design!)
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here is translation:
HP34401A A new version DC amplifier circuit
This opamp OPA130 (or TL071C) has a servo circuit added to maintain a consistent input bias
under different input voltage so it can be removed.
I maybe miss something .. but it seems incorrect .... i maybe wrong as I didn't trace it.
but TL071C are output of "XADIN" as inversion of of "ADIN"
where R196, R197 are same as old schematic...
voltage drift for OPA130 2-10 uV/C
same for TL071C + more noise ...
OPA140, 145 in my view would be much more suitable ...
can be OP27 -> OPA189 ?? ( i know it chopper, but how much input switching ( 10k load) and noise in theory may affect
BTW. changing opamp , basically changing offset + temp drift ... so your CAL data will offset in some scale of offset difference + amplification for that region ...
again im not 100% but it seems DC only, so if you have a second similar device , you can measure something stable by second device record # for first and second, change chips on first
set voltage exact as was recorded by the second unit, and for adjustment punch an input voltage on first unit as it recorded initially ... i think it will work ..
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Thanks, I didn't spot the TL071C (will need to look in my own meter) - I assume it's non-critical though as it's just biasing the comparator point for U501?
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you mean "XADIN" - for comparator , for "0" cross comparator ?
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Yes it looked like XADIN is just for biasing the comparator, though I only had a quick look at the service manual. I am not quite sure why they are using the inverted input for this.
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The XADin signal is not critical. So the TL071 is good enough there (even the new 071H would do).
For the actual amplifier the OP27 should be good enough - it is well tested (the 34401 has a relatively good reputation when it comes to INL).
With the 34401 the 1/f noise is not as critical as with the Keithley meters and the impedance is not too high, though 10 K are on the high side for an OP27.
The extra zener idea is just in case if there are issue (like stuck at one rail with not enough supply to the OPA145 left after power up) - it would be 13-14 V types, 15 V with the extra forward diode would already be rather high. The transistor circuit may well not be susceptible to this issue.
The OPA130 specs for the noise are still only 50 nV/sqrt(Hz). This is not great, but not that bad with already 100 K from the prodection that give a fixed 41 nV/sqrt(Hz). So lower noise would help, but not a huge difference. How noisy the amplifier actually is can still vary - not all units are the same, especially in the LF range.
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any advice on replacement MC34081AD , it running on 37V .. TLE2141AIDR - ?
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..read the TLE2141's revision history (Chapter 8 ) first.. :D
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oh .. another ne5532 ...
so what would be an option to replace MC34081 in the input amplifier .. +-Vs exceed 36V
im battle with sporadic noise of one 01A , it not gaussian at at all , random\sporadic, can go to 20-30 LDS on 10V ( count it you see +100 microvots, P-P 300uV , but may show exact # for a couple iterations) , amplitude related to input voltage lowest at short highest at 10V input.
my highly suspicion it custom HP chips internal problem, but having some effort to cross all stuff around it ..
so far im curious about MC34081 ; settling time spec probably most important for that particular application .
and N-channel dual JFETs - consider it SST404
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The MC34081 in the Dc input amplifier should not be that critical. Chances are one can get away with a TL071H. It is a bit noisy, but should be OK with the high supply. I don't see a real need for very high speed.
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well it doing this ... (upper level cut )
so I'm thinking need something with good settle time .... ( my second thought to pimp it -up , so I'm playing with component on not a good one , to see how they fit )
(https://i.postimg.cc/fy96JkFB/SDS00014.png)
so far mad scientist list of change:
all tantalum to polymer 600uF
any 18 V shorted by electrolytes ( 4-5 i think ). (actually positive, especially one ceramic that shorted+ and - 18, 36V total, i add 2 polymers 100uf )
ADC: ADA4523-1 + OPA1655 - compare as much a i can against 34411A , consider wild noise , so far seem linearity not destroyed, no oscillation.
DC gain - ADA4522-1
AD706 - ADA4075-2 , 5 in total ( dont like 3uV \ temcp , but for a test ok )
left:
74HC4053D
MC34081
SST404 ( ..5 , ..6 ) will try - LSK489 ( what would be as a test replacement for SST404 one , even 2 discrete N Jfet , any at 50-60 V)
so again, assumption HP chip behave , or some PCB vias - not likely, as i apply forces there and there - it indifferent
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All those changes to the 34401 roughly bring down the 10 PLC noise from some 1.6 µV ? for the original to some 900 nV and hardly below 850 nV with even more changes. The one small change that may still make some sense would be changing the 74HC4053 to an SN74LV4053 (Ti version). This would reduce the jitter. In the spread sheet I get a noise drop from some 890 nV to 860 nV. This is not much, but may still be visible. The design just reaches its limits.
The ADA4523 is not a good choice at the integrator, because of the current noise. In addition the switching spikes (from the AZ OP and reference switching) can cause upsets and interference in both directions. With the resistors for input protection there in limited use of a lower noise amplifier. Similar the ADA4075 would fail due to too much current noise for the relatively large resistors in the reference amplification. An ADA4077-2 or OPA2205 would be the better upgrade (but still only a rather minor effect).
When you consider changing so much, not much of the original is left and one could as well build a new DMM or DVM. This would allow to also change to parts that are really limiting: limited ADC resolution at 1 PLC, resistor ratio at the ADC that causes a high noise gain and the related run-up pattern with relatively little variable part, the rather high feedback frequency that makes jitter and non ideal reference switching more of a problem.
As a complete new design my DIY DVM gets a noise of some 500 nV for 1 PLC. I have not tested 10 PLC and averaging gives the sqrt(10) advantage from oversampling or some 160 nV. The main improvement is from less noise gain at the integrator and more resolution already at 1 PLC (from an extra rundown step before reading the residual charge). The core parts, like LV4053 switches, OPA141 for the integrator and ORN resistor arrays are not that special or expensive, though still good performance.
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FYI - I've been playing with 100k/800n RC low pass and the ADR1399#1 in Vref. The results are similar to the 47k.
The TEMA is after a TC compensation, showing some negative TC caused by ADR1001#1's TC.
The ADR1399#3 is in burn-in, in several weeks I will try with it too..
I doubt you may get something better off the 34401A after all the changes I made.
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I'm agree .. consider the noise level almost nothing much possible done ... an option would be to look at TC level. to drop it down a bit...
for this particular unit 10NPLC in the voltage range 100mV i have short - 1.2uV noise P-P , with 10V range 10V apply - roughly 250 uV P-P . I would probably put LM358 everywhere and hardly see a difference. For that particular case .
I look at ADA4523 , seems current noise it about the same as installed OP27 at 1Khz ; but in overall flat spectrum .. for switching i did look as well: 330Khz switching , and this paragraph: "The ADA4523-1 uses circuitry to suppress these spurious artifacts to below the offset voltage. The typical ripple magnitude at the 330 kHz chopping frequency is less than 1 µV rms." Is my assumption in this application for chopping 1/f noise are incorrect ?
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The noise with 10 V applied does include reference noise. Still 250 µV_pp looks too high. So more like a defect / poor part to fix. The easier test for comparison is with a shorted input. This removes much of the reference noise (internal / expternal) from the test.
1.2 µV pp would be 200 nV RMS noise and this also a bit high for the 100 mV range. Part of this could still be the higher than normal ADC noise.
So this unit would be first more about a repair and not so much an upgrade.
A first step would be getting measurments to see how bad the noise actually is. I would use a short and look at 1 and 10 PLC mode (AZ enabled) for both the 100 mV and 10 V range.
They try to make the residual chopping spikes small, but when looking at best performace it is not a good idea to have an AZ amplifier with 330 kHz range chopper in an ADC with 375 kHz feedback modulation. One may well get some intermodulation effects - even of nothing happens there is the uncertainty of maybe an extra linearity error of glitches.
With no 1/f part the current noise would not be as bad as the OP27, but still 1 pA * 15 kohm give a contribution like 15 nV/sqrt(Hz) of voltage noise.
If one wants to tweak the ADC gain TC, one could adjust the 42 K resistor to ground at the integrator input. A larger resistor should give less effect of the switch resistance TC and thus a change towards a positive gain TC. I would roughly expect some +1 ppm/K with 50 K. Increasing the resistance would have even a slight positive effect on the noise, a smaller resistor however also a bit more noise.
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well , there is no option to change PLC , in 01A Fast\slow 6 digit , i believe corresponding to 10 100, and same for 5 digits.
so ...
SET SLOW 6 DIGITS
here is integrator output , input shorted, means Vinput == Voffset to simplify it:
(https://i.postimg.cc/X7PDdCtn/SDS00015.png)
zoom to it slow 6 digits, 33kHz
(https://i.postimg.cc/JzJKXdNM/SDS00016.png)
FAST 6 DIGITS
(https://i.postimg.cc/vTJfHbSg/SDS00017.png)
zoom to fast 6 digits , about the same
(https://i.postimg.cc/25k9nNC8/SDS00018.png)
and same zoom to FAST 5 DIGITS, same frequency
(https://i.postimg.cc/BZrhMKqS/SDS00020.png)
so integrator working with same frequency generating the same rate of dataflow , regardless of PLC, and then some software calculation ....
I'm correct ?
so in hardware point of view, if it working on the same frequency, producing same digital dataflow , where is difference to change PLC and draw conclusion from it , where is my mistake ?
I'm sorry, "375 kHz feedback modulation" I'm not quite understood about feedback modulation ...
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The integrator works just the same, all the time. With a shorted input there is also no difference visible between a shorted input or an internal zero. So the integrator and feedback from the reference would be the same all the time and one would not see difference between data rates. The only difference is how often and when the µC internal ADC is read and used to calculate results. There should be one reading, than switching the input path and with maybe 0.5 ms range delay a 2nd µC internal ADC reading. The first reading is the end of one conversion and the 2nd reading the start of the next.
The frequency at the integrator still looks a bit odd. The 33 kHz is still a mistake from the scope: from the screen picture it looks like a little more than 1 unit of 5 µs. AFAIK the frequency should be a little higher. I don't know for sure, but there might be slightly different versions.
The pattern also looks odd, there should normally be a mix of short and longer sections.
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174 kHz .. ( honestly i didn't count , just look at freq. meter ... )
so your reference to 375 kHz feedback modulation related to this frequency ? now i get it ... as i assume 30KHz and whatever switching spectrum would be far away .... ok .. need to think ..
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The 174 kHz would be roughly half of what I remember. There was also a different waveform with extra wiggles. To get 3 µs range feedback steps this would need the the up and down sections to be separate feedback steps. So the Frequency is not that much off - I mainly miss the extra wiggles to make sure to a fixed number of switching events.
One possiblity could the use of a different feedback pattern, following the US5200752 patent. The waveform looks a bit like this. At least with my ADC implementation it did not work out and I got INL issues. I don't understand the exact reason and with different hardware it may not be all that bad.
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The signal at the OPA140's (OP27) output is a square aprox 2.66us low and 2.66us high or aprox. 4us high and 1.3us low. See my scope pictures..
https://www.eevblog.com/forum/metrology/hp-34401a-hacks-and-upgrades/msg6266784/#msg6266784 (https://www.eevblog.com/forum/metrology/hp-34401a-hacks-and-upgrades/msg6266784/#msg6266784)
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damn ... that it ....
Good unit: input 10V:
from DC ampl perfectly square 10V [ADIN] going to HP chip Pin15 ; output Pin21 around 100mV [ I would really happy if someone explain to silly man, why output not match with schematic ]
R440: https://i.postimg.cc/Y01vjwWM/SDS00032.png
and integrator's OP27 output as iMo posted 600 mV .. ish
noise unit:
DC ok 10V square [ADIN] in P15; output Pin21 - 30mV [bang!]
R440: https://i.postimg.cc/x1F1fd4H/SDS00035.png
and integrator's OP27 output around 30mV [bang!]
so it roughly running at much lower input , making more noise ... and all my mumbo-jumbo definitely drop some noise , as i see some improvement but didn't cure. bandages doesn't heal ..
now: as i suspected HP chip defect ... schematic lie and 100K resistor really not between P15 - P21 ... and now what : Bandage some few hundred K resistor P15 - P21 to bump voltage ? silly but may work ..
PS: and funny thing , it able to pass test, and accept calibration, and even shows acceptable result , consider noise level, and skewed adc voltage input ... wow ...
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Pin 21 of U102 should be the input signal only 1 switch away from the integrator virtual ground input.
With some 100 µA from 10 V / 100 K one would expect something like 5-10 mV from the HC4053 switch resistance (60 ohm typ, 100 ohm max for NXP parts) and a little from the OP27 offset.
The voltage is suppose to be low the signal is converted from a voltage to a current.
The scope shows some 10 mV plus some high frequency spikes, that could well be normal for the integrator input. This looks like an R_on near the upper limit in both cases.
The smaller more frequent peaks look even better than the first measurement with large peaks at times and the odd slow envelopes.
The difference may point to some difference in the integrator. AFAIR there were slight version differences around C402 (capacitance at the integrator input) and maybe with the HC4053 ground link / L404.
A first check would be if the noise is still higher with a shorted input in the 10 V range. The test with 10 V may have issues from the references.
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as i said before - shorted around 2uV P-P ; 10V around 25uV P-P
question why input from HP chip lower , and signal at first integrator opamp x20 lower ? HP chip - bad , right ?
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The integrator input is a virtual ground. The point after the HP chips is just 1 switch that is always on away from the integrator input.
Most of the time signal is just a 10 mV squave wave (the bright yellow part). There are rare extra excursions that sometimes go higher. These extra peaks are not good, but more of a problem. The smaller the better. A question may be of the extra peaks are real of just some interference picked up by the probe / ground.
There is absolutely no indication that the HP chip is bad. From the signals it would be the SDS00032 curve that may indicat a problem with the integrator or maybe power supply decoupling or maybe just a probing effect. The signal with less interference is the one that looks better.
Excursions up to 300 mV are beyond the linear range of the OP27.