so both gettin 200.3 fail for diagnostic , but even as i assume, preliminary test as "Front panel comprehensive calibration" pass even without j-fet that responsible for fast ADC. Some how if fail at first time, on open connectors tests, ( passing DC and ohms ) and i missed to write the error , and test completed second time no errors ... i saved constants as it better then before ..
But transistor need back , as the test simply hang on that 200.3, and everything freeze, and only power switch works

...
in term of stability ... i would say if average the result it still floating up and down on 2-3 microvolts .... but it ok ..
upd: 2nd pass "Front panel comprehensive calibration" , was error again : 363 - 200 µA gain out of spec. Then i realize improper 20V , was set as 19.998XX more effort an it finish without error ....
lab next step ... probably will do linearisation report for both ... hope wouldnt be a disaster

as i heavy change ADC ..
so yeah that was with some filters ... and it already was good , comparing to original state ...
https://i.ibb.co/Hfh691m7/Figure-1.pngbut it looks so miserable .. comparing to now:
(dont look at spikes ... especially at end , that my activity of on\off some stuff .. it picking everything )
https://i.ibb.co/vCKRZ9VS/voltage-deviation.png(just a note , 10PLC, no filter )