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#100 Reply
Posted by
mycroft
on 01 Mar, 2021 01:06
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I have a precise scale and the building is more the problem then the measurement circuit
i would need to start slashing at the slab.
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The articles show DC current transformers as transducers. In this context I am wondering a little why they need a 10 V range: the shunts (on the secondary) should likely also work with a slightly lower voltage so that one might get away without the divider.
Shunt for DCCT (also called burden resistor) is typically connected to a nearby differential amplifier which converts it to a standardized -10...+10V voltage.
Now this large signal is much easier to send through the cable in noisy environment.
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#103 Reply
Posted by
branadic
on 01 Mar, 2021 11:13
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Branadic, it's really not urgent. But it does look very promising. It would be nice to demonstrate it once I get an absolute INL measurement against 10 V PJAS.
Sure, let's test it once you have measurements available
-branadic-
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#104 Reply
Posted by
branadic
on 02 Mar, 2021 14:51
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#105 Reply
Posted by
branadic
on 02 Mar, 2021 17:54
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So here is the plot. This is just the second run data (from -10V to +10V) fed into the same correction scheme / formula as extracted from the first run. As can be seen the fit appears reproducable, except -10V, -9.5V and -9V are off on HPM1 and looking at -9V it seems like some inrush is happening.
The whole second run is based on the same 10 kS averaging resulting in 1Sps, with 100 averaged samples per voltage step. This gives an idea of the spread.
With the values and formulas given, everyone can reproduce the results.
-branadic-
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#106 Reply
Posted by
e61_phil
on 02 Mar, 2021 20:47
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Here is another, much simpler, approach to reduce the INL...
This one "learned" from the blue measurement and applied it to the orange one.
What I don't understand on branadics improvements is, how the INL noise could also be reduced.
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#107 Reply
Posted by
Kleinstein
on 02 Mar, 2021 21:58
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If the nonlinear part is reasonable stable, one can apply a correction function. With the correction applied the ADC would be more linear.
This can work reasonable good for the more smooth part, like a low power law. However if the correction includes steeper parts, this may cause trouble if the INL changes by changing the voltage they apply too.
It also needs more points to test and correct more local errors. Those tests are not easy - at some point one can no longer guaratee that a 5700 or 3458 is really linear enough. The other problem is noise from the references - it takes quite some time to get a reliable curve. Drift and low frequency noise of the references are usually more limiting than the ADC or DAC noise. So 100 seconds at each point are of limited use. Drift of the reference could effect the curve quite a bit. Better would be some 10 runs with 5 seconds each and the rest of the time spend waiting for settling.
One can not test every point, so one needs to use a reasonable interpoation / approximation of the correction curve. A higher oder polynominal may not be the best choice. Chances are something like a spline interpolation would work better.
A numercal correction is nothing new. Chances are some of the DMMs already include some nonlinear corrections, like a square part or a different slope for the positive and negative side. AFAIK the HP34401 corrects much of the turn over error this way. The LTC2400 is also sometimes used with correction.
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#108 Reply
Posted by
e61_phil
on 02 Mar, 2021 22:04
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The "learning" was also just a lookup table with linear interpolation in between the points (less than a handful lines of code).
I heard from a manufacturer of 24-Bit ADCs that some of the more expensive parts are INL tested AND corrected with a table within the ADC. Sounds that something like this isn't uncommon.
They did the INL test with a very pure tone.
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#109 Reply
Posted by
Kleinstein
on 02 Mar, 2021 22:44
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A very pure tone can be a way to measure linearity. However this mainly works for fast ADCs with lower resolution, as one needs some statistics and the genrators for the pure tone only work well in a limited frequency range: too fast and the OPs get more tricky, to slow and the capacitors get too large.
With some ADCs the linearity may depends on the rate of signal change too. A kHz sine wave may show different numbers than a static signal. Especially some SD ADCs are not that good with a static signal, as idel tones can cause problems. This can cause static INL errors that can look a little like a resonance at some specific points - the not so slow sine wave could average over those ranges. A static test with only a limited number of points may miss those ranges or just hit a peak. There may also be thermal effects that show some delay and may thus be different from DC to some 100 Hz or 1 kHz.
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Inspired by Marco Reps video and a visit to the HPM7177 ADC documentation website, I ordered the Analog Devices AD7177 EVAL kit from Mouser. Just to see what fun could result. Attached are some photos and other output. Just to be clear: two days ago, all I knew about ADC of voltage was from working with an Arduino and various sensors.
The EVAL board can work on its own, but for an extra $100 there is a microprocessor that makes interfacing with the AD software trivial. So my total investment is under $200. The evaluation software is well documented and it will let you set the operational parameters by clicking on the virtual configuration panel. I had to do some research to learn the ADC jargon and the function of all the AVSS, AVDD, etc. (thank you internet). Being a NOOB myself, I will assume that readers will not benefit from my explanation other than to describe the setup as a unipolar input of 3VDC from an HP3245A source and that the AD7177 was configured as shown on two of the photos below.
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#111 Reply
Posted by
Castorp
on 06 Mar, 2021 09:38
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The evaluation board is pretty flexible indeed. And the neat thing is that beside the built-in basic analysis in the software (histogram, rms, effective resolution, etc.) you can also export the raw samples and do your own FFT or ADEV or whatever you like. The buffer is long enough, so that when you operate at low data rate like 20 Sa/s you can record a few hours' worth of data.
If you want more flexibility, it's possible to operate the evaluation board without the MCU. The digital interface lines are accessible on a header. You can hook it up to some FPGA board like this. If someone wants to go this way (and can't wait till the HPM7177 HDL and firmware get released), I can provide the VHDL core for communication with the AD7177-2.
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The evaluation board is pretty flexible indeed. And the neat thing is that beside the built-in basic analysis in the software (histogram, rms, effective resolution, etc.) you can also export the raw samples and do your own FFT or ADEV or whatever you like. The buffer is long enough, so that when you operate at low data rate like 20 Sa/s you can record a few hours' worth of data.
If you want more flexibility, it's possible to operate the evaluation board without the MCU. The digital interface lines are accessible on a header. You can hook it up to some FPGA board like this. If someone wants to go this way (and can't wait till the HPM7177 HDL and firmware get released), I can provide the VHDL core for communication with the AD7177-2.
Yes, having the VHDL core for communication with the AD7177-2 would be very nice, thank you! It is fun being a CERN fan-boy these days, having been a space-kid during the early days of NASA. The very idea of sensing fluctuations in kA current for the magnets at nano-volt sensitivity is mind-boggling science of the best kind. I can only imagine the personal energy associated with being part of the CERN team.
The Analog Devices software is a very good place to start and the ability to save the raw data after a run is way better than expected from 'evaluation' products. My last run generated 100,000 observations at 20 Sa/s for a 1.81MB CSV file overnight. I use DataGraph for analysis and plotting and it is very good at managing data of that scale.
Thanks for your participation in the EEVBLOG forum, having an insider's point of view on the science supporting discovery is most welcome.
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#113 Reply
Posted by
Castorp
on 08 Mar, 2021 09:01
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@View
- Finder, I sent you the code.
I think it was a good call to release this project as open hardware and to participate in discussions such as the one in this forum. It's good for me, as I get a lot of feedback and plenty of clever questions. Now I understand that many aspects of our work are not so visible from the outside, and the background information is somehow scattered. Plus, the application is unusual and exotic, so it differs a bit from standard voltage or current metrology.
I hope it's also useful for everyone else. Some people have already borrowed bits and pieces for their own use, which is totally fine. Others are building their own complete HPM7177 units.
It's certainly an exciting time to be at CERN. There are lots of developments around the High Luminosity upgrade of the LHC. For me this ADC is just one of several sub-projects. There are upgrades of other digitizers and DCCTs, test infrastructure, etc.
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#114 Reply
Posted by
dietert1
on 09 Mar, 2021 10:50
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From my own time as a high energy physicist at DESY almost 40 years ago i remember that new and better electronics could pave the way for new physics, like search for SUSY particles. Being able to raise the clock of a real-time processing system by a factor two made a difference. And sometimes those physicists, who spent a lot of time on technology work, got trapped and lost their career as scientist.
Regards, Dieter
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I've been running the AD7177 EVAL under a variety of settings. It is now in a metal box and that cut the noise by a couple of micro-volts. What I'm seeing is like 2ppm for 4VDC at 5sps, 10 samples for 10 repetitions. Longer runs (20,000 repetitions) are more like 15ppm. I don't have a 1ppm voltage standard under 5VDC, and there is enough variation in ambient temperature to account for the variation in the longer runs.
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#116 Reply
Posted by
amiq
on 16 Mar, 2021 04:32
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Castorp, any time you update the files (or make them public) on the CERN repository could you post a wee message in this thread to let everyone know.
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Marco already published a second run of his linearity measurement:
https://github.com/marcoreps/multiinstrumentalist/blob/master/csv/HPM1_formula2.csv
and tested the fitting algorithm that was presented for HPM1, with quite good results.
@branadic
The data on GitHub from MarcoReps show a vref voltage from -10DC to +10DC with precision to the 15th decimal place in many cases. What sort of equipment would have been used to to achieve that level of precision? A Josephson voltage standard perhaps? How does that compare to the expected level of precision from a voltage reference (and its ambient environment) used by participants in the Metrology section of the eevblog forum? {not intended to be a snarky remark} What is the limit of precision available with current of-the-shelf instruments?
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#118 Reply
Posted by
Kleinstein
on 16 Mar, 2021 18:04
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For a Josephson junction reference the 15 th digit may be stable at cryogenic temperature so that there is no thermal EMF. However going to room temperature would add uncertainty from thermal EMF.
For more normal instruments, at higher voltages it is the noise of the references that is likely to a large part the limiting factor. So the LTZ1000 in the HPM7177 and to a slightly lesser degree the dual LTFLU in a Fluke 5700 or similar. Chances are the first collumn would be nominal numbers - so no error there as nominal can be exact. It is just the question how accurate the actual source reflects the nominal. The total deviation is allways the combination of errors of the source and the meter plus the reference(s) noise.
Ideally one would have the ADC and DAC (PWM DAC in case of the Fluke 5700) to use the same reference, which is not an easy task, though not totally impossible. The way one could eliminate the reference noise and drift.
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#119 Reply
Posted by
Castorp
on 16 Mar, 2021 21:59
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Castorp, any time you update the files (or make them public) on the CERN repository could you post a wee message in this thread to let everyone know.
Yes, of course.
Regarding the question on how many digits (or bits) are meaningful - Kleinstein's answer is spot-on as usual
Quantitatively speaking, the short-term (minutes/hours) stability of a measurement with a good LTZ1000 against another one (or something similar) should be on the order of 15-20 ppb (parts per billion), limited by 1/f noise. In terms of voltage noise that's 150-200 nV RMS at 10 V.
With the HPM7177 you can't easily arrange a ratiometric setup - that was never the goal. But if you could, you'd be limited by the AD7177-2 noise to something like 10 ppb (short-term) at full scale and 4-5 ppb at zero (mid-scale). Of course, you can do better if you implement auto-zero or more sophisticated self-cal routines. This path may become interesting in the future even for non-ratiometric measurements (stay tuned!) but at the moment for our purposes it's just an overkill.
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Hello Everyone, MarcoReps paved me the way :-)
Just a very big thank you for opensourcing this great project. I'm also very interested in the PSU and what nice design decisions you did there..
So i would be very happy if the schematics for the PSU will also be available for the public.
Thanks again and best regards
Daniel
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#121 Reply
Posted by
Castorp
on 23 Mar, 2021 15:00
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Hi Daniel, and welcome!
There's really nothing special about the PSU. I'm working on an improved version now. It will follow the same principle (AC/DC + DC/DC + capacitance multipliers + LDOs), but I'll take some measures to reduce the CM noise (GND to EARTH). Also, the +-12V rails are too high for the Peltier. I'll reduce them to cut down the dissipation in the OPA548. The schematics and (hopefully) final test results should be available by Q3 this year.
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#122 Reply
Posted by
SigurdR
on 25 Mar, 2021 09:48
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Hi,
thanks for the information about the ADC!
I am considering buying the eval-kit, too.
Looking at the performance diagrams, it seems to be rather much noise.
What sampling frequency did you use?
Is it possible to set the sampling frequency in the eval-Software?
Best regards,
Sigurd
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#123 Reply
Posted by
Kleinstein
on 25 Mar, 2021 10:20
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The noise from the bare eval kit without a lower noise reference can be quite high because of the reference noise.
Chances are the sampling rate is still at 10 kSPS. This also means there can be some mains hum included. To get comparable with a DMM one would need to average some 200-5000 readings, so expect the noise to go down by a factor of 10-50 just from averaging - though this does not fully apply to the reference noise, that can have quite some 1/f part.
By itself the AD7177 is rather low noise.
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#124 Reply
Posted by
Castorp
on 25 Mar, 2021 12:41
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The evaluation board comes with an ADR445. It's not too bad, but it's not LTZ1000. And it's well above the ADC noise (even LTZ1000 is).
For long-term measurements you probably can't use 10 kSPS with the evaluation board software. And you can't go slower than 20 Sa/s either. If power line interference is a problem, you can use the built-in 50/60 Hz notch filters.
