I have some more information regarding the REF80:
A look at the publicly advertised processes from Texas Instruments suggests that the HPA07 process was used in the REF80. (I´m not sure about that!) This process dates back to 2003 and is referred to as “High-Performance Analog CMOS”. The HP180, which is based on the AN180, would also be conceivable. It is described as “extremely low-noise, high precision”. However, the HPA07 is also available as HPA07HV, where it allows up to 36V. The HP180 only allows 24V. This makes the HPA07HV somewhat more likely. The maximum heater voltage of the REF80 is specified as 42V. In my view it is possible that the HPA07HV can handle the 42V with additional measures.
The minimum structure width of the HPA07 is 0,3µm. Special isolation structures are available to shield sensitive circuit parts from potentially interfering circuit parts. MOSFETs, JFETs, NPN and PNP transistors can be integrated. The transistors have a very low noise level. The process offers metal-to-metal capacitors, IMD capacitors and titanium nitride polysilicon capacitors. In addition to polysilicon resistors, precision thin-film resistors can be used, which can also be tuned with a laser process. Polysilicon fuses and memory cells are available for configuration, including OTP EPROM and EEPROM. The top metal layer can be a particularly thick copper layer.
In the following pictures, layers of the integrated circuit have been removed piece by piece. This is not a professional delayering. For this reason, the removal of the layers is inhomogeneous and some structures can only be removed by underetching. Nevertheless, new interesting insights are gained.
Initial state:
https://www.richis-lab.de/images/REF01/51x08XL.jpg (43MB)
After 12min HF:
https://www.richis-lab.de/images/REF01/51x26XL.jpg (42MB)
After 5min HCL:
https://www.richis-lab.de/images/REF01/51x27XL.jpg (45MB)
After 12min HF:
https://www.richis-lab.de/images/REF01/51x28XL.jpg (45MB)
After 12min HF:
https://www.richis-lab.de/images/REF01/51x29XL.jpg (47MB)
After 12min HF:
https://www.richis-lab.de/images/REF01/51x30XL.jpg (45MB)
After 96min HF:
https://www.richis-lab.de/images/REF01/51x31XL.jpg (47MB)
Many areas are surrounded by relatively thick frames. These are most likely the special insulation structures offered by the HPA07 process. Some elements can be clearly assigned to CMOS and bipolar transistors. The structures that can be seen here have an unusual asymmetry. They probably form so-called DEMOS, Drain Extended MOS.
In the book Silicon Analog Components by Badih El-Kareh and Lou N. Hutter, there is a comparison of DEMOS and LDMOS transistors. Lou Hutter was involved in the development of many processes at Texas Instruments.
In the left-hand area, a logic structure was already expected due to the wiring in the top metal layer. This is confirmed at the substrate level (blue). Above and below the control logic are two very similar blocks (cyan). Two rows of resistors and two rows of transistors are integrated in each block. Judging by the optical appearance, this could be a kind of simple DAC.
Under the four bondpads, which provide the reference voltage, there are some larger elements (yellow). Exactly the same elements can also be found under the four bondpads in the lower area. It therefore appears that this is actually a second output.
A very large area in the lower section of the die is covered with capacitors. The capacitors were realized in the metal layers and have already disappeared here. Underneath are some kind of strips. These appear to be further capacitors.
In addition to many smaller transistors, several larger transistor groups are integrated (red). The heater voltage is supplied in the top right-hand area and this is also where the output is located, which indicates when the set temperature has been reached. It is therefore not surprising that there are large transistors in this corner. Below the frame structure, which distributes the heater current, there are thin, long rows of transistors. It can be assumed that these transistors fulfill a task as part of the heating function. Outside this frame, four slightly larger blocks are arranged symmetrically. These could be the output stages for the reference voltage output. A certain amount of power loss is to be expected there, which is better distributed as symmetrically as possible. The smaller transistor strips inside the frame could be current sources for the four reference voltage sources.
The double lines that are typical for logic circuits can now be seen on the substrate (yellow). Some of the polysilicon strips that represent the gate electrodes have remained. While the logic within the double lines has a chaotic inhomogeneity, repetitive structures stand out on the left (cyan). These are most probably memory cells containing correction values. It appears that the memory cells are located in the middle and are flanked on the right and left by circuit parts via which the cells can be selected, written to and read out.
Here you can see the transistors and Z-diodes, which most likely supply the basic reference voltage. The many small elements that resemble dirt are the remains of the contacts between the layers. In more modern processes, these vias are lined with metals that do not dissolve and then remain as sleeves or cylinders.
The area on the right now also shows what is under the large cross-shaped metal surface in the middle. These are relatively simple structures.
In an intermediate step, it can be seen that a series of resistors were located in a higher layer. The resistors have surprisingly complex contacts and are embedded between the metal layers.
With the information obtained, the following assumption can be made. The voltage for heating the REF80 is fed via the metal layer to a frame of transistors that regulate the heating power (yellow). From there, the current is conducted to resistors (red) that surround the four reference voltage sources (green). A great deal of effort was put into the design of the heater resistors, presumably to distribute the heat as homogeneously as possible and to prevent electrical interference. Temperature sensors (purple) close the control loop.
https://www.richis-lab.de/REF46.htm#etch 
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