Electronics > Metrology

JFET input stage low noise amplifier

(1/16) > >>

CurtisSeizert:
I have been working on a low noise preamp based on the design by Cannata et al. (http://link.aip.org/link/doi/10.1063/1.3258197?ver=pdfcov) that I thought I would share in hopes that someone might benefit from it. The input stage is a cascoded diff pair using an IF3602 matched JFET pair with a high impedance current mirror load to keep gain high up to 100 kHz.  The key features are:

-Film caps at the input (no leakage testing of Al electolytics required, possible because of the low current noise of the JFET input pair)
-Offset trim to compensate for Vgs differences between the two JFETs of the pair
-HP filter resistor shorted when switching sources to decrease settling time
-Antiparallel NPN pair for low leakage input protection
-Switchable gain (80 and 100 dB)
-Switchable 4th order Butterworth filter stage (<12 Hz, <100 kHz)
-Runs on two series 3s Li batteries, draw is around 35 mA.

It is not without issues, but as far as I can tell none of those issues compromise the validity of its measurements.  The key component values have all been optimized in LTSpice. The HP filter at the input has -3 dB at around 20 mHz, so it is usable over a wide range of frequencies, which I have confirmed using a two stage active attenuator made from two inverting amplifiers to give -80 dB with low impedance.  The low frequency noise is higher than a previous version I built using resistive loads in the diff pair, and I am not totally sure if that is from (a) more thermal EMF from running the diff pair at higher drain current, (b) more junctions/suboptimal layout giving more thermal EMF, or (c) higher 1/f corner frequency for the particular IF3602 in the more recent revision.  I have bodged in a JFE2140 JFET pair on this board, but I have not fully tested that one yet.  The noise floor will be higher, but probably still usable for most things.  Power supplies are LT3042 and LT3093 using a 22 uF Cset to minimize LF noise, but I have not been impressed with the LF noise measurements I got with those.

I am working on a revision at the moment.  I may switch to an LT1678 as the op amp on the input stage to enable +/-5 V rails, possibly a different power supply arrangement, and fix some of the bugs. 

I have made some noise power spectra by capturing the the voltage trace on a 34465A and using a python script to plot the fft (using scipy.signal.welch).  I have attached the noise floor from 0.1 Hz to 10 kHz here, and I'll add some more later.  The deficiencies of my shielding setup will be pretty clear in that spectrum.  I am happy to provide the design files to anyone who is interested, but I won't put gerbers up until I have fixed some of the issues and tested the revision. This is not my area of expertise, so if anyone has suggestions or sees errors, please let me know.

Curtis

Kleinstein:
The circuit looks nice.

I found a few small points for possible improvements / mistakes:
The capacitor C12 should likely better go towards ground instead of towards the 7.5 V supply. If the supply is very clean this would not make a large difference and the filtering is more for the higher frequency part. Ideally the supply decoupling would include an extra series resistor for the circuit parts, not just a capacitor. With a low frequency only crcuit this is likely not that relevant though.

The resistors R17 and R20 could be combined to a single resistor.

For the extra low frequency noise, the resistors R7 and R14 could contribute with current noise. Especially thick film resistors that have a significant DC voltage will show some extra 1/f noise that can become relevant. So R7 and R14 should be thin film types preferrably not the smallest form factor.
Trimming of R7 or R14 could be used to reduce the temperature effect on the JFET. This would reduce the effect of thermal fluctuations at the FETs.

I would personally skip the connection from wiper of RV1 to the center of the 2 2 ohms resistors. The trimmers wiper resistance would this way be less relevant.
The output may want some extra resistance in series if the switch resistance is below some 100 Ohms to isolate capacitove loading the the OPs.

The capacitors at the filter stage should not be X7R or similar types (hard to tell from the picture if they are C0G). Film caps may allow slightly larger values than C0G, otherwise C0G is good.

There is no need for R19/R36 to be high accurracy or otherwise special type.

For the input protection could also use a BAV199 dual diode instead of the 2 transistors. This low leakage diode is quite common.

For the supply one may get away with a little less overall voltage, possibly a slightly asymmetric (like -2.5 V and +7.5 V). This could reduce the overall power consumption and thus heat related problems.

MK:
Hi, also look at Gerhards response in this thread:
https://www.eevblog.com/forum/beginners/jfet-frontend-amplifier-stability/msg3720466/#msg3720466

magic:
A random idea: are you sure that flicker noise of the BJTs isn't contributing meaningfully?
Collector current noise is generally suppressed by local feedback loops (enough?), but base current noise of Q4 and Q5 is out of any loop.

Kleinstein:
The noise current from the Q3 Q4 Q5 is rather similar: it can add current to the drain sides. Similar the voltage noise of Q3 can contribute, though usually still not relevant as the emitter resistors are large.

With the base current noise the question is if it is really worth to have Q4. It makes the current more symmetric, but adds some current noise. With the rather large emitter resistors the symmetry is quite good anyway even without Q4.  Some adjustment with a parallel resistor to R7/R14 should be as good or better. Perfect symmetry in the currents may still not be the point of lowest drift / temperature sensitivity.

Navigation

[0] Message Index

[#] Next page

There was an error while thanking
Thanking...
Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod