LM399 based 10 V reference

[Kleinstein]

The residual ripple looks quite high. The higher harmonics are also quite present. This suggest that this is not the normal filter function (a kind of soft roll of 3 rd order filter). It could be some other path than just the filtered PWM.

The one point, I don't like very much in the circuit is taking off the signal directly from the switch, where there can be quite some switching spikes.
It might be better to take the signal to the final buffer / filter from before the 100 Ohms resistor (R9), so directly from the 1. st OP. In the shown circuit one could test a little larger value for C22, to get more filtering for spikes coming from the switch.

[branadic]

@ Kleinstein

Feel free to draw your suggestions into to schematic below, so everyone can benefit from that.

-branadic-

[Kleinstein]

I would suggest trying getting the signal directly from the 1 st OP and make C22 a little larger - e.g. 100 nF (more if it fits) instead of 10 nF. The larger capacitor would also make sense in the original circuit.

I think Andreas is already using LTC2057 for both OPs. Otherwise the AD8675 with such a high resistance signal could be a weak point. It is more like a precision BJT based OP could work for the second OP.

Attached is a picture of the suggested change. The drawing is not very pretty, but I hope understandable.
Practically this would be likely removing R15 and add a bodged in resistor.

The hoped for advantage should be less ripple. However there is a slight disadvantage from possible leakage current from the DG419 in combination with the 100 Ohms  - still 1 nA of leakage would only result in 100 nV of error. So it is likely not that significant.

[Andreas]

Obviously a good idea.

I think we should take this modification into the re-design.
I had to look wether we have still a 10V output after the change ( yes ).

C22 is still 10 nF.
If I would change C22 I would also keep C21 at the same value.

with best regards

Andreas

[Kleinstein]

C21 is for the compensation of possible capacitance at the output. So this can stay the same, it is not helping much with filtering.

With C22 there is slightly the question where to take the ground from: this could be slightly better with the ground from the output. It's likely not a big difference anyway - just a different point in the layout.

[branadic]

Thanks and by the way, happy new year to all of you.

Obviously a good idea.

I think we should take this modification into the re-design.

Already changed that in the schematic for the redesign, but need to test that too. The output spectrum looks for sure much cleaner now 
Even though I currently have installed an AD8675 for the first opamp, it's no problem to replace it by another LTC2057 like the one I have populated for the output buffer.

-branadic-

[Andreas]

Another measurement on branadics PCB:

On Off-behaviour:

note that the off board LM399 #3 is always "on" during that experiment so a measurement with a on-board LM399 may differ.

Switching on is without any issues. On switching off we get a short over voltage of around 300 mV @ 14V VCC.

with best regards

Andreas

[Kleinstein]

I just realized that the proposed change at R15 will likely have a negative effect on linearity. This is not so bad for just a reference as it would still be monotonous, but it should be good to know if one wants to use the circuit for other purpose.  The 100 Ohms (due to filtering maybe only a fraction of it) would kind of add to the switch resistance in a crude approximation.

So for a new layout I would keep the option to have the original R15 position.

[Andreas]

Hello,

perhaps we could get better isolation of the switch by adding a additional buffer.

For the linearity: I see a 1/x function of the PWM signal.
100% PWM gives 7V
50% PWM gives 14V
25% PWM would give 28V

so linearity should be no real issue.

with best regards

Andreas

[Kleinstein]

Linearity should not be that bad. With the original R15 I would expect something like 1-10 ppm INL (relative to the 1/N curve) with the changed R15 for lower ripple maybe 500 ppm INL.  So for the intended use as a reference this should be OK.

I don't think it would be worth an extra buffer for the switches. One might think about placing an inductor (e.g. 100 µH range)  in parallel to the 100 ohms, to lower the resistive drop and still get the transient and high frequency isolation.

[Andreas]

Some further results on branadics PCB.

voltage drop over R9 is around 2.4 mV (average current through resistor around 24uA)
so if I put R15 tap on the other side of R9 I get a 2.4 mV (240 ppm) higher output voltage.
Influence on T.C./PSRR has to be investigated if we want to do this.

Current consumption:
the 22 Bit software (with up/down Keys removed) uses 20.5 mA for the cirquit (without LM399).
As I always want to use batteries this cuts battery lifetime to 50% of the LM399 alone.
I tried sleep mode which reduces the current consumption to ~13 mA.
My target of staying below 5mA for the 10V transfer cirquit can only reached by reducing the processor and PWM clock frequency.
Reducing PWM frequency will also have a positive effect on PSRR.
But to compensate for this (for ripple) the filter capacities have to be increased.

further questions arise:
Is R2 (3K) on the "right" side of R9 (is the offset current of 0.1% stable? or is the ripple on the other side more critical).

with best regards

Andreas

[Kleinstein]

The "offset" due to R9 should be relatively stable. Most of the current should be flowing back to the OP through the 100 K resistors. It is more like added nonlinearity. With the position of R15 one kind of has the choice between good linearity, but some ripply, or relatively poor linearity (though in principle possible to calculate) but less ripple.  At high temperatures (e.g. > 40 C ?)  if the leakage of the DG419 really goes up, there would be additional drift with the tap on the quite side.

It might be possible to reduce the offset over R9 with an additional inductor in parallel.

From the pure calculation, one might get away with a slightly slower PWM without that much more ripple. Some of the ripple might be still from parasitic paths and not the ideal RC filter curve.

R2 is at the right side of R9 - it is not that critical anyway. However with the reference current depending on the PWM setting, the linearity and adjustment range is limited anyway. If one wants a larger adjustment range it would be more about an additional auxiliary less stable 10 V just for R2. This does not need to be so stable.

With a lower frequency for the µC one might be able to also reduce the voltage - no need to use 5 V, 4 V might be fine at 12 MHz. This also saves current about proportional to the voltage. There may be a more efficient use of the sleep mode - it depends on how much is used by the oscillator and how much by the actual CPU. I am afraid the lower power oscillator mode would add some jitter - though it might be acceptable.

[Andreas]

Hello,

why not go a step farther?
3.3V and 8MHz internal R/C clock (should have the lowest power consumption).

A pin-compatible 3.3V regulator (LT1763-3.3) is available.
I only do not know if the Toshlink device will work with 3.3 V.
So eventually only the alternative SFH756V is usable to read out temperature and actual PWM value.

A interesting test for the PWM-ripple would be to split the first 100K resistor into 3 * 47K resistors
one at the old place and the 2 new on the other 2 switch inputs (10V and Gnd) to isolate the switching noise from the output.

By the way: R8 is also a problem.
It uses 1.5 mA.  (5mA * 30% duty cycle)

It could be increased to 2K2 without functional impact.

The better way would use a pull-up resistor (100K) to VCC instead of a pull-down to GND.
(supporting the AVR internal pull-ups during reset instead of fighting against the AVR pull-ups).
But in this case the 2 inputs of the ADG switch would have to be exchanged.
And also the PWM output inverted.

with best regards

Andreas

[Inverted18650]

OEM with both revisions, may be easier for others to follow:

Thanks again to brains behind this project, bowing down "I am not worthy".

[Kleinstein]

I don't think splitting the 100 K to have some of the resistance before the switch is a good idea: this would increase the effect of charge injection quite a bit. In the current circuit most of the injected charge flows back trough R9 or directly to ground.  Charge injection depends on the supply and likely also temperature and this way adds possible drift.

I am not sure if the filter is optimized very well.  Maybe I try a few variations (e.g. different capacitor ratio, a capacitor to ground) in a simulation. So there may be a little room for improvement (better ripple rejection with same capacitance). Slightly larger caps may still be an option if lower clock is important. Also increasing C22 to e.g. 1 µF might be an option - adding another filter stage to the output.

Using the internal RC clock and lower voltage could be a good idea.

If no actively enabled the AVR internal pull ups should be off.
So I see no advantage in inverting the control and using pull-ups instead. I would expect even 50 K to be sufficient for R8. The main function should be during turn on, to prevent an overshoot. However the filter should be slow enough to not allow much overshoot - currently its more like sluggish and R8 may only be there for safety in case the crystal fails to start.

[branadic]

Changing power supply to 3,3V for safing energy is a good idea. If that means that TOSLINK for isolation does no longer work, fine, no problem whatsoever.
Lowering the PWM frequency means bigger caps and less space on the board. Need to check if that fits into the layout.

-branadic-

[Kleinstein]

I did a quick simulation of the filter, sill as a filter and not as an PWM controlled amplifier, but the effect on ripple should be essentially the same.
It looks like the capacitors are well large enough and might have room for a lower frequency. It seems to help with the higher frequency part if the C4 goes to ground instead of the OPs output. This is especially true if the OP is relatively slow (e.g. LTC2057).

The high frequency part (e.g. 4 kHz) the filtering is very effective. So if at all one would expect a problem from the low frequency end due to the modulation of the PWM signal. So there are lower frequencies present, but at a reduced amplitude, depending on how the PWM modulation is calculated.  Worst case one may have to reduce the resolution a little - more than 20 bit resolution only helps if one gets the adjustment at start that accurate.

I don't see a big different with C3 at 1.5 µF. For BOM simplification just 1 µF for the 3 caps is not much worse.

[Andreas]

If no actively enabled the AVR internal pull ups should be off.

Most processors that I am aware off have the pull ups active during Reset.
In this case the data sheet says "no".
So I have replaced R8 = 100K.
Power consumption decreased from 13.1 to 11.4 mA.

It seems that the switch off spike has increased somewhat.
But the relation is more to the overall power consumption
which previously was 20.5 mA. With a additional 1K pull down resistor
the change is minimal.

8 MHz internal oscillator: (still 5V for the processor).
further decrease from 11.4 to 6.6 mA @ PWM-Clock ~4kHz
So I guess we will be around 5.5 mA when reducing VDD to 3.3V so nearly on target.

Saw during setting the fuses there is a ATTINY15 compatible 6.4 MHz mode
With this clock we are at 5.5 mA at 5V already.
But something is wrong as the PWM clock drops to 800 Hz.

with best regards

Andreas

[branadic]

Back on the bench I also modified my reference with the suggestions made by Kleinstein. I had minor issues with my first microcontroller, as the fuses where set wrong and it was no longer possible to get access to it.
However, after replacing the micro, programming the 22bit version of the firmware and setting the fuses more or less correct (Extended 0xFF, High 0xDC, Low 0xFF) I'm now able to change and safe the pwm settings.
My reference is currently running on one of my Prema 5017 SC. With the math function active (y=ax+b, with a=1 and b=-10) I can measure down to 8.5 digit resolution, even though this doesn't replace a 8.5 digit multimeter.
So far the reference looks to be stable, but I have to modify my Octave script to also log ambient parameters (TMP112 for measuring temperature at the switch, SHT25 and MS5611).
First impressions coming soon...

-branadic-

[Andreas]

Hello,

now I fear I have done too many modifications in one step:

low noise modification according to Kleinstein (R15 tap)
low power modifications to 6.6 mA
- R8 = 100K
- 8 MHz internal R/C oscillator
- sleep mode active

T.C. increased by a factor of 10

so box-TC.
0.315 mV over 22.5 deg C = 1.4 ppm/K

average linear T.C. -1.35 ppm/K
3rd order TC @ 25 deg C -1.27 ppm/K

And I hoped that due to the PWM frequency reduction the T.C. would be better (lower number of edges over time).
Have to analyse why it got worse.

with best regards

Andreas

[branadic]

Saw during setting the fuses there is a ATTINY15 compatible 6.4 MHz mode
With this clock we are at 5.5 mA at 5V already.
But something is wrong as the PWM clock drops to 800 Hz.

In this mode system clock drops to 1.6MHz (see page 25 for ATtiny15 compatible mode) --> 1.6MHz/8/256 = 781.25Hz ~= 800Hz.

-branadic-

[branadic]

Hello,

now I fear I have done too many modifications in one step:

low noise modification according to Kleinstein (R15 tap)
low power modifications to 6.6 mA
- R8 = 100K
- 8 MHz internal R/C oscillator
- sleep mode active

T.C. increased by a factor of 10

Maybe this is due to the internal RC oscillator and its t.c.? Changing to an external 8MHz crystal could maybe improve things?

-branadic-

[Andreas]

Hello,

made a quick check by changeing the osccal register. (calibrated Value = 0x97)
Output voltages are after 2:1 divider into ADC25

0x97+00: 3987 Hz 5001.869 mV
0x97+10: 4165 Hz 5001.870 mV
0x97-10: 3803 Hz 5001.839 mV
so around 6 ppm change over 9.5% frequency change.

over a 23 deg C temperature change I would expect much less frequency change
(around 1% when reading from typical datasheet curve)
So this does not explain a 32 ppm change over temperature.

The whole measurement is also relative instable.
there are around 2 ppm changes without any large environment changes.
(perhaps some EMI related influence).

I decided to revert the low noise R15 tap for the next T.C. measurement.

with best regards

Andreas

[branadic]

The whole measurement is also relative instable.
there are around 2 ppm changes without any large environment changes.
(perhaps some EMI related influence).

I decided to revert the low noise R15 tap for the next T.C. measurement.

Can't confirm the changes here, the readings look stable (10s integration time), beside ambient influences. I'm currently implementing my environmental sensors to correlate the readings.

-branadic-

[Andreas]

Hello,

the output voltage fluctuations seem to be correlated to using the internal R/C oscillator.

After having reverted R15-tap I recognized around 70uVpp on the output voltage measured with ADC25 and 2:1 divider.
I looked up the measurement protocol of prevous T.C. measurement ( with low noise connection of R15) and still 40 uVpp with R15-tap and R/C oscillator.

Now I changed only the fuses to XTAL oscillator with 20 MHz XTAL and:
Noise on ADC25 went down to around 10uVpp (which is the normal LTC2400 noise).
Readings are stable now. current consumption (with sleep mode active) is 11.6 mA

So now I think we cannot use the internal R/C oscillator.

with best regards

Andreas