Author Topic: LM399 based 10 V reference  (Read 339539 times)

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Offline pigrew

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Re: LM399 based 10 V reference
« Reply #950 on: March 18, 2019, 09:15:09 pm »
Small updates on my PWM implementation:

I've received the boards I've ordered, and have built up a MSP430 MCU board, finding out I've made a few mistakes along the way (but nothing unfixable)....

The MCU can operate in two modes: free running at up to about 1 GHz, or XO-disciplined at up to about 400 MHz.

Running with a 8MHz XTAL, multiplied to 24 MHz, used to discipline a 384 MHz timer clock, outputting 10 kHz, uses about 2.7 mA @ 3.3V. stdev(period) ~ 18.3ns, p-p(period) ~ 120. Enabling "clock error accumulation" correction increases the jitter slightly, but probably should be left disabled in this application.

Free-running with a 256 MHz clock uses about 1.2 mA, though with a much higher temperature-coefficient. stdev(period) ~ 21ns, p-p(period) ~ 135.

These measurements were performed with a MSO-X 4154A oscilloscope, having it measure the period of a single output cycle.

I think my preference would be XO-disciplined because of its much lower TC. The higher current consumption can be mitigated by using a switching DC-DC converter (though not the one that I had originally chosen).

Next up is populating my analog board... I like the MSP430 enough that I won't bother with the STM32F334.

One interesting thing was that when setting the period, the lowest 3 bits are ignored in 8x clock mode, and the lowest 4 bits are ignored in 16x clock mode. The pulse width parameter is controllable with full 16-bit resolution.

(Some of the mistakes: The pins I used for TD0 have higher channel->channel skew than the other available pins. Also, TD0.0 can only output the full period, not PWM (unless you set the period to a power of 2 (2^12, 2^14, 2^16, etc). Next revision will use TD0.1 and TD0.2 as the outputs. The micro's FLL only multiplies, but doesn't divide, so it is not very adjustable if you use a high-frequency XTAL. Oh, and I mixed up the pins of the LDO regulator on the PCB.)

Once I get the whole thing running well, my plan is to integrate the boards back onto a single PCB.
 
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Offline pigrew

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Re: LM399 based 10 V reference
« Reply #951 on: March 25, 2019, 01:25:10 am »
I've developed firmware for the MSP430 to run the PWM using sigma-delta modulation, plus built up enough of the analog PCB to be able to output a somewhat stable 10V. Yay.

Source code is posted athttps://github.com/pigrew/msp399pwm.

In terms of performance, it (or the Keithley 2000) is reasonably stable (staying within 30 uV of 10V over a few minutes) and quite adjustable (32-bit resolution). The PWM adjustment ISR takes about 3.5us, allowing operation at over 50 kHz without glitches (faster in the future with further optimization). The circuits draws about 20 mA at 18V and 18C, most of which is the LM399's heater current. The MCU board uses a DC-DC converter while all of the analog circuitry is driven at 15 V with a LDO. I have a simple RC filter at the output (10u/4.7k), but will populate the output amplifier soon.

A plot of a quick frequency sweep is attached, showing a gain of 0.069 mV/kHz.
 
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Offline imo

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Re: LM399 based 10 V reference
« Reply #952 on: March 25, 2019, 12:03:45 pm »
While curious about how your 32bit DAC works and looking at the code and SD DAC whitepaper you refer to, let me kindly ask you - does it mean you modulate (within a periodic ISR) a 16bit PWM duty with the sigma delta modulator's 1bit output?
 

Offline pigrew

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Re: LM399 based 10 V reference
« Reply #953 on: March 25, 2019, 01:33:53 pm »
While curious about how your 32bit DAC works and looking at the code and SD DAC whitepaper you refer to, let me kindly ask you - does it mean you modulate (within a periodic ISR) a 16bit PWM duty with the sigma delta modulator's 1bit output?
Yes, that's exactly what I do.

At 10 kHz, the base PWM is only using 15.2 of the 16 bits, but I specify the resolution with 32-bit precision over the serial terminal.  It uses the left-over bits as input to the modulator
 

Offline imo

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Re: LM399 based 10 V reference
« Reply #954 on: March 25, 2019, 05:53:58 pm »
Ok, the LSB of the 15.2bit 10kHz PWM "duty" is resolved by the 16.8bit SD modulation, basically. What is the SD's isr() frequency (or period)? [I can see there 3.13us in the comment but it does not fit into my current understanding of the process..]
« Last Edit: March 25, 2019, 06:00:07 pm by imo »
 

Offline pigrew

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Re: LM399 based 10 V reference
« Reply #955 on: March 25, 2019, 08:15:12 pm »
Ok, the LSB of the 15.2bit 10kHz PWM "duty" is resolved by the 16.8bit SD modulation, basically. What is the SD's isr() frequency (or period)? [I can see there 3.13us in the comment but it does not fit into my current understanding of the process..]

The ISR is called once per PWM period and the ISR takes about 3.1us to complete. With a period of 100us, this leave plenty of time for other tasks to happen in the MCU.

The ISR is called at the timeout of Timer_D (which is the CCR0 value in up mode). At this point, the "CCR1" is latched into the "CL1" register and the ISR is triggered. The ISR takes about 3us to compute the next sigma-delta bit, which it'll use to update the CCR1 register. The interrupt latency plus the processing time (about 3us) must be shorter than the duty cycle in order to ensure the duty cycle is updated before the next period starts.

I also have the UART and systick using interrupts. While the TD0CCR0 has a quite high priority, I have not enabled interrupt nesting which would have allowed it to preempt the lower priority interrupts. So, I must have the sum of the the durations of the TD0CCR0 and UART ISRs to be shorter than the PWM period so that CCR1 can be updated in time for the new value to be latched when TD0 times out.

My UART ISR is very non-optimized currently such that some D-S computations will take too long if the PWM freq is set to >50kHz.

See the attached diagram.

EDIT: (If anyone wants to build a MSP430 PCB, let me know and I can post updated board files).
« Last Edit: March 25, 2019, 08:27:32 pm by pigrew »
 
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Offline pigrew

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Re: LM399 based 10 V reference
« Reply #956 on: April 01, 2019, 02:33:04 pm »
My firmware work continues on my LM399 implementation. Notable changes include:

  • "Dual"/"1.6 bit"/"three-level" PWM that I mentioned a while ago
  • Corrected readback of TMP411 temperature sensor
  • Optimized ring buffer
  • Rewritten I2C library, on the path to support external EEPROM

Jitter continues to be an issue. The period of the 100us cycle has a P-P jitter of about 450ns. This seems to be caused by the Timer_D oscillator, itself. Fortunately, it seems to be random and does eventually average itself out.

I've also started thinking about what criteria to use for design optimization. My current plan is to focus on two measurements: voltage across temperature and the short-term standard deviation of DMM measurements. The tempco will be measured by a 6.5 digit meter, from about 15 C to 40 C, with the reference placed in an oven (while the DMM is outside the oven). The short-term DMM noise measurement will analyze 50 or 100 NPLC DMM samples (10V range, auto-zero on). I will try to minimize the standard deviation of these.

For the "noise" measurement, I'm getting standard deviations of about 5 uV on a 34401A with 50 samples with NPLC=100 (60Hz). Is this good or bad? I'm not sure. I'm guessing this is close to the noise floor of the instrument, so I may need to start using a second 10V reference, and measuring (10Vref vs MSP399PWM) differentially in order to get the DMM into a lower range.

Are there other measurements I should make?

Another idea I had was if it's a good idea to use the LM399 without its heater. The die temperature could be measured by looking at the diode forward-bias voltage between the heater and the reference circuit, and programming a correction table into the PWM generator. The advantage is a greatly reduced power consumption. Disadvantage is probably quite awful temperature coefficient. One bad thing would be that the two reference circuits voltages would no longer be equal. Why not just use a 2DW232? Because the Zener reference amplifier in the LM399 provides a lower Zener resistance, making the pull-up resistor less critical.
 

Offline Kleinstein

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Re: LM399 based 10 V reference
« Reply #957 on: April 01, 2019, 04:03:53 pm »
A 5 µV noise sounds bad too me. However I don't know how much is normal for the LM399 on the board and inside the meter. One could check this by measuring the LM399 voltage directly - this would give a kind of background noise (multiply by 10/7 to get the noise at 10 V level).
450 ns jitter sounds like awful, even if it over time might average out. From a different circuit with an AVR I think the jitter should be well better than 1 ns, likely better than 100 ps.

The 2DW232 reference usually has a lower noise, but higher TC and an unknown long time stability. To get a good TC it would need something like a temperature stabilization. With a well adjusted current a relatively crude stabilization (e.g. +-0.5 K) could be sufficient.
The idea of the PWM scaling to get 10 V is more like getting a long time stable voltage with a low TC without worrying about resistor aging.
Because of the TC I would keep the heater on. With some extra insulation the power consumption is not that high. AFAIK the LM399 does not mind that much about getting turned on and off. Due to the high temperature there should be little hysteresis, as one is always coming from below.
 

Online Andreas

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Re: LM399 based 10 V reference
« Reply #958 on: April 01, 2019, 08:13:11 pm »
For the "noise" measurement, I'm getting standard deviations of about 5 uV on a 34401A with 50 samples with NPLC=100 (60Hz). Is this good or bad?

Another idea I had was if it's a good idea to use the LM399 without its heater.

Hello,

5 uV standard deviation is rather high (I have this as Peak/Peak value on a HP34401A).
It also depends if your measurement is made slightly above or slightly below 10.000000V
The resolution switches from 100nV to 1uV above 10V on the interface.

So I have 1.1uV standard deviation for the output of the ION (ATTINY version)
and 0.76uV standard deviation with a much higher resolution at 6.8V.
Around 2000 values each measured after warm up with 100 NPLC (50 Hz).

I personally would not use a LM399 without heater. I would use a AD587 10V reference when I want to save energy. (see the AD587LW project).

with best regards

Andreas
 

Offline e61_phil

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Re: LM399 based 10 V reference
« Reply #959 on: April 01, 2019, 08:25:08 pm »
If you connect the 34401A to a computer anyhow, I would use 10NPLC with 10 samples  instead of 100NPLC. The 34401A can't do more than 10NPLC and the math doesn't work correct if the meter does the averaging. And you don't loose resolution above 10V.

I also see far below 1ppm pp with my 34401As
 
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Offline Kleinstein

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Re: LM399 based 10 V reference
« Reply #960 on: April 01, 2019, 08:37:08 pm »
If it is about getting the noise introduced by the PWM, one could measure the difference from the 7 V LM399 to the 10 V output. This would reduce the reference (both the external and DMM internal) noise by about a factor of 3.
 

Online Andreas

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Re: LM399 based 10 V reference
« Reply #961 on: April 02, 2019, 05:53:19 am »
Jitter continues to be an issue. The period of the 100us cycle has a P-P jitter of about 450ns.

Hello,

that was about the relation when I measured from rising edge to rising edge (which is modulated).
When measuring from falling to falling edge I have less than 1 ns (which is the scope resolution).
So typical I have 3-4 mHz standard deviation in 10 kHz. (shurely also limited by the scope resolution).

But it could also be that the PLL is not stable enough.
(Similarly to the R/C oscillator in ATTINY which made visible jumps by some counts on the 34401A)
That could be seen when switching off the modulation of the fractional part of the ION.

with best regards

Andreas
 

Offline imo

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Re: LM399 based 10 V reference
« Reply #962 on: April 02, 2019, 06:02:28 pm »
His 100us PWM period is with 15.2bit resolution, afaik. That is 2.6ns LSB and thus the 1bit SD modulation jitter is 2.6ns.
When reading TI's forum I see there people complaining on the DCO FLL jitter which could be several % short term.
Most probably those 450ns come from there..
« Last Edit: April 02, 2019, 06:10:55 pm by imo »
 

Offline pigrew

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Re: LM399 based 10 V reference
« Reply #963 on: April 03, 2019, 04:33:45 am »
Thanks for the suggestions. I did some more measurements and tweaks on the MSP430 and got it down to 100 ns p-p jitter.... still pretty bad.

I quickly ported my code to the STM32F334 (running with a 128MHz*8=1.024GHz clock) and the oscilloscope was giving figures on the order of 1 ns for the p-p jitter. Much better. The downside is that the HRTimer uses about 40 mA! This may still be within the power budget when using a switching converter. I'll do some more careful measurements in the coming days. I guess the question is if the faster (1GHz) timer with its higher clock jitter and power consumption is worth it compared to a slower (64 to 128 MHz) lower power, lower-jitter PWM generator. I'm becoming pessimistic about the usefulness of the MSP430.

Code is in the same github repository.
 
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Offline imo

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Re: LM399 based 10 V reference
« Reply #964 on: April 03, 2019, 06:30:21 am »
There is not such thing like ~GHz clock in '334. As I wrote earlier, there is a 144MHz Xtal derived internal clock, used together with a 32taps delay line (voltage and temperature compensated) which together create the "virtual" up to 144Mx32 PWM clock. Thus you may use 144Mx32 as well as the power consumption should be the same, imho. Would be good to try whether those 40mA change with the highest PWM "clock".
 

Offline Kleinstein

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Re: LM399 based 10 V reference
« Reply #965 on: April 03, 2019, 02:45:27 pm »
Juts for a stable 10 V source, there is no need for the super high resolution PWM. Just having some 10-12 Bit PWM with some 10 MHz base frequency would be good enough with the additional SD like modulation.

As the LM399 is only stable (over the 2 nd year) to maybe 5 ppm, there is not much sense in an adjustment much finer than 20 Bits. So the 22 Bits of the original project is fine.

AFAIK the high resolution PWM in the STM32 need the high µC clock and this causes quite some power consumption. It could get better with heavy power saving modes, but this could again cause jitter or ripple from a modulated supply current.

One point possibly worth a look would be the ADG419 switch. It is relatively slow and might cause some jitter. One might consider a faster switch, maybe even 74HC4053 - it's faster but would need a kind of +-5 V supply.
 
 

Offline Magnificent Bastard

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Re: LM399 based 10 V reference
« Reply #966 on: April 03, 2019, 04:48:47 pm »
There are a number of microcontrollers and digital signal controllers that offer a "High Resolution Timer" in the form of a 16-bit PWM followed by a 32-stage selectable delay line.  Some of these control the accuracy of the delay line transparently in hardware, while most of them require firmware support to do this.

A straight delta-sigma approach with a smaller number of primary bits can have code-dependent low frequency artifacts that are near impossible to filter.  The HR-PWM approach either eliminates this problem, or reduces it to a minimum if you still want to "dither" the lowest bit for even greater resolution.  For example, a 16-bit timer, with an additional 5 bits (through the delay line) results in a LSB that represents only 10V/2^21 (~4.77uV).  In this case, if you are "dithering" the LSB, the possible code-dependent artifacts are limited to 4.77uVpp (and will be much lower after the filter).

The "trick" is to find a part (an MCU or DSC) that has a full hardware controlled HR-PWM, that doesn't require a nuclear reactor to operate, and the filter can be something that is reasonable and low cost.
 
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Offline pigrew

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Re: LM399 based 10 V reference
« Reply #967 on: April 03, 2019, 05:20:23 pm »
There are a number of microcontrollers and digital signal controllers that offer a "High Resolution Timer" in the form of a 16-bit PWM followed by a 32-stage selectable delay line.  Some of these control the accuracy of the delay line transparently in hardware, while most of them require firmware support to do this.

Would you mind giving some examples of the microcontrollers/ICs you mention with the selectable delay lines? (I've only found the STM32F334 and MSP430F5172)

EDIT: Ah, I see, something like NXP MC56F827xxx (NXP's "nanoedge").



One issue is that the rising edge has to be delayed separate from the falling edge. Do the parts you mention support that? Or one could use digital logic circuits (AND) to combine a delayed and non-delayed output to generate the different fractions.



Once I get a chance, I'll measure the STM32F334 current consumption with the various dividers enabled, and at 128 + 144 MHz (the two allowable clock frequencies allowed with the DLL). Would a spectrum analyzer (with a DC blocking cap) be a reasonable way to measure the phase noise? Or one-shot period measurements with a Racal 1992 (with 1 ns resolution)? (measured with delta-sigma modulation off)
« Last Edit: April 03, 2019, 07:31:06 pm by pigrew »
 

Offline imo

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Re: LM399 based 10 V reference
« Reply #968 on: April 03, 2019, 06:20:36 pm »
The '334 hires pwm is with 16bits resolution only. I would be happy to know more chips with 16bit pwm at 4.6GHz pwm clock, indeed.
 

Online Andreas

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Re: LM399 based 10 V reference
« Reply #969 on: April 03, 2019, 08:28:13 pm »
As the LM399 is only stable (over the 2 nd year) to maybe 5 ppm, there is not much sense in an adjustment much finer than 20 Bits. So the 22 Bits of the original project is fine.

Not my opinion:

20 bits = 1ppm steps at the tap would give 14uV steps (like popcorn noise) if you change the pwm by one count.
I want to compensate the temperature of the AD419 by changeing the PWM.
So to not get any "popcorn noise" by temperature compensation one step has to be much smaller than around 0.5-1 uV so that it is within the LM399 1/f noise level. So I need at least 16 times more than 20 bits for the final cirquit.
Of course one also could compensate for the ageing too. (which is usually 1-2 ppm/year after some run in phase).


One point possibly worth a look would be the ADG419 switch. It is relatively slow and might cause some jitter. One might consider a faster switch, maybe even 74HC4053 - it's faster but would need a kind of +-5 V supply.
You are welcome to set up a cirquit with the 74HC4053 and make some comparisons.
If you have the cirquit you could also replace the 74HC4053 by a MAX4053A (which is better in charge injection and leakage currents).

with best regards

Andreas
 

Offline Magnificent Bastard

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Re: LM399 based 10 V reference
« Reply #970 on: April 03, 2019, 08:57:01 pm »
The '334 hires pwm is with 16bits resolution only. I would be happy to know more chips with 16bit pwm at 4.6GHz pwm clock, indeed.

It's not very clear how this works in the datasheet, so you have to go to the reference manual for this part.  Yes, the PWM DIGITAL timer is 16-bits.  BUT--- that PWM output *can* be followed by a fractional-clock delay.  One 144MHz clock period is divided by a 32-stage delay line, which is delay-locked to the 144MHz master clock.  So, you can delay the PWM by 0..31 fractions of a single master clock.  This provides the equivalent of 5 extra bits, without having to crank the clock up to 4.4GHz (which the technology would not handle anyway).

So, what we are saying, is that with a 144MHz clock with a 16-bit PWM delayed extended by a 32-step fractional-clock delay line, you get the equivalent of a 21-bit PWM driven by a 4.4GHz clock.

You can connect an external AND-OR gate (SN74LVC1G0832) to the PWM output and two extra GPIO pins.  You set up an interrupt on the positive edge of the PWM and another on the negative edge.  These two interrupt routines control a 'PWM-FORCE' signal (which goes to the OR gate input) and a 'PWM-ENABLE' signal (which goes to one of the AND inputs)-- with the original PWM going to the remaining input of the AND gate.  This can provide an extra 4-bits of resolution, where the PWM controls both the positive and negative edges (and the force and enable signals are not that critical).  This can be (practically) a 25-bit DAC without any dithering at all.  If you want even more resolution, you can add (maybe) 3 more bits on the bottom, that dither the 25th bit, providing 28-bits total-- and the code dependent low frequency artifacts will be very small.

Get it now?
« Last Edit: April 03, 2019, 08:59:02 pm by Magnificent Bastard »
 
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Offline pigrew

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Re: LM399 based 10 V reference
« Reply #971 on: April 04, 2019, 12:10:02 am »

You can connect an external AND-OR gate (SN74LVC1G0832) to the PWM output and two extra GPIO pins.  You set up an interrupt on the positive edge of the PWM and another on the negative edge.  These two interrupt routines control a 'PWM-FORCE' signal (which goes to the OR gate input) and a 'PWM-ENABLE' signal (which goes to one of the AND inputs)-- with the original PWM going to the remaining input of the AND gate.  This can provide an extra 4-bits of resolution, where the PWM controls both the positive and negative edges (and the force and enable signals are not that critical).  This can be (practically) a 25-bit DAC without any dithering at all.  If you want even more resolution, you can add (maybe) 3 more bits on the bottom, that dither the 25th bit, providing 28-bits total-- and the code dependent low frequency artifacts will be very small.

Get it now?

I think I see what you're suggesting.

I think we need to run the final PWM at between 5 and 30 kHz to allow for a reasonable analog filter. The extra bits you output let you construct a few extra MSB that are controlled in software. This also allows the internal timer clock/DLL/whatever to be run at a speed (providing a better time-resolution).

However, I don't see how you could add many more bits without going to much lower resultant PWM frequencies. For example with the STM32F334, the internal PWM period could be up to about 62 kHz (with f_HRTIM=128 MHz*32, 16 bit), and add three extra bits to get a final PWM rate of 7.75 kHz (without dithering). I'm not sure that it's a good idea to go any slower than that.



During my testing of the 'F334, I'm now reading about 53 mA. No matter what I do (other than turning off the HRTIM unit), I can't get the current draw to significantly decrease. I've tried, for example, disabling the unused subtimers and setting their clock dividers to the most divided.

I did also order another dev board today, a TI launchxl-f28027. I'll report on how its PWM generator performs (and current consumption).
 

Offline Magnificent Bastard

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Re: LM399 based 10 V reference
« Reply #972 on: April 04, 2019, 12:39:30 am »

You can connect an external AND-OR gate (SN74LVC1G0832) to the PWM output and two extra GPIO pins.  You set up an interrupt on the positive edge of the PWM and another on the negative edge.  These two interrupt routines control a 'PWM-FORCE' signal (which goes to the OR gate input) and a 'PWM-ENABLE' signal (which goes to one of the AND inputs)-- with the original PWM going to the remaining input of the AND gate.  This can provide an extra 4-bits of resolution, where the PWM controls both the positive and negative edges (and the force and enable signals are not that critical).  This can be (practically) a 25-bit DAC without any dithering at all.  If you want even more resolution, you can add (maybe) 3 more bits on the bottom, that dither the 25th bit, providing 28-bits total-- and the code dependent low frequency artifacts will be very small.

Get it now?

I think I see what you're suggesting.

I think we need to run the final PWM at between 5 and 30 kHz to allow for a reasonable analog filter. The extra bits you output let you construct a few extra MSB that are controlled in software. This also allows the internal timer clock/DLL/whatever to be run at a speed (providing a better time-resolution).

However, I don't see how you could add many more bits without going to much lower resultant PWM frequencies. For example with the STM32F334, the internal PWM period could be up to about 62 kHz (with f_HRTIM=128 MHz*32, 16 bit), and add three extra bits to get a final PWM rate of 7.75 kHz (without dithering). I'm not sure that it's a good idea to go any slower than that.



During my testing of the 'F334, I'm now reading about 53 mA. No matter what I do (other than turning off the HRTIM unit), I can't get the current draw to significantly decrease. I've tried, for example, disabling the unused subtimers and setting their clock dividers to the most divided.

I did also order another dev board today, a TI launchxl-f28027. I'll report on how its PWM generator performs (and current consumption).

The 334 can have a 144MHz clock, which is what you want to run it at to take best advantage of the HR-PWM over temperature.  144MHz/65536 = 2.197KHz (the 'natural' hardware PWM output frequency).  2.197KHz / 16 = ~137Hz (the PWM frequency after the firmware division, as above).

A filter for 137Hz is EASY, since you would be filtering the output of the Delta-Sigma integrator, which will have a rather small triangle wave with some spikes due to the finite slew rate of the op-amp.  Just a 3-pole filter would do it, and the 137Hz remaining would be well below the noise floor.
 
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Offline pigrew

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Re: LM399 based 10 V reference
« Reply #973 on: April 06, 2019, 07:52:11 pm »

A filter for 137Hz is EASY, since you would be filtering the output of the Delta-Sigma integrator, which will have a rather small triangle wave with some spikes due to the finite slew rate of the op-amp.  Just a 3-pole filter would do it, and the 137Hz remaining would be well below the noise floor.

Your comment encouraged me to do a frequency sweep using a signal generator for the PWM instead of using a micro. In this case, it's a 33520B driving two 71% PWM signals (out of phase) to drive my dual-PWM analog board (with a Sallen-Key output filter). There ended up being a nice region around 700 Hz where the output voltage was less dependent on frequency, which would be great to capitalize on.

Investigating microprocessors, I have the following comments:
  • MSP430F5172: On paper, this seems great, but the board I built have AWFUL jitter, even in free-running mode. Its 16-bit timer_D operates based on a 256 MHz to 1 GHz oscillator. I wonder if I could have damaged the IC during soldering?
  • STM32F334: This does better, as it has <1ns p-p jitter. Its timer uses the delay lines as described by Magnificant Bastard. The hardware handles all the internal delay line calculations and provides only 16-bit resolution. The main down-side is its current consumption, approximately 40 mA
  • TMS320F28027F: Slightly more expensive, but this is currently the most promising. It gives independent control of the delay and 16-bit counter, so in effect has about 22 or 23 bits of resolution. I don't know how uniform the delay line elements are, so there could be some linearity issues in the lowest bits. There is provided software which measures the number of delay line elements equivalent to one timer clock (151=7.2bits in my case with a 50 MHz clock).
  • STM32G071*: I have not tested it, but this seems low power but does not have a high-resolution mode. It can operate its timers at 128 MHz.
    • NXP Nano-edge: These have delay lines similar to the TMS320 C2000's, but have longer delays per element, so lower resolution.

    For the F28027F, I would lean towards no delta-sigma modulation, as there should be enough resolution already! With a 50 MHz clock, the 16-bit timer provides a frequency of about 760 Hz. 16-bits from the timer fundamental, >6.5 from the high resolution delay line, and an extra bit from the dual-PWM output, yielding >23.5 bits, which is equivalent to a 1.2uV resolution, perhaps a bit higher than the noise, but should be perfectly good enough for a LM399-based reference. The quantization noise of the delay line (which changes over time/temperature) would make delta-sigma more tricky to implement.

    On the other hand, the STM32G071 provides a 128 MHz 32-bit and a few 16-bit timers. For 24-bit accuracy at 128 MHz using dual PWM, one would need a period of about 60ms (2^(24-1)/128e6).

    Assuming the power consumption is reasonable, both of the above should give good results. My guess is that the STM32G071 would be lower power, but it's too hard to tell without testing them.

    EDIT: I forgot to mention that these were measured differentially against my PPM-brand voltage reference. They were run overnight, but there is seemingly little shift between the references over night (Each voltage point represents many measurements). I did a quick repeat test with the two PWM signals in phase; there was no significant difference between the two runs. I guess I can look at the higher-frequency noise with a spectrum analyzer or DSA (DC-blocked).
« Last Edit: April 06, 2019, 09:24:01 pm by pigrew »
 
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Offline imo

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Re: LM399 based 10 V reference
« Reply #974 on: April 06, 2019, 09:21:52 pm »
What is the -3dB of your 2pole SK filter?
« Last Edit: April 06, 2019, 09:24:30 pm by imo »
 


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