LM399H based reference with multiplying DAC

[ejd.pol]

Hello,

Reading many (many) posts on this forum, I got interested in making a voltage reference for my own (hobbyist) use.
As always, I try to do something new, and the fun is in learning from it.
The purpose of this post is to describe my thoughts and ideas, and even show an initial schematic,
in order to receive your feedback regarding improvements and corrections. (I am sure this initial design is _not_ perfect! )

I would like to make a voltage reference that is stable, with a fair amount of accuracy, say, 4 to 5 digits.
The challenge is to reach that goal on a relatively small budget.

I do happen to have an LM399H reference, which I bought some time ago, expecting it would come in handy someday.
So this reference is a natural point of departure. One of the messages in the posts on this forum is that
for a decent reference, the required precision resistors easily outweigh the reference in terms of cost.

So in he background (I do have a job! ) , I started to think about how to achieve stable and accurate voltage division.
The other day I got the idea to use a multiplying DAC for that purpose. When I checked the specs,
the internal resistor chains have accuracy and tempco numbers ranging in the low ppms, so that fits my target nicely.

The resolution would also have to be in that general range, so I started looking around for a 16-bit multiplying DAC.
Comparing specs and prices here and there, in the end I converged on the AD7849 (2 ppm FSR/C, 6 LSB accuracy @ 25C).
Over the entire temperature range, the numbers are worse (but still quite decent!), but I do not intend to use the reference in my freezer.

Well, one thing led to another, and the result at this point is an initial schematic design in Kicad.
The design is a bootstrap configuration: the reference is biased based on its own output (I like that!).
The DAC makes a nice round 10 V from the irregular zener voltage, and a few opamps are used to transport the voltages back and forth.
No discrete precision resistors, no trimpots! 

The part I did not put in the design is the microcontroller needed to load the appropriate value in the DAC.
Just about any micro with four GPIO pins available can do that job. I plan to use an Arduino Uno to get going,
and perhaps later once the design has settled, I will switch o a smaller device.

Of course, the trick is to load the 16-bit value that makes the output as close as possible to 10 V,
and finding that value is the equivalent to trimming the pots. For that, I will need access to a good reference! 

I happen to have a nice enclosure of what used to be an OCXO, about 5x5x2 cm, with 2 ground pins (connected to the case)
and 4 signal pins. I intend to use it to contain the part in the dashed area in the schematic.

Last but not least, I do have some questions at this point, and I would highly appreciate your responses to them:

-The bootstrap loop to bias the zener has quite some delay in it: two opamps and the DAC itself. Does it need filtering for stability?
 I would guess not, as I expect the gain to be less than 1, due to the zener. Is that correct?

-There is still one signal pin left unused on the enclosure. What to do with it?
  For example, it could be used for a temp sensing diode, or it could be used to make the 3k resistor external
  (that would lower the power dissipation in the box)

-Speaking of which, the 3k resistor is used only to offload the biasing opamp, as it supplies the bulk of the current
  needed to regulate the zener. I would expect the circuit to work (almost) as well without it. Is it a good idea to leave it in?

-Are the LT1013 opamps ok to use, or should I use some other type? (I know, this is a loaded question...  )
  My preference is to use one dual type in an 8-pin package, but I will use two single types if recommended.

-Is the 79L15 good enough to feed the negative supply for the DAC, or should I upgrade to something better?
 (two cascaded LM337 perhaps?)

-Is the LT3042 overkill? It does supply +15V for the DAC and indirecly supplies the LM399H, so I will use it if it makes a difference.

-Would placing the LM399H in a shielded enclosure make a difference, temperature-wise or EMC-wise?

And of course any and all other comments are very welcome too!

Evert-Jan

[BD1QMP]

16bits with 6 LSB accuracy, for 10V, the accuracy is about 1mV, not good enough for 5 digits. maybe you can use 2 12~14 bits DAC to get 21~24 bits DAC.

LT 1013 was used on a lot of 6 digits multimeters.

[Kleinstein]

It is a little strange to use a relatively expensive AD7849 just to get a fixed 10 V.  The specs of this ADC are lacking some DC / low frequency details. The way it is build with the S&H stage make me suspect that it could have quite some low frequency noise and drift from the internal amplifiers. 
A DAC would mainly make sense in a confuguration where it is used also for a variable setting. So for a voltage source with variable setting.
So this would need a separate bootstrapping circuit for the zener current, not using the DAC output.  This part does not have to be super accurate.
The bootstrap loop for the zener is not critical for loop stability as the zener is low impedance (1 Ohm range) and thus a high noise gain (e.g. > 1000) for the amplifiers. So no extra compensation is needed.

The LT1013 is a relatively strange choice, unless one really needs single supply operation. It is a bit noisy and has a odd pin-out in the SO8 case.
My preferred choice would be OPA202 or OPA2202 for a dual.

There is no needs to additionally buffer the ground for the output. An extra OP-amp at the low side may make sense if one wants a 4 wire output with separate drive and sense terminals to also drive a little higher load current (e.g. > 100 µA). The LM399 reffference circuit could drive the AD7849 ref input (some 30 K) directly, no extra buffer needed there. This may change for a different DAC.

78xx and 79xx voltage regulators should be good enough. The L version with the relatively small case could get a bit hot. So I would prefer the TO220 case, if the space is there.

[ejd.pol]

Thank you for the responses!

@BD1QMP:

I would expect the accuracy of the reference to be higher than the accuracy of the DAC, because inaccuracies of the DAC are compensated for in the trimming.
The DAC response is monotone by design, so my expectation would be that the accuracy of the reference is (very) close to the resolution of the DAC.
So my expectation would be that an accuracy of at least 4 1/2 digits can be obtained, which is right in the middle of my target.

And combining two 12-bit DACS would require precision resistors, wouldn't it?

@Kleinstein:

I think you are saying that it is not needed to have a feedback from the DAC to the bias of the zener, the reference would be just fine without it.
And the removal of this feedback to the bias would free up the DAC to also produce output values other than 10 volt.
In that case, the reference can be calibrated on 10 Volt (and possibly even at other values, like every integer volt, for example),
and the microcontroller can interpolate these points to other voltages in between. That would make sense! 
In that case, it would seem prudent to indeed use something like an LT3042, I guess?

Indeed, there is no spec at all concerning drift. That is something that only time will tell, I guess...

Regarding noise, I guess that figure 3 in the datasheet shows some typical behavior, where noise RMS output is about 0.5 mV.
If I understand the measurement in that figure correctly, it is done with static DAC code, just like in the voltage reference case.
The signal input is the REF+ pin, and a scaled version of the input signal is subtracted from the output signal in order to get the noise, right?
I would expect roughly the same output on a clean DC signal being fed into REF+.

The use of opamps was intended to make Kelvin contacts, and to isolate the reference from outside influences as much as possible.
In that sense, I tried to make a difference between analog ground and zener-.
For example, that is why I deliberately connected the ROFS pin of the DAC to REF-, in stead of analog ground.
(So the zener circuit also needs to drive the resistors in the output buffer)
If the LM399 is not helped by all that, then 3 of the 4 opamps can be removed!

The LT1013 may not be the most silent device there is, but I would hope that the noise of the LT1013 is small compared to that of the DAC?

Many thanks for all feedback!

 

[Nanitamuscen]

Look at how the person under the nickname adver did. Information can be found on this forum by the query "adver". If you need more information, please contact.

[GigaJoe]

for some schematic i use 2  of 10-12-14 bit DACs with summing amplifier ,  DAC has to be Ext Vref.  that gives me "coarse"and  "fine" tuning with significant complication of code as you need to calculate that exact dac you moving to get desired output.   coarse DAC Ref at 5V  fine DAC ref 0.5V form hammond Div. with minimal tempco.  summing resistors as well chosen for desired range.

for 5V output , depend on components for 12bit  dac im perfectly adjust on 0.1mV steps on output by "fine" dac, probably realistically possible to go one step more as 0.01mV

[ejd.pol]

@Nanitamuscen:

Thanks for the pointer, I had actually seen this design some time ago. Nice idea to use the controller to generate the waveforms to drive a switch.
That approach effectively could replace the voltage divider. Although, in the feedback loop, on the far right in the schematic, I still see some precision resistors.
Could you explain how this works and why that resistor divider is needed?

By the way, is the way that the switch is operated a true PWM approach, so a waveform of fixed frequency, but with varying duty cycle?
In that case it might be worth while to consider a true sigma-delta approach: this would eliminate the fixed frequency, so the filtering requirements become a lot easier.
The calculations required for the sigma-delta are more than for PWM, though still modest (no resonators are needed or even wanted), and accuracy at DC is stellar!

[ejd.pol]

@GigaJoe:

I had thought about using 2  AD7243 12-bit DACs working together to achieve higher resolution.
A few of these DACs are in my junk box, left over from a previous GPSDO project.
In that project, I did combine the outputs with two common 1% resistors of 10K and 39 Ohms.
Precision or low tempco was not needed, as the GPSDO works with a feedback loop, continuously correcting for inaccuracies of all kinds.

For this project, that would be a different story, as in this case the box should be accurate without the presence of an external reference.
So again the question is: how to avoid precision resistors?

One way I could think of is to feed the output of the first DAC into the reference input of the second.
That way, the division ratios of the two DACs are multiplied, in stead of added. That complicates finding the "right" settings of the DAC quite a bit.
So much so that it is not possible anymore to calculate the best code. But if you don't mind, you can search for the best code!
And for this application, searching for, say, a day of compute time would be perfectly acceptable.

I implemented the multiplication behavior of the two-DAC cascade, and wrote an algorithm to search for the best codes.
You have to make some choices here and there, in order to keep the search time very reasonable (a few dozens of minutes, that is).

The approach would be as follows: The search scans a certain number of codes for the first DAC (not all of them),
and for every code selected, it calculates the best code for the second DAC. Then it calculates the deviation from the wanted output.
Once that scan is done, the code pair with the smallest deviation is chosen the winner. That's really all there is to it.

When I do this for many thousands of randomly chosen zener voltages in the neighborhood of 7V (LM399, LTZ1000, 2DW232, and the like),
and set the wanted output value to 5V exactly, then the result is that in the selected search space, there is always a code that gives at least 18 bits of accuracy.

The only reason for not going this direction for me was the specs for the 12-bit DAC.
Of course, the resistor ladder in a 12-bit DAC is designed for 12-bit accuracy. You can see that in the datasheet.
So, trying to squeeze out a bit more accuracy by relying on typical performance in stead of guaranteed performance is ok for hobbyist use (like mine),
but I did not want to rely too much on that. Mt goal was to aim for 16 bits of accuracy. That is 4 more bits than 12,
and that is equivalent to more than an order of magnitude. That is too far of an extrapolation from guaranteed to typical, I'd say.

That is why I started looking around for a true 16-bit DAC, where all the internals are designed to reach that level of accuracy, and found the AD7849.
It is certainly not ideal as Kleinstein already rightfully pointed out, but i hope it suits my needs. The big question mark is indeed how it will drift over time.
I am willing to give i a try, and at the very least I will learn from it!

[Kleinstein]

The problem with combining 2 x 12 bit or similar DACs is that the DACs are usually not much more stable than there resolution. This problem exists even more in the 2 DACs in series version.
One could still use the 2 DACs combined for a high resolution, but limited stability DAC and than use a ADC chip as a feedback mechanism. There is an Linear tech. application note on this. This could work for a 5 V output, but gets tricky with a higher voltage than the ADC chip can handle.

A possible way to get a stable, though slow DAC is to use PWM and filtering. This is the way many of the Fluke calibrators work, with some added effort to also make it highly linear and not just stable.
There is a project around here in the forum for a 7 t o10 V step with PWM in the feedback. In this case not super linear, but quite stable.
The control can be pure PWM or a kind of sigma delta. As switching causes errors one does not want a high switching frequency. So it would not be a traditional SD DAC, but more intermediate with switching between a few PWM settings. So mainly PWM with maybe another 2-4 bits in a SD type way. If really needed one can combine PWM for the coarse part also with a DAC chip for the fine part.

[ejd.pol]

@kleinstein:

It is possible to restrict the quantizer in a sigma-delta to not switch, say, high to low, shortly after it has made a switch from low to high (and vice versa).
So the restriction is that it is not allowed to switch a certain minimum number of cycles. After that time has expired, the quantizer may switch at its desire.
That way, the fixed frequency of the PWM is still avoided, while the other nice features of sigma-delta are still maintained (low calculation load,
and accuracy at DC only restricted by the number of bits used in the calculations).

[Tomsik]

I'm quite interested in.. please tell me how the bootstrapping should work in this case. Is it necessary? Should it compensate +15V?
I see it as a closed loop without end or I can't imagine what you want to solve with that...higher DAC's output voltage causes higher REF+, and higher REF+ causes higher DAC's output voltage because it is based on that. Stable state is probably reached when zener diode doesn't respond to dynamic VA change to be recognized and it is balanced with DAC?

[iMo]

@Tomsik: do you mean bootstrapping of the 399 zener? You have to use a separate path for the bootstrapping then - like the standard way we do here, with say a doubler 7V->14V (ie. opamp+10k/10k) and the +14V is then the ref voltage for your DACs..

[ejd.pol]

@tomsik:

The bootstrapping is not strictly necessary. There are designs available that simply tie the biasing resistor to the supply. And even the data sheet has examples that way.
On the other hand, the datasheet also shows a configuration where the biasing resistor is connected to the 10V output.
The advantage of that configuration (and it is the question of how visible that advantage is) is that the voltage on the bias resistor drifts less than in the simple case.
It depends on the circuitry inside the LM399 how such a drift would translate into a change in reference voltage.

You are right that if (for whatever reason) the DAC output increases, this would result in an increase in the REF+ voltage. So, at first sight this would seem to lead to an escalation.
On second sight however, voltages do not run away, because the resulting increase in REF+ is *much* less than the initial increase in DAC output.
That means that the output of the DAC will go down again, and the loop is then stable.
The setup in my schematics is principle the same mechanism as the bootstrap example in the data sheet, it is just that (the gain of) the bootstrap opamp is now inside the DAC.

Hope this helps, pls let me know if more explanation is desired.

[Tomsik]

Thank you for the thorough explanation, I'm glad I was almost completely right.

[boneDragon]

is it possible to improve PWM resolution by Brezenham dithering ?

[HalFoster]

Jim Williams AN-86:

https://www.analog.com/media/en/technical-documentation/application-notes/an86f.pdf

[Andreas]

is it possible to improve PWM resolution by Brezenham dithering ?

Hello,

usually one would use sigma delta modulation to ease filtering.
see the other LM399 10V thread

with best regards

Andreas

[boneDragon]

yes, PWM filter requires large time-constant within seconds..tens of seconds,
but PWM dithering is much easier to implement in MCU, just timer with DMA reload array.
12-bit PWM with 1024-element array gives 22-bit resolution

[Kleinstein]

It makes sense to use PWM dithering instead of a full sigma delta modulation: The switching causes some uncertainty from loading the driver on the reference side, that than needed settling. So ideally one has a minimum time of some 2-5 µs (possibly even longer) between switching events. Even that the swiching parts still has uncertainties from the dead time and possible variations if the timing (jitter causing noise and possible interference with discrete frequencies).  The dithering part on top of some PWM can than still follow some sigma delta like modulation beyond simple 1 st order.

Depending on the complexity of the modulation and PWM part resolution the µC may have enough time to do the calculation in real time and may not need a predified array of PWM settings.