Lowest drift, lowest noise voltage reference (ADR1000AHZ)

[iMo]

In the ADR the 100ohm resistor (wired to its case) is somehow blocked against EMI via the opamp's feedback capacitor (100nF in the DS). That would not work for vhf/uhf frequencies, imho. I would try with an 100pF-1nF ceramic smd parallel to the 100ohm resistor.

[wutieru]

I think it is caused by insufficient aging.

[Kleinstein]

With the 100 nF capacitor (C5 in ADR1000 DS) directly at the OPs FB, adding capacitance parallel to the 100 Ohms would act like capacitive load to the output. Depending on the OP used this may be bad for the stability.  AFAIR Andreas added more to the circuit (AFAIR an additional resistor between pin4 and the OP) in his EMI enhanced version.

With such changes it is a good idea to check the stability / tendency for oscillation in a simulation. With multiple feedback paths and some gain from the transitor the stability is not so easy.

For a practical compact circuit is may be interesting if C3,C4,C5 could be made somewhat smaller (e.g. 33 nF) to make C0G capacitors more feasable.

I would not expect aging to cause sudden jumps. Aging is mainly about the glue / die attach and this is more like smooth, slow drift.

[iMo]

For, say 800MHz - 5GHz (wireless), even a 10pF ceramic smd would help..

[wutieru]

see picture as below:

[MiDi]

I think operating a mobile phone close to the vref is a good check.. For such frequencies even 100nF ceramics do not work well. You would need something like quality 1nF ceramic smd. Mind the ceramic smd capacitors generate voltage under mechanical stress..

Indeed, especially if you are making a call.

You talk about the piezoelectric effect of ceramic capacitors?
It is unrelated to smd, different ceramics show differently pronounced piezoelectric effect, for e.g. C0G type it is negligible.

[iMo]

There is a relation to smd, indeed. Typically the stress on an smd part is higher than with a TH part.
PS: example: the knocking at the bnc connector of an o'scope is a standard test Dave is showing in his teardown videos..

[Kleinstein]

Most THT parts have some extra decoupling from the board stress. However it is not only capacitors that react to stress. Also resistors react to stress and change there value. With resistor arrays in a plastic case it may be easier to get a change in ratio from stress than from temperature.

[3roomlab]

see picture as below:

so this zener seem to only perform best after high temp age "treatment" ? anybody else doing high temp age vs not-high temp aged comparison?
could you talk a little about your 168hr "treatment". like the heat cycling you did?

[branadic]

Eric Modica mentioned in his talk at MM2021 - that's where this graph is coming from that wutieru linked in the post above - that them (ADI) but also their customers prefer a bake&burn for 168 h at 150 °C and observed that it removes low frequency noise. No cycling, no secret recipe, just bake&burn.

-branadic-

[harerod]

Eric Modica mentioned in his talk at MM2021 - that's where this graph is coming from that wutieru linked in the post above - that them (ADI) but also their customers prefer a bake&burn for 168 h at 150 °C and observed that it removes low frequency noise. No cycling, no secret receipe, just bake&burn.

-branadic-

branadic, to make that statement crystal clear: are we talking about baking the powered-down ADR1000 in an oven for one week @ 150°C ?

[Kleinstein]

The graph with the spikes on the low curve for the non baked parts is suspicious. The extra spikes and excursions all happen at the same time for the 5 DUTs. Chances are this is more an effect of the measurement system or EMI and has nothing to do with the treatment. Hard to tell if there is some effect on the noise. That part is hidden under interference.

The drift changes quite a bit. For my feeling it looks like the 168 h at 150 C may be a bit too much / too high, as the dirft changed the direction.
Some high temperature bake is definetly a good idea to let the chemical reaction of a 2 K glue really finish. It help to be above the glass temperature for this.

If the die attach glue stays glassy / amorphous  the rate of cool down from some 140 C to 80 C may have some effect. Not sure if fast or slow cool would be better, both have there merits. A fast (e.g. less than 10 min) cool cold help with stess relieve as the stress can relax before the structure. Slow cool could result in a denser structure and thus slower creep afterwards.

[branadic]

Here is a small snippet of the Q&A session:

Question: Is a burn-in possible with the integrated heater?

That's a very good question. I don't know. It is one of the reasons why we build in the capability to raise the chip temperature all the way up to 120 °C, it's not quite as hot as we would run our typical burn-in, but we will certainly try it and if it works we will publish something in the datasheet. Because yes, we did think about that.

Question: At which temperature did you make the burn-in?

I believe it's a 150 °C.

Question: So simply powering the zener and have the ambient at 150°C and then - what was it? - 168 h or something like that?

Yeah, you know and we haven't tested the bounce of that, we basically just copied the bake and burn of the LTZ1000, which is a 168h both bake and burn. We have at least small sample size evidence that you maybe able to get away with just doing an unpowered bake and that's good enough to disipate the charge but I have to say I haven't looked at it very closely.

Question: Simply elevated temperature or cycling during burn-in? Because, some rumor says cycling around glass transition temperature might improve the aging.

Our burn-in process doesn't utilize any cycling.

So you can see, it's a bake&burn process with the circuit powered, otherwise it would be a bake only. Hope that answers your question.

-branadic-

[Andreas]

In the LTZ pin 4 is just connected to the die and there it connects to the substrate.
Does the special polymer die attach electrically connect the substrate and the package?

Hello,

if you measure the package against 0V you will read about 0.5-0.6V.
So yes: the substrate is somehow connected to the case also in LTZ1000.

with best regards

Andreas

[Noopy]

In the LTZ pin 4 is just connected to the die and there it connects to the substrate.
Does the special polymer die attach electrically connect the substrate and the package?

Hello,

if you measure the package against 0V you will read about 0.5-0.6V.
So yes: the substrate is somehow connected to the case also in LTZ1000.

with best regards

Andreas

Thanks! I have donated my (destroyed) LTZ1000 so I can´t measure the path.
Nevertheless 0,5-0,6V seems to be no hard connection so the ADR can be a little more robust against EMI than the LTZ.
Do you know whether there is a different between the LTZ1000 and the LTZ1000A? This strange polymer die attach with the glass beads doesn´t sound very low ohmic.

[TiN]

Substrate connected to case only on LTZ1000CH. ACH have it isolated.

[Noopy]

Substrate connected to case only on LTZ1000CH. ACH have it isolated.

That would explain a better EMI behaviour. 
The package of the ACH is still no shield since it isn´t connected to anything but it´s better than connecting it to the reference output.

[3roomlab]

The drift changes quite a bit. For my feeling it looks like the 168 h at 150 C may be a bit too much / too high, as the dirft changed the direction.
Some high temperature bake is definetly a good idea to let the chemical reaction of a 2 K glue really finish. It help to be above the glass temperature for this.

If the die attach glue stays glassy / amorphous  the rate of cool down from some 140 C to 80 C may have some effect. Not sure if fast or slow cool would be better, both have there merits. A fast (e.g. less than 10 min) cool cold help with stess relieve as the stress can relax before the structure. Slow cool could result in a denser structure and thus slower creep afterwards.

maybe after 168hr HT-age, it needs the hot/cold modulation cycling.

[branadic]

The graph with the spikes on the low curve for the non baked parts is suspicious. The extra spikes and excursions all happen at the same time for the 5 DUTs. Chances are this is more an effect of the measurement system or EMI and has nothing to do with the treatment. Hard to tell if there is some effect on the noise. That part is hidden under interference.

I was thinking the very same and what we can see there seems to be some common mode effect, not low frequency noise.

Some high temperature bake is definetly a good idea to let the chemical reaction of a 2 K glue really finish. It help to be above the glass temperature for this.

Eric argued, that the bake&burn removes some surface charges. However, I think bake&burn helps for two major effects:

1. curing / hardening the die attach and remove stress introduced by it --> needs to be around/above above glass transition temperature of the die attach and cycling around glass transition temperature would help even more
2. "healing" of the silicon latice from the doping process --> normally rapid annealing with neon lamps is done after doping steps, which doesn't mean that the latice is already back in perfect condition

I can barely remember some website entry / article from an institute / university discussing such investigation for the LTZ1000, but can't seem to find it at the moment.

-branadic-

[iMo]

An annealing process (ie after an ion implantation) is done at around 1000degC for about an hour.
The surface charges might be somehow removed by 150degC (ie gasses/vapors) but they will condense back on the surface afterwards.
So the baking as discussed with Eric is mostly about the epoxy glue, imho.

[Kleinstein]

A burn in at 150 C would not help much with latice defects in silicon. The temperature is just way to low. For annealing the silicon, think about 700°C and up, so nothing to be done with the ready made part.  Some of the process steps to grow a new oxide layer already works as nealing for much of the earlier damage.
If at all it may be some impurities (e.g. hydrogen) to still move inside the silicon, the silicon itself is fixed.

Surface charges can indeed by a problem, but here it would be more like having a surface that is not susceptiple to catch new one. The glow from hot electrons visible with many zeners or transistors in avalance mode is a thing to avoid, as this could also excite deap states in the oxide.
Water can bond relatively strong to the oxide surface: In vaccum it takes some 100 C to get it off in reasonable time. This water causes stress, kind of making the oxide swell.  I have seen the water in/at the surface oxide bend the silicon (though with thin silicon parts). With the sealed case the water is kind of fixed and nothing to get it out or in (not sure which case is better). The water at the surface could cause some hysteresis, like a new relaxation after oven turn on after off for some time.

I would expect the burn in to be mainly about the epoxy / glue. Here there are 2 processes:
1) stress from mismatch in thermal expansion, of the glue, die and case . At the glass temperature or slightly below the relaxation should the fast enough, that there is no more stress from processes before.
2) relaxation in the structure of the amorpous polymer. Well below the glass temperature the material wants to get a denser structure, but the relaxation gets slow and the actual structure is usually less dense than the equlibrium. The degree of order in the strcuture also effects the strength and speed of the relaxation. Initially it can be fast, but once relaxed it can slow down the process quite a bit.

Chances are a good process would be cure at a high temperature, like 150 C (I don't think this would need a full week and I don't think cycling would help), than cool down relatively fast and to a relatively low temperature (maybe even room temperature) to let much of the stress relax with a still relatively soft structure. This step may take quite some time.  Than heat up to a temperaure a little (e.g. 20-30 K) above the later oven temperature (but below Tg - 50K) for some time to get the structural relaxation done, without adding much new stress. The last step may well be with just the internal heater and the zener running.

[wutieru]

Noise Test (using 120R),Magnification：100K
Converted to actual value： about 0.9uVpp

[branadic]

A burn in at 150 C would not help much with latice defects in silicon. The temperature is just way to low.

For a pure bake your statement is right, but for a powered circuit at 150 °C things are different.

-branadic-

[Noopy]

Now let´s take a look into an ADR1000 out of the new batch.








Looks the same like the 1839 ADR1000. 


https://www.richis-lab.de/REF19.htm

 

[Andreas]

Noise Test (using 120R),Magnification：100K
Converted to actual value： about 0.9uVpp

Hello,

can you do a FFT on the aquired data?
there seems to be much non statistical noise on the screen:
either from AC mains frequency or too much bandwith of the scope.
(BW-limiter 20 MHz is active?)

with best regards

Andreas