Lowest drift, lowest noise voltage reference (ADR1000AHZ)

[Noopy]

I didn't find the ADR1001 in myAnalog so I asked the customer service if it is possible to get a small quantity. The answer was promising but I didn't hear more since then... 

[Andreas]

Hello,

I now passed 17 kHrs:

the 10V/7V divider on ADR#01 drift has stabilized perhaps with a slight upward drift.

The 7V outputs of ADR#01 and ADR#02 trend to further settling.

Detailed explanation of the diagrams see post of 14 kHrs
https://www.eevblog.com/forum/metrology/lowest-drift-lowest-noise-voltage-reference/msg5138967/#msg5138967

with best regards

Andreas

[branadic]

Thanks Andreas. I haven't posted recent results for a while as we were waiting for our paper A 10 V Transfer Standard Based on Low-Noise Solid-State Zener Voltage Reference ADR1000 to be published.

Now that this is done I will post some new diagrams soon.

-branadic-

[branadic]

While the above mentioned paper covers an observation time of 850 days, I'm now approaching 1000 days.
For the paper noise measurements of the 10 V output (after 850 days) had to be performed and it was found that the output was slightly oscillating. A bit more capacitance between opamp output and inverting input was added, which resulted in a shift of the output voltage.

Furthermore, the output wasn't as stable as before, powering the reference from my Ultra Low Noise Lab Power Supply Extender for your existing lab supply. Hence why after 920 days I finally switched to a copycat of an LT1533 based power supply, from which it was running since then, but again slightly shifted the output. It will now be interesting to see, if things are stable. Attached is an updated diagram.

-branadic-

[ivo]

While the above mentioned paper covers an observation time of 850 days, I'm now approaching 1000 days.
For the paper noise measurements of the 10 V output (after 850 days) had to be performed and it was found that the output was slightly oscillating. A bit more capacitance between opamp output and inverting input was added, which resulted in a shift of the output voltage.

Furthermore, the output wasn't as stable as before, powering the reference from my Ultra Low Noise Lab Power Supply Extender for your existing lab supply. Hence why after 920 days I finally switched to a copycat of an LT1533 based power supply, from which it was running since then, but again slightly shifted the output. It will now be interesting to see, if things are stable. Attached is an updated diagram.

-branadic-

Is such a shift from change in PSU expected? It's within line voltage regulation? I agree with your paper's conclusion that you should have separated analysis of the standalone zener voltage from the amplification to 10V. As far as I can see - in the modern world although 10V is nice, the only true arbitrary number to choose, if implementing such a choice is not sacrificial to other parameters, is one that will be most easily used and useful to relevant ADCs (e.g near the top of their range[ s ]). I guess the only other competing factor is history - if other references are set to X, also aiming for X potentially allows an tighter comparison by using one as a null point (relative 0).

[dietert1]

If a setup has problems (in this case oscillation and power supply EMI) one needs to solve that. I think the apparent shifts of 3 and then 0.6 ppm are less remarkable than the fact that the first problem went unnoticed more than two years.
The first 920 days of the log may be or may not be typical for a ADR1000AHZ. That depends on whether that oscillation is typical..

Regards, Dieter

[iMo]

..A bit more capacitance between opamp output and inverting input was added, which resulted in a shift of the output voltage..
-branadic-

I reported here aprox +2ppm after adding the 4n7 foil into the feedback of the OPA189 in my myADR1001#1 (10V->10V buffer)..

[Andreas]

Hello,

I now passed 18 kHrs:

the 10V/7V divider on ADR#01 drift has stabilized but has still a slight upward drift.

The 7V outputs of ADR#01 and ADR#02 trend to further settling.

Detailed explanation of the diagrams see post of 14 kHrs
https://www.eevblog.com/forum/metrology/lowest-drift-lowest-noise-voltage-reference/msg5138967/#msg5138967

with best regards

Andreas

[branadic]

I passed 1000 days, so here's an update. The different levels were discussed in previous posts (change of capacitor at gain stage, change to DC-DC-converter).

-branadic-

[dietert1]

After the initial aging, let's say until day 200, we can see about 3.3 or 1.8 ppm drift in 800 days, the average of 2.55 ppm being the most likely result. So roughly 1 ppm per year.
I think that's a normal result for an ovenized, buried zener reference including a 7 V to 10 V gain stage. To be honest, analysis requires recalibration of the other zener references as they can drift at a similar speed.

Regards, Dieter

[chekhov]

Thanks Andreas. I haven't posted recent results for a while as we were waiting for our paper A 10 V Transfer Standard Based on Low-Noise Solid-State Zener Voltage Reference ADR1000 to be published.

That's great to have such paper, branadic, very helpful for young ADR1000A player like me, however I see it misses some very important initial conditions/hints from my point of view.
When I first time tried to find a top of TC parabola, I found that chips from my batch were likely made specially for Antarctica or so because their top is I don't know where ...
Playing with Iz had no reasonable effect.


Then I started looking at Q1 Ibias, which was already mentioned in this thread, but I haven't expected that I had to change appropriate resistor R2 so much - below 20K for my chips. LTSpice gave me a clue that in range 10-20K there is chance of TC to cross zero, so I finally made a few experiments:


With those changes now I at least have some hope.
I was applying constant current to the heater in 1mA steps manually for this time. For my setup Iz at zero TC points was around 4.5-5 mA.

Would be great to hear whether other folks have same issues or they have better chips in their hands. I tested only two available to me, in socket.

[Andreas]

Hello,

Interesting that LTSPICE can simulate the zero TC temperature.

I had 18k6 for a zero tc setpoint temperature of ~55 deg C on one sample (the other sample #2 is built like data sheet cirquit).

https://www.eevblog.com/forum/metrology/lowest-drift-lowest-noise-voltage-reference/msg3921830/#msg3921830

I usually inject a voltage via a resistor to the setpoint voltage divider to sweep across temperature.

with best regards

Andreas

[MiDi]

Has someone measured the voltage sensitivity to changes in the different resistances for ADR1000 as done for LTZ1000?
Would be interesting to see the changes w/o and w/ zero-TC compensation.
It was mentioned that it should effect the sensitivity for the heater setpoint divider R4/R5.

There is another method for zero-TC compensation: set R1 to 100Ω and add ~17Ω on top of the zener.
Is that only applicable to LTZ1000 (non-A)?

after playing with the suggestion of Kleinstein here the results:
- the T.C. trimming is now symmetrically to a center value near 25 deg C.
- I had to fine trim the suggested 22K resistors which where already a good estimate to 18K4 to achieve this.
- what I had not expected is that the sensitivity is about halved. So I had to reduce R10 from 1 Meg to 470K.

Do you have already build and tested this approach?
It looks very attractive because the precision 1.5 multiplier gets you near 10V and the following gain stage has much lower sensitivity to drift of the resistors.

[Andreas]

Do you have already build and tested this approach?

Hello,

no not up to now. (I obviously have more ideas than fit into my hobby time).
And perhaps one should combine that with an ageing compensation for the ADR1000 to get full benefit of the LTC1043 stability.

with best regards

Andreas

[dietert1]

A scheme using an on-chip pn-junction (Ube) for temperature compensation is much superior.
The resistor divider 17 and 100 Ohm adds some gain to the -2.1 mV/K of Ube and it can be used if the positive temperature coefficient of the zener is a bit large. This is the case with the LTZ1000 that can have about 50 ppm/K = 0,35 mV/K left at room temperature (after compensation by Ube). Thats is 1/6 th and determines the resistive divider.
With the ADR1000 there remains less to compensate or the difference may even have the other sign. So one needs to use a different divider or even another circuit to reverse the sign, still using a temperature measurement from the other transistor on the chip.

Regards, Dieter

[chekhov]

One more observation. In order to proceed with TC finding step in the article, my first step was to measure the Vbe of Q2 versus temperature in order to get an idea of how exactly it changes, maybe starting point at 0 or 25C varies from chip to chip - this way I wanted to confirm values in datasheet vs temperature. This makes sense since datasheet obviously has misprints like that (so who know what else is wrong here ...):

However, the obvious proper way of measuring it is to have only temperature sensing transistor to be turned on, otherwise zener without heater still has quite major self-heating (around ~5C, comparing to ~10C for LTZ1000A). Here is my Vbe sweep in thermal chamber. Tiny PT1000 was sitting on the top of ADR1000A and heating and then cooling was very slow (so that I haven't finished cooling to 25C):

According to my graph, at 25C I have ~598.8 mV, and at 70C I have ~496.1 mV, almost 12mV higher than 484mV for 70C from datasheet (gives me -0.00228(2) V/C coefficient for Vbe). I wonder whether they were measuring them with zener turned on or zener turned off.
Additionally, all my sweeps that I posted previously always had time for self-heating to settle, and usual Vbe value is around 574-576 mV, which from will give around 35C internal temperature for ~25C outside.
(In my case chip is socketed with original long legs, so that helps a little bit with self-heating as well)

[chuckb]

Nice test! How was Q2 configured during the test? Was the Base current similar to nominal, 300na?

In the LTZ datasheet there is the statement -
"Production variations in emitter-base voltage will typically cause about ±10°C variation."
I expect it would be the same for the ADR1000. That is why I use another technique to set the chip temperature.

The other way is to operate the chip in it's final configuration and note the heater voltage. I use cheap resistors (1% MF) initially to set the temperature and then note the heater voltage on pin 1 of the Zener chip. For the ADR1000, 4V on pin 1 (0.7v on pin 2) indicates a 10 deg C heater operating margin. With 5V on Pin 1 you would have a 16C operating margin. Select R5 for your desired operating margin. Then order and install the good reisitors. I really don't care about chip temperature, I care about heater operating margin in operation. I try to minimize the margin for best drift charactoristics.

You can decide your own operating margin vs drift rate tradeoff.

[chekhov]

Nice test! How was Q2 configured during the test? Was the Base current similar to nominal, 300na?

Base and collector of Q2 were connected together and fed 6.62 V through 61.9K resistor (just from PSU, so there was little variation, but upfront I saw ~0.2 mV Vbe change for 0.05V change on PSU), so looks like 1/3 of this 'nominal'.

[Dr. Frank]

Here's the drift update of the ADR1000's raw reference voltage.



After 2 1/2 years, it has stabilized to about -1ppm/year.
 
I made the power interruptions more visible in this graph.
I still have not measured / analysed, how much time it takes to reach the previous reference value, within 0.5ppm. 
Seems to be on the order of 2 weeks, depending on the off time.

Frank

[The Soulman]

Here's the drift update of the ADR1000's raw reference voltage.



After 2 1/2 years, it has stabilized to about -1ppm/year.
 
I made the power interruptions more visible in this graph.
I still have not measured / analysed, how much time it takes to reach the previous reference value, within 0.5ppm. 
Seems to be on the order of 2 weeks, depending on the off time.

Frank

Do you have a explanation for the long time ( 24+ hours ) it took to settle back close to its original value on 31-11-23?
Is the zener current circuit on your board somehow sensitive to moisture? Or the ADR1000 has a leak? 
Or simply temperature related?

[Dr. Frank]

Here's the drift update of the ADR1000's raw reference voltage.



After 2 1/2 years, it has stabilized to about -1ppm/year.
 
I made the power interruptions more visible in this graph.
I still have not measured / analysed, how much time it takes to reach the previous reference value, within 0.5ppm. 
Seems to be on the order of 2 weeks, depending on the off time.

Frank

Do you have a explanation for the long time ( 24+ hours ) it took to settle back close to its original value on 31-11-23?
Is the zener current circuit on your board somehow sensitive to moisture? Or the ADR1000 has a leak? 
Or simply temperature related?

Obviously you do not understand what I have done .
The reference has been running since nearly 3 years now, but I switched it off three times, let it sitting idle for weeks, or for nearly 6 months last year.
I switched it on again December 1st.
The voltage simply had gone up 5ppm, or so, but recovered within 1 month to its recent value, to where it had been drifting, or ageing to the last 2 years.
These are obviously two relaxation process, and has nothing to do with humidity neither room temperature. The ADR is stuck into a test socket, not soldered.
Why should the package have a leak?
Both environmental parameters are absolutely constant in my lab, I.e always around 50% and 21.5°C.
I have not seen anybody else reporting this effect, but probably nobody else has done this test.
If this is a common characteristic of all ADR1000, this would inhibit a usage as a reference for DMMs.

[The Soulman]

Obviously you do not understand what I have done .
The reference has been running since nearly 3 years now, but I switched it off three times, let it sitting idle for a weeks, or for nearly 6 months last year.
I switched it on again December 1st.
The voltage simply had gone up 5ppm, or so, but recovered within 1 month to its recent value, where it had been drifting, or ageing to the last 2 years.
These are obviously two relaxation process, and has nothing to do with humidity neither room temperature.
Both parameters are absolutely constant in my lab, I.e always around 50% and 21.5°C.
I have not seen anybody else reporting this effect.
If this is a common characteristic of all ADR1000, this would inhibit a usage as a reference for DMMs.

Yes I understand.
Just find it an odd and unexpected behavior.
Although your labs temperature and humidity levels are constant the (powered on) reference board temperature is above that room temperature,
combined with the thermal mass it may take a while (hours, days) to reach a final thermal equilibrium after switching on.
Also any component sensitive to humidity may absorb humidity when powered off and (slowly) dry-out when powered on.

I'm sure you know all this, just wanted to clarify myself.

I've seen this behavior before but only with v-ref's in plastic (dip) housings.

[CalibrationGuy]

The reference has been running since nearly 3 years now, but I switched it off three times, let it sitting idle for weeks, or for nearly 6 months last year.
I switched it on again December 1st.
The voltage simply had gone up 5ppm, or so, but recovered within 1 month to its recent value, where it had been drifting, or ageing to the last 2 years.
These are obviously two relaxation process, and has nothing to do with humidity neither room temperature. The ADR is stuck into a test socket, not soldered.
Why should the package have a leak?
Both environmental parameters are absolutely constant in my lab, I.e always around 50% and 21.5°C.
I have not seen anybody else reporting this effect.
If this is a common characteristic of all ADR1000, this would inhibit a usage as a reference for DMMs.

If this is a common characteristic of the ADR1000, it would make it unusable in many calibration labs.

We had a conversation with the main tech and manager at Keysight's Standards Calibration Laboratory where the JVS is located, and they advised us to keep our meters running 24/7 powered by pure sinewave UPS backup units, which we do. We also have our 732 array on those backups.

Having said that, most other cal labs I know switch their meters off when not in use, rendering the ADR1000 unusable in reference meter applications.

Also concerning is the long stabilization time reported here. I have not personally tested it so cannot weigh in on the matter.

I hope this is not the case.

TomG.

[Kleinstein]

At least the recovery after a turn off is relatively fast. So at least that process (e.g. stress between die and case or possibly redistribution of hunidity from silicon surface to case surface) is fast enough to be not a major issue for the long term stability.

For an application not running 24/7 this would be a major issue. If really a problem one could design the instrument in a way to keep the reference running with relatively low power and still power down most of the rest.

[dietert1]

Yes, the time scale is typical for a humidity related process and it can happen inside the hermetic cavity.
The observed behaviour isn't that unusual. I have seen it with LTFLU references and on a LTZ1000, too. If you always turn on a precision voltmeter for a short period, you won't even notice, as the reference will remain close to the "off" condition.

Regards, Dieter