Author Topic: PROJECT: Micro-Voltmeter Design  (Read 28441 times)

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Offline Kleinstein

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Re: PROJECT: Micro-Voltmeter Design
« Reply #125 on: April 01, 2020, 07:20:28 pm »
So the PP and PPS caps look comparable. Still there is quite some DA visible at the long end.
This could really be a problem for filter settling for a slow filter.
The charge recovery curve can also depend on the soaking time before the test. It may take many minutes for the DA come near saturation. So I would expect a difference between some 5 and 15 minutes soaking before the test.

The not so perfect capacitors may be a reason so limit the analog filtering to the shorter time scale, and if really needed do very low frequency filtering better in the digital domain.
 

Offline LesoleeTopic starter

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Re: PROJECT: Micro-Voltmeter Design
« Reply #126 on: April 01, 2020, 07:45:12 pm »
The not so perfect capacitors may be a reason so limit the analog filtering to the shorter time scale, and if really needed do very low frequency filtering better in the digital domain.
It’s something we have always known. If you digitise the output of a sample and hold, you need to do so after a definite time, and not some arbitrary time when the digital stuff can be bothered to get around to it. All cycle times on such things need to be consistent in order to reduce “noise” (variability) in the readings. It‘s probably why there is so little info on the subject. Nobody does it that way anymore because it is too hard, and not worth it. It is only on “pure analog” stuff where such things are needed.

I remember back when doing harmonic distortion testing on scopes for production. We ended up using a Krohn-Hite purely analog signal generator, since all the modern generators were too noisy and had too much distortion. (And then we put a custom tuned-notch filter in series to make it even more pure!)
 

Offline LesoleeTopic starter

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Re: PROJECT: Micro-Voltmeter Design
« Reply #127 on: April 02, 2020, 10:36:50 pm »
These tests have shown up some difficulties with the acquisition hardware/software. Initially the 1 Hz filter was being used within the software. This was a bad idea because (for some unknown reason) the software does not deliver oversampled filtering. The data was noticeably quantised at presumably the native 8 bit resolution. Thus all the plots had to be repeated in 12 bit oversampled mode.

The plots are exported as CSV files and in order to export the data to Excel easily, the number of useful points need to be limited to 32,000 per trace. This limits the sample rate of the scope. But the scope is not decimating the output data, retaining the bandwidth. It seems to be decimating earlier in the process, thereby reducing the bandwidth in an undocumented manner. It meant that data below 1 second had a very weird and improbable shape. But all the plots look the same below 1 second, so a high speed acquisition was done for this initial curve. The scope was set to 200 ms/div for this fast section, so the sample rate was then adequate.

In retrospect, the scope could have been set to sample 10x faster at 20s/div, generating 300,000 points to a CSV file, and then the file could have been decimated down to the required 32,000 points or less. But that would have meant re-doing all the tests again, and writing some code to do the decimation, all of which are pretty boring.





The bendy bit near zero is actually an artefact of the scaling.

From my tests I found it useful to also look at the curve with a log time scale. The logical zero is the begin of the discharge phase.

Applying the Kleinstein zero offset ...





« Last Edit: April 04, 2020, 09:09:42 am by Lesolee »
 
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Offline Kleinstein

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Re: PROJECT: Micro-Voltmeter Design
« Reply #128 on: April 03, 2020, 09:56:31 am »
The recovery curve looks about as expected: some effect from changing the charge time, even in the range well longer than the measured part. So there are some really slow processes (time constants > 10 min) there. For the shorter times like after 1 or 10 seconds the recovery is still dominated by the faster processes, as there is relatively little difference between different charging times. So there is also quite some DA happening on the seconds time scale too.

There is still some effect going on for the long time, but for the filter circuit that started to interest in DA this should not matter that much. In the filter circuit one has a resistor in parallel and the little charge slowly coming back is not doing so much harm. The PPS and PP caps should be good enough.
 

Offline LesoleeTopic starter

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Re: PROJECT: Micro-Voltmeter Design
« Reply #129 on: April 04, 2020, 04:12:34 pm »
It occurred to me that with this setup I could easily measure the leakage across the Panasonic open relay contacts (and veroboard) which will inform the next project.

I had to shield the input cable to reduce the stray capacitance, and I put a simple copper-tape-covered-cardboard screen over the top of the jig so that I didn’t have to hide under the bench, and stay still, as I have on earlier tests using a 1 nF integrator capacitor.

I upped the sample rate on the scope, giving 300,000 data points, then decimated it down to 6000 points using an MFC Visual C++ program.

The capacitance meter was tested against my 1.000nF ±1% reference polystyrene capacitor. The reading was 1.001 nF. Hence the 1 nF integrator capacitor, measured at 0.928 nF, is reasonably expected to be within ±1% of the measured value.



The droop on the integrator alone was 45 µV/s with say ±2% for the buffer, and another ±2% for the scope.

The nominal bias current is then  928E-12 x 45E-6 = 42E-15. Let’s call it 42 fA ±10%.

For +20 V leakage we have 340 µV/s + 45 µV/s = 385 µV/s
For -20 V leakage we have -418 µV/s + 45 µV/s = 373 µV/s

The average is 379 µV/s, which equates to a current of  928E-12 x 379E-6 = 352 fA

The leakage resistance across the board and relay body is then 20 / 352E-15 = 57E12 = 57 T ohms ±10%

[EDIT: Addition]

If you think about it some more, you  will realise that this ‘live leakage current’ is also critical to the evaluation of the jig. Since the 50 V is usually left connected to the open relay contact, this leakage current is 21x greater than the opamp leakage. Clearly we could use a second relay contact, and an intermediate pull-down resistor, or simply turn the power supply down during most of the test, but it does mean we have possible leakage paths around 30 T ohms effectively across the capacitor under test. In this case that is a tolerable amount of leakage, but we needed to have tested it to prove the point.
« Last Edit: April 06, 2020, 08:11:17 am by Lesolee »
 

Offline LesoleeTopic starter

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Re: PROJECT: Micro-Voltmeter Design
« Reply #130 on: April 06, 2020, 11:35:43 pm »


I have found the military dielectric absorption test online. MIL-PRF-19978L (2016). It seems to go back to MIL-C-19978F (1994), although I can’t find a copy of that online. What I really want to find is MIL-C-19978D of unknown date. I would like to know what the date was, and what revisions, if any, occurred. If these standards are online, they don’t seem to be indexed.  :-//
 
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Offline LesoleeTopic starter

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Re: PROJECT: Micro-Voltmeter Design
« Reply #131 on: April 20, 2020, 03:51:47 pm »
To finish off all this Dielectric Absorption testing, I have done another couple of weeks of testing, ... and summarised it all in a report.

I also uploaded the complete file to my website: http://lesliegreen.byethost3.com/articles/Dielectric.pdf

I also plotted out the step response of the MicroVoltmeter (Mk 1.30)



[EDIT: added a link to the complete file on my website]
[EDIT: re-printed to PDF using Cute PDF Writer so it is small enough to fit in one piece]
« Last Edit: April 22, 2020, 01:48:05 pm by Lesolee »
 
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Offline branadic

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Re: PROJECT: Micro-Voltmeter Design
« Reply #132 on: April 20, 2020, 04:25:47 pm »
Attached is a combined and compressed version for you.
And not to forget, thanks for your effort Lesolee.

-branadic-
Computers exist to solve problems that we wouldn't have without them. AI exists to answer questions, we wouldn't ask without it.
 
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Offline LesoleeTopic starter

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Re: PROJECT: Micro-Voltmeter Design
« Reply #133 on: April 20, 2020, 05:02:58 pm »
Attached is a combined and compressed version for you.
Original is now fixed so it fits in one piece.

Thank you for your interest in it.

[EDIT: changed to reflect the fact that the original file has been re-printed smaller, so it fits in one piece without noticeable degradation of image quality.]
« Last Edit: April 22, 2020, 01:52:04 pm by Lesolee »
 

Offline Kleinstein

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Re: PROJECT: Micro-Voltmeter Design
« Reply #134 on: April 20, 2020, 05:28:22 pm »
Nice summary of the results so far.

There are a few point's I like to comment on:
For the test with a load resistance, the extra discharge current mainly complicates things and limits the time scale that can be measured. It is not actually speeding up the test, but like restricting the time constants covered. It is easier to use a very high impedance buffer and no extra load. With modern CMOS OPs there is no real need to accept an extra load that complicates the interpretation.
For testing the residual load effect (e.g. R_in of the buffer, relays) I would suggest doing a test with 2 equal caps and with both caps in parallel, preferable with relatively small low loss ones (e.g. 1-10 nF PS). This would show the effect of leakage and input impedance.

I find it odd to plot the voltage for the charge recovery also on a log scale. The interesting part the reappearing voltage relative to the initial charging, not the relative development, as the initial charge is kind of not so well defined if the discharge phase is relatively short. For the discharge phase, there is actually no really need to use different lengths of the discharge part: for the DA in the capacitor there is essentially no different if the discharge is from some 20 V to true zero or to some 1 mV. If there is a small residual voltage this could be subtraced from the charging voltage (usually negligible unless one has really high DA). For the recovery curve one would also subtract the voltage from the starting point. The time when one reads the zero for the recovered voltage essentially sets the lenght of the discharge phase - so one can get the data for different assumed discharge times from a single run.

For the time scale the logical starting point is the start of the discharge, not the end. If discharge is relatively slow (e.g. large resistor) one may have to take something like the point where the voltage goes to something like 50%, 1/e or 10% - still a bit to decide discuss there, but in most cases this does not really matter. The shape of the curve is empirical not really following a theoretical law. In most case I have found an approximate straight line in the semi log curve (voltage linear, time logarithmic starting with the start of discharge).
 

Offline LesoleeTopic starter

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Re: PROJECT: Micro-Voltmeter Design
« Reply #135 on: April 20, 2020, 06:34:51 pm »
There are a few point's I like to comment on:
For the test with a load resistance, the extra discharge current mainly complicates things and limits the time scale that can be measured. It is not actually speeding up the test, but like restricting the time constants covered.
Teverovsky's 2013 NEPP report, eg Fig 3.1 (page 10) shows the absorption currents following nice straight lines on log/log scales. Sadly he misses out (what for me is the interesting part), the exponential to power law corner. But he is measuring nasty X7R capacitors, not nice PPS/PP types.

I can do a 1M recovery test in 10 seconds rather than a 10G recovery test in 1000 seconds.
In my universe 1000 >> 10

The long time result is predicted by the short time test for good capacitors (again, not necessarily nasty X7R -uggh )


For testing the residual load effect (e.g. R_in of the buffer, relays) I would suggest doing a test with 2 equal caps and with both caps in parallel, preferable with relatively small low loss ones (e.g. 1-10 nF PS). This would show the effect of leakage and input impedance.
I'm not sure what you are saying here. Did you get to page 34 "Test Jig Validation" yet? Is your test suggested as an improvement on that section?
 

Offline Kleinstein

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Re: PROJECT: Micro-Voltmeter Design
« Reply #136 on: April 20, 2020, 07:33:52 pm »
The test with 2 capacitors is a little like the part done in the test jig validation. It may be a little simpler, but the tests describes are Ok too.

One can do the test for the higher impedance for any time one wants, just stop when you are no longer interested in later times. If one needs a curve for the case with a load one can just calculation the curve one would get with any load resistance - it is just relatively simple math:
The loaded voltage would be the integral over exp(-t/RC) time the derivative of the unloaded curve.
So not problem having a high Z buffer and than calculate the curves expected for 1M or 15 K. The indirect way would no add significant noise. Only with really poor caps (e.g. electrolytic) or the nonlinear X7R and similar there can be a small difference.
Just from the short measurements with an extra load one gets less information for the longer times and non for those longer than the actual measurement. So an extrapolation to how the curve would look like for less loading is more guesswork based on other measurements, but not based on the actual test. With a little more math one could be able to get the curves for more loading. Trying to estimate the curve with less loading from a measurement with more load would amplify the noise (especially past the peak) and ends where the measurement stopped.

The log-log scale graph depends on how long the discharge phase was or what point is defined as zero voltage. So the initial part is not well defined. It may be later help to compare largely different caps, but the curves will all flatten out due to the log voltage scale - so very hard to see any difference. The semi-log scale can cover a large time range - though this may need to separate tests. The tests here are from some 100 ms to a few 1000 seconds, but with faster switches (e.g. FETs) one could extend the curve down to below ms - limited by the discharge time constant. It may need smaller caps at the very fast end.
For just one polarity, one could even build a combined test jig to measure DA from some 50 µs to some 1000 seconds. It would still need 2 runs, but the fast part (e.g. 50 µs to 1 s) only takes little time.

Another point is that the DA can be temperature dependent. Some of the effects get faster quite a bit with higher temperature. However I have not found much information about this and if at all more about the faster part.
 

Offline Dave Wise

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Re: PROJECT: Micro-Voltmeter Design
« Reply #137 on: December 18, 2023, 07:30:23 pm »
MIL-C-19978D* through F specifies the Dielectric Absorption test as 5 minutes charge, 5 seconds discharge, 1 minute measure.  MIL-PRF-19978G through M are 1 hour charge, 10 seconds discharge, 15 minute measure.  Each version of the test ignores some time constants, they're both just trying to be an overall figure of merit.  You have to test for the time scale you care about.

MIL-PRF-83421 specifies 5m/5s/1m from at least revision B to current revision F from 2017.

FWIW,
Dave Wise

* I don't have the original MIL-C-19978 spec, or revisions A, B, C, or D.  A couple of webpages mention D's time scale.
« Last Edit: December 18, 2023, 09:51:03 pm by Dave Wise »
 


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