PROJECT: Micro-Voltmeter Design

[Lesolee]

Here is my latest (tutorial) project, a voltmeter with ±1mV Full Range, 100nV resolution on the last digit, “hardly any” voltage noise, “hardly any” bias current, and all made on veroboard.

I will be quantifying the voltage noise and current noise over the next few days; be patient!



The DVM module can only handle positive voltages. Since I want both positive and negative input voltages I have biased the DVM module input up to 1V. This 1V then means 1mV referred to input since the amplifier chain is calibrated to x1000 (including any gain error of the DVM module).









So let’s look at some technical stuff. Given that I want “hardly any” bias current, the last thing I need is leakage to the + input pin of the ADA4522. The – input pin is on pin 2, right next to the + input pin (number 3) but that is ok because the input offset is 5µV. But pin 4 is at -2.5V so I would potentially have 2.5/5µ = 500,000 times more leakage to the power pin than to the – input pin!

Sadly the excellent ADA4522 chip is not available in a nice 8 pin DIP. I got a SOIC8 package. My solution was to lift pin 4 and link it to pin 5. The pin 4 pad is just floating.



Now the solder used is not a modern no-clean type. It has to be 20+ years old, 60/40 tin/lead solder so I washed the chip as best I could with 99.9% pure IPA. Even so, the best I could achieved was 300pA leakage. The measurement method was simply to put 1M in parallel with 100nF across the input terminals and observe the change in reading between the short-circuited input and the 1M input. (The overall gain was set earlier.) The worst case datasheet value is 150pA, so I am not million miles away, but even so, it was a bit disappointing. Needless to say, a few extra bits (R6,R7, R8) soon took that bias current down to the required “hardly any” level.

Now you might call this a “bootstrap design process” in the sense that I used the partially built micro-voltmeter to measure its own components. Next up were the protection diodes.

The input is designed to work up to ±1mV. At this level the leakage in the diodes is essentially independent of the bias direction (forward or reverse bias).



Since I am looking for low leakage at the best price I used the BC550B’s that I had in stock. (The J113 is a n-channel JFET, and using a JFET as a low-leakage diode is an old (>35 years old) trick of the trade.) I should mention that the 1mV was obtained by using a 1M resistor into a 100R resistor, and driving the series chain from 10V.

Next up I will have to do some measurements, unless there are any burning questions that have to be answered.

[EDIT: the circuit has a significant design error. U4 (MCP6043) has a not-CS pin which has to be tied low. I have not updated this circuit as it is obsolete, the Mk 2 version being superior in terms of noise, TC, battery life, stability, … Mk 2 starts at post #45.]

[Lesolee]

I have been switching it on and off, and unplugging the shorting plug at quite a rate, so I have never given it a chance to settle down fully. This time I left it for 2 hours before switching it on. No change of the input shorting plug.

Wow!



As a separate test I measured the noise after a 23 minute warm up. No change of offset pot or input connections. S/C input.

The displayed noise over 1 minute went between
1.0043 mV and
1.0039 mV

0.4 µV ptp

[EDIT: added new measurement of ptp noise over 1 minute, ... and then corrected the ptp noise value.]

[Andreas]

Hello,

I am wondering why you use the ADA4522 for this project with relative high input bias current.
I would have probably used something like a selected ADA4638 where I have measured < 22 pA input current.

with best regards

Andreas

[magic]

Given that I want “hardly any” bias current, the last thing I need is leakage to the + input pin of the ADA4522. The – input pin is on pin 2, right next to the + input pin (number 3) but that is ok because the input offset is 5µV. But pin 4 is at -2.5V so I would potentially have 2.5/5µ = 500,000 times more leakage to the power pin than to the – input pin!

I washed the chip as best I could with 99.9% pure IPA. Even so, the best I could achieved was 300pA leakage.

Look up the LMC662 picoammeter project. It achieves 0.002pA input current simply by lifting pin 3 and connecting it in the air. (And using a lower bias opamp, but your input current is much higher than the chip's spec).

[Lesolee]

I am wondering why you use the ADA4522 for this project with relative high input bias current.
I would have probably used something like a selected ADA4638 where I have measured < 22 pA input current.

That's easy, 0.1Hz to 10Hz ptp voltage noise is 1.2µV on the ADA4638 wheras it is 117nV on the ADA4522. That is a factor of 10x more voltage noise on the ADA4638.

[Lesolee]

Look up the LMC662 picoammeter project. It achieves 0.002pA input current simply by lifting pin 3 and connecting it in the air. (And using a lower bias opamp, but your input current is much higher than the chip's spec).

Probably you are not suggesting using the LMC662 itself, since it doesn't even quote 0.1Hz to 10Hz noise. It seems then that you are suggesting lifting pin 3 of a SM IC and wiring it directly to the input terminals, with the bias current compensation and clamp diodes all on the same wire. I was confident to lift pin 4 and wire it to pin 5 as there was a mechanical anchor nearby, and just one small wire as an inertial load.

Given the construction method (shown) I would have had to find a PTFE mounting point, and mounted it to the little SM to DIP converter board, which is pretty difficult.

[Lesolee]

Bias current: measured using 1M // 100nF across the input terminals. I turned off the bias current compensation (pot).

S/C   1.0029 mV
O/C   0.8390 mV      = 163 pA

I tried connecting pin 4 to pin 2 for extra guarding.

S/C   1.0032 mV
O/C   0.8490 mV      = 154 pA

(The offset voltage changed a little as I had the lid off and balanced the box up on its end, resting on the zero adjust pot, which probably moved it a little!).

The bias current was 300 pA last time I measured it, but that was within tens of minutes of flushing the board with IPA. Probably there was still some residue to evaporate over a period of a day or so. At least now the bias current is closer to the manufacturer’s spec.

Next test is bias current noise. 4 minute warm-up with the lid on for the zero
1.0029 mV
3 minute warmup for the 1M//100nF.
0.8515 mV      = 151 pA.

Then measure the max-min noise over 1 minute (by eye since this is not a bus controlled device).
7.9 µV ptp = 8 pA ptp

Adjust bias current.
4 minute warm up to zero
1.0033 mV
3 minute warmup to 1M // 100nF
1.0053         = 2 pA

Measure ptp noise over 1 minute: 5.8 µV   = 6 pA ptp

There is no way the bias current compensation has made the noise less, but it is demonstrably not significantly more. Clearly ptp readings have noise on them.

Try again at 100K // 100nF
0.9 µV ptp      = 9 pA ptp   seems reasonable.



[EDIT: fixed typo of a 100pF cap which should have been 100nF]
[EDIT: fixed factor of ten error in 100K bias current calculation! Also fixed typo for "minute". ]
[EDIT: The bias current noise measurement method is incorrect. You get too much Johnson noise in the available bandwidth. A bigger capacitor is needed. See the Mk 2 for better measurements.]

[Lesolee]

It's pretty boring, but I thought I should validate the protection network since using a transistor (BJT) in this way is not very standard.

To be clear, the transistors are in TO92 cases, and I just cut the collector leads off.

[Kleinstein]

The X7R type capacitor at the input can cause quite some surprise that can look line some input current. So I would replace it with a PP type capacitor. The class 2 ceramic can have very large dielectric absorption and thus release charge from the past.

For the AZ OPs one has to find a compromise between voltage noise and input bias. The ADA4522 is very low voltage noise, but also high current noise and high bias, kind of at the extreme. With only 0.1 µV resolution one could have chosen a slightly higher noise, but lower bias type, e.g. LTC2057 or AD8628 with about 2 or 4 times the noise but less input current.
The current is not so much about leakage, but part of the switching inside the OP. There is also scattering between individual units.

[Lesolee]

The X7R type capacitor at the input can cause quite some surprise that can look line some input current. So I would replace it with a PP type capacitor. The class 2 ceramic can have very large dielectric absorption and thus release charge from the past.

For the AZ OPs one has to find a compromise between voltage noise and input bias. The ADA4522 is very low voltage noise, but also high current noise and high bias, kind of at the extreme. With only 0.1 µV resolution one could have chosen a slightly higher noise, but lower bias type, e.g. LTC2057 or AD8628 with about 2 or 4 times the noise but less input current.
The current is not so much about leakage, but part of the switching inside the OP. There is also scattering between individual units.

The X7R comments are fair enough. To be honest I got stuck into the mindset of using a high voltage capacitor for low leakage. When the part actually arrived I wondered why a high voltage was sensible, given that the input can only take about 15V as a short-term overload. Then I thought I have it, so I might as well use it. I also wondered if the X7R would be microphonic. All good reasons to bin it, although I have seen no evidence on this unit of significant dielectric absorption.

The LTC2057 has 200pA bias current and double the noise, so it is worse on both counts. The AD8628 has 5 digits (0.5µV) ptp noise, which is horrific, and only 30% less current (worst case). I don’t think that is a better choice.

I agree that above 50K the current noise (which nobody specifies, but I have measured) is dominant.

[magic]

It seems then that you are suggesting lifting pin 3 of a SM IC and wiring it directly to the input terminals, with the bias current compensation and clamp diodes all on the same wire. I was confident to lift pin 4 and wire it to pin 5 as there was a mechanical anchor nearby, and just one small wire as an inertial load.

I think pin 3 would carry the weight of that input circuit just fine unless you put the device in a tumble dryer. Certainly DIP is robust enough. Not that it matters if you are satisfied with performance as-is.

By the way, shouldn't the connection from TP2 to R16 be as short and direct as possible? Not sure how it's routed here.

[dietert1]

As far as i remember a 1N4148 had about 300 MOhm at 0 V. You could use a second set of diodes and two resistors to generate two +/- 0,7 bias voltages to keep the protection diodes in reverse direction during normal operation. Then clipping occurs at +/- 1.4 V which is good enough and there won't be small forward currents in the protection devices.

The input of the ADA4522 should have a capacitor to ground, maybe another 1 or 10 nF. Chopper amplifiers work better like that.

There are very low noise LDO regulators ready to generate +/- 2.5 V, preferable to the shunt regulators you propose.

Regards, Dieter

[Lesolee]

By the way, shouldn't the connection from TP2 to R16 be as short and direct as possible? Not sure how it's routed here.

You're absolutely right. 

I had that in mind earlier, then it fell away later (senior moment)
and I routed it in some arbitrary non-optimum way.

[splin]

The LMP7721 is also worth considering when you need very low Ibias - 3fA typ, 20fA max at 25C.

LF noise is higher at 1.3uVpp 0.1 to 10Hz, but that is a lot lower than other CMOS amps as is the offset voltage of Voffs is 50uV typical; drift is 1.5uV/C .

The input current is so low that you could parallel four amps to halve the voltage noise or even use 16 to get down to 325nVpp!

Another one to consider is the ADA4625, although it is rather expensive. LF noise is only 150nVpp, Ibias 15pA typical, 75pA max at 25C. Voffset 15uV typ, .2uV/C.

So two in parallel will have the same LF voltage noise as an ADA4522 with similar or less Ibias. Big advantage is the much lower current noise at 4.5fA/rt(Hz) at 1kHz (compared to 800fA for the ADA4522). LF current noise isn't specified.

Horses for courses.

[Lesolee]

As far as i remember a 1N4148 had about 300 MOhm at 0 V. You could use a second set of diodes and two resistors to generate two +/- 0,7 bias voltages to keep the protection diodes in reverse direction during normal operation. Then clipping occurs at +/- 1.4 V which is good enough and there won't be small forward currents in the protection devices.

Not true. I did post the measurements on a 1N4148, which could have been easy to miss. With 1 mV forward OR reverse voltage I got 60 pA leakage. Leaky diodes just seem to act as if they have a shunt resistor across a good diode. I originally had a Schottky diode (BAT24) with a small bias so (as you say) the protection diodes would be reverse biased. It was found to be an unnecessary complexity. It was a good thought, but the reality of the physical component (as compared to a simple model) makes the idea non-ideal at these low working voltages. It might be different if the input needed to be linear up to 100 mV, but I have not tested for that level of input.

The input of the ADA4522 should have a capacitor to ground, maybe another 1 or 10 nF. Chopper amplifiers work better like that.

I have C1 at 1 nF. Or did you mean earth/ground. In that case I can't see why a battery powered device would need an external reference to earth.

There are very low noise LDO regulators ready to generate +/- 2.5 V, preferable to the shunt regulators you propose.

To be honest, this design sort of got iterated around a lot. I needed ±2.5 V for the MCP6043 because it can only take 6V (not the 8.2V directly from the batteries). I was going to power the DVM module from the batteries directly, but then I found that the input reference was its negative rail. Then I found it was taking nasty current spikes, so by powering from a shunt regulator I kept the overall current constant, which seemed nice. The current just gets diverted around a small path. I couldn’t use decoupling capacitors because the TL431 is only stable between something like 1 aF and 10,000 µF (I might be exaggerating that slightly).
I don’t think that the overall measured noise is excessive, and even if the TL431 is 10x noisier than an LDO, I am not sure that this would get through the opamp PSRR. The ADA4522 data sheet shows PSRR of 90dB at 100Hz. I make that 31,600x in voltage terms. 50nV ptp RTI would be 1.6mV ptp on the TL431. The TL431 data sheet shows an input noise voltage graph scaled to 10µV ptp over a 10 second interval. I think that gives me a x100 safety margin on power supply noise into the first stage.

The second stage has hardly any gain, so not enough to make the digits wobble via the resistors connected to the ±2.5V rails. The gain to the +2.5V rails (via R13) is x1, so 10µV compared to 100µV for the last digit referred to the DVM module input. The gain to the -2.5V rail (via R17) is even lower, so even less effect.

[splin]

LF noise is higher at 1.3uVpp 0.1 to 10Hz, but that is a lot lower than other CMOS amps as is the offset voltage of Voffs is 50uV typical; drift is 1.5uV/C .

The input current is so low that you could parallel four amps to halve the voltage noise or even use 16 to get down to 325nVpp!

1.3µV is 13 digits ptp. 

I can parallel 16 to give double the noise I currently have. 

You missed this bit:

The LMP7721 is also worth considering when you need very low Ibias - 3fA typ, 20fA max at 25C.

So for source impedance < 50k, stick with the ADA4522. If that covers all your millivolt measuring scenarios then fine, stick with it.

But there may be others considering building something similar but can't live with the relatively low source impedance limitation. Much above 50k then current noise dominates so you need a different opamp hence the LMP7721 and AD4625 suggestions.

Nothing stopping you have more than one front end in your meter, switch selectable depending on what you are measuring. That could include a very low noise bipolar - eg. LT1028 or even a discrete design for ultra low noise, low impedance measurements such as high current shunts.

[Lesolee]

You missed this bit:

The LMP7721 is also worth considering when you need very low Ibias - 3fA typ, 20fA max at 25C.

So for source impedance < 50k, stick with the ADA4522. If that covers all your millivolt measuring scenarios then fine, stick with it.

But there may be others considering building something similar but can't live with the relatively low source impedance limitation. Much above 50k then current noise dominates so you need a different opamp hence the LMP7721 and AD4625 suggestions.

I did indeed miss that part. Thank you for sticking with it 

Again I have had a very narrow focus on what I was then currently thinking. It's good to get a broader perpective, so  thanks.

[David Hess]

Sadly the excellent ADA4522 chip is not available in a nice 8 pin DIP. I got a SOIC8 package. My solution was to lift pin 4 and link it to pin 5. The pin 4 pad is just floating.

My solution with larger surface mount parts is to have an unplated hole drilled under the lead.

Look up the LMC662 picoammeter project. It achieves 0.002pA input current simply by lifting pin 3 and connecting it in the air. (And using a lower bias opamp, but your input current is much higher than the chip's spec).

My favorite was the LMC6081 tested for low input current but the manufacturer tested LMC6001 is available also.

But for this sort of application, low flicker noise is what matters because it is difficult to suppress and that is where chopper stabilized amplifiers shine assuming that a low AC impedance can be maintained to control current noise.  So a low flicker noise alternative like the LTC6240 with 550nVpp noise might be acceptable or better.

[Lesolee]

My solution with larger surface mount parts is to have an unplated hole drilled under the lead.

Interesting. I have been known to mill out the pcb as a slot between the pins. This is useful when you still need to make a connection to that pin.

[Kleinstein]

Having 60 pA at 1 mV for the 1N4148 is an effective resistance in the 160 M range - not that far of the 300 M number. This "resistance" can be highly temperature dependent so the difference can be just some 10 K higher temperature. For the ADA4522 the 1N4148 would not be such a big deal, as it is not that suitable for high Z sources anyway. However lower leakage (e.g. from transistors) is not expensive, so why not. The standard low cost, low leakage diode would be a BAV199 (SOT23 case with 2 diodes though).

For good filtering the current spikes from the AZ OP, a Pi type filter with 2 capacitors is more effective: the capacitor at the OP to convert the current spike from the OP to a limited voltage spike and than the RC / LC filter to reduce the amplitude. The capacitance directly at the OPs input can also help the OP as it sees a lower voltage spike.

In a voltmeter application reading the value from the display the relevant frequencies are lower than the standard 0.1-10 Hz band used for LF noise. Here the AZ OPs have essentially no 1/f noise, while the FET input OPs tend to have quite some 1/f noise. So even if the 0.1-10 Hz noise is comparable, in the more relevant 0.01-1 Hz band the AZ OP would have about 1/10 the noise, while with dominant 1/f noise the level would be about the same for the lower band.

The ADA4522 is good for a low impedance source, while other OPs are better with high impedance. So there is no amplifier good for all.
Those low bias CMOS ones are the other extreme - more like electrometer like.

The main weak point with the shunt regulators is the supply current, not noise. The other point is uneven load to both cells and charging them in series. This can cause trouble on the long run, though there is some equalization trough the resistors. So a single 5 V regulator and virtual ground may be the better solution.

[Rerouter]

You can have slots routed between soic pins, you just need to talk to your board provider, ones I have used in the past had no issue with a small number of 0.6mm unplated slots, but said if I over-did it I would have to pay more. and where happier with 1mm unplated slots.

For unused pins high end multi-meters also do the drill hole or slot path under the pin method so it is floating in free air without needing to deform the pin.

[dietert1]

So in your tests the 1N4148 had about 16.7 MOhm at 1 mV forward voltage. I remember a measurement of 300 MOhm around 0 V. Anyway the better solution is using a low leakage diode like BAV199 with a small reverse voltage. I guess millions of those circuits exist in ECG machines.

Sorry, you did not get my hint concerning the voltage regulators. It makes a difference whether the 1 nF cap is sitting on the chopper input or behind a 470 Ohm resistor. By the way: For good reasons most commercial voltmeters don't have a capacitive input but a resistive one, with protection resistors of some KOhms.

At 4 V battery voltage each shunt regulator takes almost 50 mA, correct? I was not talking about noise, but about quiescent current. Anyway, that is something easy to change.

Regards, Dieter

[Lesolee]

At 4 V battery voltage each shunt regulator takes almost 50 mA, correct? I was not talking about noise, but about quiescent current. Anyway, that is something easy to change.

Ok, I certainly didn't spot that as why you mentioned it. Yes they take a lot of current. I set it up to work on 3.7V. Of course a series regulator uses less battery power. In this case the batteries have 4200 mAh capacity, which is more than I know what to do with! With longer battery life and less power dissipation a series regulator would make a better choice. (Again I had TL431A regulators in stock so I used them!)

So in your tests the 1N4148 had about 16.7 MOhm at 1 mV forward voltage. I remember a measurement of 300 MOhm around 0 V. Anyway the better solution is using a low leakage diode like BAV199 with a small reverse voltage. I guess millions of those circuits exist in ECG machines.

I used the 1N4148 as an extreme example. I would never consider using a transparent glass bodies diode in a low leakage application. I have indeed used BAV199’s, and they are good diodes. In this case a SM part is non-ideal, physically. Is it "a better solution" if the difference is not measurable.

[Lesolee]

The other point is uneven load to both cells and charging them in series. This can cause trouble on the long run, though there is some equalization trough the resistors. So a single 5 V regulator and virtual ground may be the better solution.

Look carefully and you may spot that the individual 18650 cells are tapped at their midpoint, and the charger socket uses the centre tap as well. I can therefore externally monitor, and charge the cells individually, as necessary.

[Lesolee]

By the way, shouldn't the connection from TP2 to R16 be as short and direct as possible? Not sure how it's routed here.

Ok, let’s consider that from a tutorial point of view:

I measured a 7 cm length of the blue wire. At 2 A it gives 9 mV drop (measured using an ordinary hand-held DVM).

9 mV/2 A = 4.5 milliohms.

Put 4.5 millohms in series with the 100R gain resistor (R16) and the error is 45 ppm, which is irrelevant. It has a TC of 0.4%/°C (being copper) but the contribution to R16 is:

0.4% = 4000 ppm

4000 ppm x 0.0045/100 = 0.2 ppm

The TC is changed by 0.2 ppm/°C. But I am using 100 ppm/°C resistors anyway, so that is not a big deal.

BUT, there is a big gotcha. Is somebody else using that piece of copper for their own nefarious (and noise giving) purposes? The answer is YES!

It is useful (from a tutorial point of view) to show the text-book carelessness of my initial layout. Follow the blue wire down from R16 to the lower piece of veroboard. There is maybe 1 cm of track in which the noisy power supply current from the DVM module flows through the TL431 regulators. That doesn’t seem like much. But rather than guessing, I moved the blue wire from the lower veroboard straight to the negative input terminal.



Covers back on, and leave the box ON for 23 minutes to stabilise. Add a cover over the input terminals just as an extra precaution to stop air wafting over the terminals. Finally, stand away from the box whilst doing the measurement so my dog breath doesn’t waft over the terminals and cause slight thermal fluctuations.

Result: Measured this morning with a 23 minute warmup (but no protection over the terminals).
0.4 µV ptp over 1 minute.

Rewired R16 ground wire and more careful thermal management: 0.2µV ptp over 1 minute.

Yes I have arguably changed two things at once. But to get the lowest noise level you have to be careful. It would not have been repeatable to leave the terminals unprotected, and the good change of rewiring the 0V wire could have been masked by the poor overall measurement technique.

I am simultaneously sad that I wired it up so badly in the first place, 
and happy that I have now halved the ptp noise. 

[Lesolee]

I have been saying that the battery life was irrelevant because 4200 mAh / 50 mA is 84 hours.

Of course I naively assumed that when I bought 4200 mA batteries from Ebay, they would be as stated. Nope. The vendor claims they weigh 40-45g. They actually weigh 26 g. That is a red flag. (I have never handled 18650s before, but my first thought when they arrived was that they felt light!)

When flat they won’t even take 1 A (at 4.2 V) for an hour, tailing off during the hour to some smaller amount.

Obviously I have googled it and found that on Ebay fake batteries are just an industry in their own right. Maybe I should have been more suspicious when the battery text read “sheef life” rather than “shelf life”. Sadly I already gave feedback to the Ebay vendor before spotting the issue. 

Now I have another whole diversion into finding out just exactly how crap they actually are. 

[EDIT: The "4200 mA.h" batteries measured as 400 mA.h on a 50 mA discharge. They were sent back to the vendor as underweight and under-capacity.]

[Grandchuck]

The 18650 cells in old laptop batteries are often better than many 'discount' units sold today.  It is often easy to take the battery packs apart and test them and sort them.

[Kleinstein]

I just noted something interesting in the data-sheet of the LMP2021/2022 AZ OPs: There capacitance at the input seems to have an influence on the input bias, at least for that type and an unspecified competitor. If there is not much filtering to the input this could cause some surprise of the external capacitance can change the bias.

Ideally one may be able to reduce the bias current with a suitable capacitor value    .

[MadTux]

Diodes usually suck at low leakage, that's at least what I measured so far.
Selected transistor C-B junctions, with BE connected together usually make far better low leakage diodes than what normal diodes can do.

[magic]

BUT, there is a big gotcha. Is somebody else using that piece of copper for their own nefarious (and noise giving) purposes?

Another possible gotcha is thermoelectric generation if connections to the positive and negative input terminal are done with different materials. Could be responsible for some of the warmup drift perhaps?

edit
That could be another reason to get rid of shunt regulators

[Lesolee]

Another possible gotcha is thermoelectric generation if connections to the positive and negative input terminal are done with different materials. Could be responsible for some of the warmup drift perhaps?

That could be another reason to get rid of shunt regulators

It has to be said that the regulators are not well isolated (thermally) from the amplifiers in my layout. But they do limit the spread of noise currents (artistically represented below by red wiggles).



We also know that power change is the enemy of stability. Suppose the display reads 1.1111 mV and then that changes to 0.8888 mV. Overall, the power consumed with the shunt regulators is constant. Not so with the series regulators. Provided we keep the series resistors (R1/R5) close to the shunt regulators (U1/U2), we should keep the temperature distribution more constant (although this should be a pretty small effect).

[Kleinstein]

The current consumption is not that constant with the shunt regulator: it will change quite a bit when the battery voltage changes.
Only a changing number in the display would not effect the current consumption.
The shunt regulators are not so bad if the resistors a chosen well, but I would not recommend that if one would build the circuit a 2nd time.

There is a positive side of the shunt regulator - it will show a drop out and thus unstable readings at a higher level - possibly useful to detect a failing battery, though this may happen a little early.

The diode leakage is not that critical in this case, as there is still the 1 G resistor in parallel from the current compensation. A 1 G input impedance is usually acceptable for a voltmeter.

[Lesolee]

The diode leakage is not that critical in this case, as there is still the 1 G resistor in parallel from the current compensation. A 1 G input impedance is usually acceptable for a voltmeter.

There is an interesting point about the 1G resistor. You and I know it is there. But what if we didn’t? Ordinarily the bias compensation is connected to the bootstrapped rails. That is important for a 10V swing. You evaluate the impedance as dV/di, in other words how much does the bias current change when you change the voltage.

For this meter the full range input is 1 mV. A bootstrap is irrelevant. Given the current noise, a 1 mV change in input has no measurable effect on the bias current. I guess it means the input impedance is uncertain to the level of 100M (10pA ptp current noise).

Sadly I tried putting a 10 nF cap directly across the chip inputs. It didn’t like that, giving 150 µV offset voltage. (No evidence of oscillation). The chip is now looking a bit fried. 
8 µV ptp where I used to have 0.2 µV. 

No more measurements for a while until I get a replacement. 

[Kleinstein]

To change to series regulator one could use a single +5 V regulator and create a virtual ground. This may be as a buffered 1 V to get the zero suppression.

[Andreas]

Fixed -2.5V regulators don't exist. 

really?
what about TPS72325
or with 2 resistors adjustable TPS72301 or LT1964.

Face the truth: The TO-92 package will be obsolete in near future.
As it is already with most J-FETs and discrete transistors.

with best regards

Andreas

[Lesolee]

Fixed -2.5V regulators don't exist. 

really?
what about TPS72325

The stupid distributor's search engine has LDOs separate from linear voltage regulators. 
I didn't notice that, so missed out on the LDOs.

Face the truth: The TO-92 package will be obsolete in near future.
As it is already with most J-FETs and discrete transistors.

It doesn't make it easy to build stuff on veroboard though, does it.

[Lesolee]

To change to series regulator one could use a single +5 V regulator and create a virtual ground.

I know that idea has been floated before on this thread (maybe by you?). It is a workable option.

[magic]

It doesn't make it easy to build stuff on veroboard though, does it.

Actually, SOT23 kinda fits onto three adjacent copper fields on a perfboard. If you must.

[Lesolee]

So the micro-voltmeter was working quite well, and all seemed fine. But taking a second look at it, the output buffer is, well, non-optimum at best. It is instructive to go through why in some detail.

The adjustment has been omitted for simplicity. I shall just assume that it magically has appropriate values to give exactly 1 volt on the display, corresponding to 1 V input relative to the -2.5 V rail.



Now what happens if the positive regulator changes by 100ppm due to a 1°C in its 100ppm/°C output rating?

100ppm  (0.01%) is 250 µV. This is scaled by a factor of -1 by R2/R1 giving 250 µV at the input the DVM module. That is 2.5 digits, which is ridiculously high. It needs to be 10x better than that at least. Then we have the tracking TC of R2 to R1 which is 200 ppm/°C (worst case), so that is bad as well.

Let’s try the same thing on the negative rail. Suppose the -2.5V rail rises by 250 µV. The output of falls by 250 µV x 100/240 = 104 µV. The overall change of input voltage (as seen by the DVM module) is 354 µV. The tracking TC of R2/R3 has the same scaling factor.

Whilst one could (theoretically) improve all the component TCs by a factor like 50x better, the circuit is fundamentally lousy.

I did consider using a -1V reference, hanging down from ground, and then powering the DVM module from a buffered version of this. But that means the DVM module has to run straight from the unregulated battery, and only works when the top battery is above 4 V. Not workable.

So the next version will need a x1 diff amp with 4 well matched resistors, and a 1 V regulator standing up from the -2.5 V rail.

[David Hess]

So in your tests the 1N4148 had about 16.7 MOhm at 1 mV forward voltage. I remember a measurement of 300 MOhm around 0 V. Anyway the better solution is using a low leakage diode like BAV199 with a small reverse voltage. I guess millions of those circuits exist in ECG machines.

Diode conductance at zero volts is 20 to 30 mS/mA * leakage which for a 1N4148 is consistent with your 300 Mohm measurement.  A true low leakage diode would be more like 300 Gohms.

[LaserEng]

Isn't there going to be quite a few digits (upto around a 100 counts) offset with a -1 mV input due to the DVM module and MCP6041 having the same -ve rail due to the the op amp only being able to get within 10mV  of the rails?

Edit.. Also just noticed the Linear Region output swing of the op-amp is to within +/- 100mV of the rails.

[Lesolee]

Isn't there going to be quite a few digits (upto around a 100 counts) offset with a -1 mV input due to the DVM module and MCP6041 having the same -ve rail due to the the op amp only being able to get within 10mV  of the rails?

The "zero" level is 1 mV referred to the overall µVM input. At this level there is 1 V into the DVM module (wrt -2.5 v). It is true that at -1 mV input to the overall µVM the input into the DVM module approaches 0 V with respect to its negative power supply. Probably it would be best to consider the overall input spec as +3 mV to -0.95 mV to avoid any non-linearities. I only checked the linearity up to -0.95 mV.

Alternatively I could change the offset to 2 mV referred to the input, to get more range. Obviously more offset means more noise and drift in the output buffer, but the new design might cope with that. 

[Lesolee]

Diode conductance at zero volts is 20 to 30 mS/mA * leakage which for a 1N4148 is consistent with your 300 Mohm measurement.  A true low leakage diode would be more like 300 Gohms.

It would be instructive for you to explain where this value has come from.

Certainly I would agree that a well biased base-emitter junction would give 26 ohm at 1 mA as an equivalent output resistance (to which a bulk resistance of say 3 ohms could be added). That would equate to 0.04 S/mA. But I would not be so bold as to expect that to work correctly at or near zero bias.

[EDIT: The formula is derived in post #67 below, and relates to the saturation current of the diode.]

[Kleinstein]

For the 1 V offset a difference amplifier is a good idea. As one has to adjust the 1 V level anyway, there is no need for super accurate resistors. Even if the resistors were 10% off this would still reduce the error from subtracting positive from negative reference / supply by 90%.

Alternatively use a single 5 V regulator and a 1 V ref. Level as virtual ground.

There are still few panel-meters with a +- 200 mV or similar range around, though often a little more expensive.

[Lesolee]

For the 1 V offset a difference amplifier is a good idea. As one has to adjust the 1 V level anyway, there is no need for super accurate resistors. ...

Alternatively use a single 5 V regulator and a 1 V ref. Level as virtual ground.

The diff amp still requires well matched TCs. I found some really nice Vishay matched pairs in (of all things) SOT23 packages. But with 2 ppm/°C tracking TCs they just need to be put in something!

But topologically speaking the floating battery with a single 5 V regulator is the better option. 
There is no matching required; it is all just 1:1.

I don't really like the idea of powering the opamps off -1 V, but I can trivially change my mind and use a 2 V offset, then generate +3 V and -2 V rails from the virtual ground.

New design in progress 

[Lesolee]

Here it is, the much anticipated new design ...



[EDIT: Updated to the latest circuit diagram.]

[iMo]

Is the R2=1k ok?

[Lesolee]

Is the R2=1k ok?

I'm not sure. Those values in the virtual ground circuit are almost placeholders at the moment. I can't quite see how much current will flow in R2. I am thinking it is almost none (just enough for R8). It's difficult for me to get my head around. R8 is there so there is a definite direction for the current, so U3 output stage is not hunting around zero.

If you have a different view please let us know.

[EDIT: Actually there is 3V/22K for R7 and 3V/100K for U4 = < 200 µA]
[EDIT: R8 is worse than useless! ]
[EDIT: R2 at 1K is useless when you reduce C7 to look at fast edge response. The -2V rail bounces and you get overshoot of 3%.  Fast current flows through C7 via R16 and is LARGE! This transient current causes problems if the virtual ground impedance is high.]

[Kleinstein]

1 K for R2 may still work. The more usual values would be more like 100 Ohms, so just enough to isolate the OP from a capacitive load.
R8 has essentially no effect and no need for it.

[Lesolee]

I just encountered a gotcha in the process of building up the Mk2 design. I was about to wrap an AVX Skycap 1 nF 100 V capacitor between the terminals of the MicroVoltmeter, leaving the ends up in the air for connections to other parts. It is difficult to solder onto the copper terminal post, so it is convenient to have thin wires to connect to.

I noticed that the wires were attracted to my pliers! I checked the data sheet and it just says the leads are 100% tin. Except tin is paramagnetic. And these leads are STRONGLY attracted to magnets.  I would think they are tin-plated mild steel or iron. In any case ferromagnetic and low thermals are incompatible.



Ordinarily not a problem. In this application, total disaster! 
 

[RandallMcRee]

Yes, this is very common. Most (non-audiophile!) capacitors have steel leads, tinned. I don't know but I think it has something to do with the manufacturing process requiring a weld of some sort.

I always check just as you did, with a magnet. Also check critical resistors--you never know!

In most metrological circuits I don't think its a big deal (that is to say at DC), but something to be aware of.

[Kleinstein]

With wires from 100 % tin one would hardly be able to solder with lead free solder. So it is 100% surface only. For normal use the capacitor wires would not matter. Just avoid using the wires also in the DC signal path.

[Lesolee]

I always check just as you did, with a magnet. Also check critical resistors--you never know!

Sadly I do know. Every ordinary metal film (and even old carbon film resistors) I have, have magnetic end caps. 

1N4148 glass bodied diodes, magnetic. (Maybe Kovar due to the glass seal.)

So I have no ideal solution for my front end resistors since they have magnetic end caps. Nichrome is supposed to be non-magnetic, but it is not well matched to copper in terms of Seebeck coefficient. It is not at all clear if there is such a think as a low thermal emf resistor (although low resistance current shunts do mention it.) The datasheets just say "end caps" without mentioning their material. Having bunged out big bucks for the low thermal EMF binding posts, it is annoying that the resistors now have this built-in error mechanism. 

[Kleinstein]

Some NiCr alloys (with some additions) are additionally optimized for low thermal EMF.  For precision circuits one should have a symmetric thermal design for the critical resistors, so that the temperature is about symmetric and thus no net thermal EMF. This could be a bit tricky with a free air / proto-board circuit.  With only µV to aim for this is not so bad. With the ADA4522 one could however increase the gain even further. The noise level is low enough to still resolve some 100 nV and with some filtering / patience even 10 nV.

The overall power of the circuit is low and the power of the 1 critical resistor is also relatively low if the voltage is low. So I would not worry so much about this

[Lesolee]

Here it is, the functioning Mk2 design. It is not fully tested yet as the new 18650 batteries failed to arrive last week. (As mentioned in post #25, the old ones were rubbish. I measured them as 400 mA.h as compared to their stated spec of 4200 mA.h  - marked as UltraFire, but may be fake  ).







Kleinstein’s post (#27) showed that the chopper amp bias currents have a dubious relationship with impedance, which is highly undesirable. And Splin (post #13) suggested considering an ADA4625, which I have used.

Basically the box, terminals, pot, DVM module, and charger socket are all as they were, but the two amplifier boards have been replaced. In the process I planned from the start to use Magic’s suggestion (posts#3, #10) to lift pin 3. This was not mechanically sound on the earlier design. It is fine in this new, more mechanically stable configuration.

There is a major gotcha with the ADA4625. The worst case offset voltage is shown clearly as 80 µV, with 15 µV being more typical. GOTCHA. Turn the page for 5V operation and it suddenly becomes 600 µV.  My nicely laid out front end had to have a hasty offset correction pot bodged in. The uncorrected offset was around 200 µV, so the value of R20 is on the edge of workability (or tuned to perfection if you prefer).

The output of U4 is trimmed to 0 V when the main input terminals are shorted, then the set 2 V pot (R3) is adjusted to make the display read 2.0000 V.

The bias current measured as around 5 pA using the 1M//100nF method. The bias current noise was about the same as measured on the Mk1 design. But then I had another rare moment of clarity. The bandwidth of the amplifier is around 1 Hz. The rms Johnson noise in a 1M resistor in a 1 Hz bandwidth is 0.127 µV, which is around 0.8 µV ptp. That is almost all of the noise I was seeing on the 1M//100nF test.

I checked the Fluke Calibration: Philosophy In Practice manual and was disappointed to find that whilst “bias current” is indexed, they were short of an actual procedure to measure it.

I used the “charge a capacity” method, which I have never previously used, and have no idea where I heard of it. 

 Mk2 bias current.xls (18.5 kB - downloaded 70 times.)

The charge slope of 2.5 µV/s into a 2.2 µF capacitor gives a bias current of 5.5 pA, in good agreement with the 1M//100nF method. 

[EDIT: updated circuit to v1.10] March 25, 2020
[EDIT: updated circuit to v1.30]

[David Hess]

Diode conductance at zero volts is 20 to 30 mS/mA * leakage which for a 1N4148 is consistent with your 300 Mohm measurement.  A true low leakage diode would be more like 300 Gohms.

It would be instructive for you to explain where this value has come from.

Certainly I would agree that a well biased base-emitter junction would give 26 ohm at 1 mA as an equivalent output resistance (to which a bulk resistance of say 3 ohms could be added). That would equate to 0.04 S/mA. But I would not be so bold as to expect that to work correctly at or near zero bias.

Bob Pease discusses it on page 69 of his book Troubleshooting Analog Circuits.  I measured values consistent with it once and so is dietert1's result.  I do not know the details about how Pease arrived at that value so I will quote what he wrote below:

Of course, you don’t have to reverse-bias a diode a lot to get a leakage problem.
One time I was designing a hybrid op amp, and I specified  that the diodes be con-
nected in the normal parallel-opposing connection across the input of the second
stage to avoid severe overdrive (Figure 6.3).  I thought nothing more of these diodes
until we had the circuit running - the op amp’s voltage gain was falling badly at 125
“C.  Why? Because the diodes were 1N914s, and their leakage currents were increas-
ing from 10 nA at room temperature  to about 8 uA at the high temperature. And
remember  that the conductance of a diode at zero voltage is approximately (20 to 30
mS/mA) X  ILEAKAGE.  That means each of the two diodes really measured only 6 kohms.

Because the impedance at each input was only 6 kohms,  the op amp’s gain fell by a
factor of four,  even though the diodes may have only been forward or reverse biassed
by a millivolt. When we substituted collector-base junctions of transistors  for  the
diodes,  the gain went back up where  it belonged.

Thus you cannot safely  assume that the impedance of a diode at zero bias is high if
the  junction’s saturation current is large. For example, at 25C  a typical IN914 will
leak 200  to 400 pA even with only 1 mV across  it. Therefore, a 1N914  can prove
unsuitable as a clamp  or protection diode - even  at room temperature - despite
having virtually no voltage biassed across it,  in even simple applications  such as a
clamp across  the inputs  of a FET-input op amp.

[Lesolee]

I thought I would practice my diode leakage current measurement technique on a rubbish 1N4148 diode, just to get warmed up, so to speak.

Here is my measurement circuit:



And here is the setup, with particular emphasis on the cardboard box, cut out carefully to exclude both air flow and light. This is particularly important on a 1N4148 which has a transparent glass body (and is therefore totally unsuited to low-leakage applications!).



The measurement noise has been greatly reduced since the last tests simply by putting 2µ2 across the 1M resistor (rather than the 100 nF used previously). This kills the Johnson noise nicely.

The point of interest is that regardless of forward or reverse bias, at these levels (up to ±2 mV) it makes little difference if the diode is forward or reverse biased.



It should be noted that the 31 pA/mV slope (= 32 Meg) is in poor agreement with dietert1’s mention of 300 Meg for a 1N4148 (post #11).

It should be noted that the leakage current is proportional to the applied voltage in this very limited range around zero, but this leakage resistance is strongly dependant on the temperature.

Now that I have had a little practice, I can actually try some proper low leakage diodes (and diode replacements). 

[EDIT: major scaling error in mV applied.   Was a factor of 10 too high.]

[EDIT: Just to be clear, nobody in this thread has ever suggested that using a 1N4148 as a clamp diode is a good idea. The mentions of the impedance of the 1N4148 were not presented as recommendations.]

[EDIT: Post #66 below clarifies Bob Pease's formula such that the ILEAKAGE is the reverse saturation current of the diode. Remove comment about the formula being wrong, and add some detail. ]

[Lesolee]

I changed the top resistor in the bias divider chain down from 1M to 10K so I could extend the bias range, in order to possibly see something interesting.



Clearly, at current levels below 1 pA the readings are uncertian. The diode curve agreement on the log plot is very nice.



Probably the other good options for diodes will be difficult to compare since they will all probably be excellent at room temperature. It may be necessary to heat them up to separate them out in terms of the best leakage performance, although the BC550C is demonstrably excellent for this application.

[EDIT: updated plots to include an 82°C measurement as well, and to correct the transistor type to BC550C (not B)

[dietert1]

Apparently you did not perceive the recommendation Kleinstein and i made to use BAV199 low leakage diodes with a small negative bias. No reason to start false communication.
Maybe you can have a look at the Fluke 845A input circuit. They implemented a pair of antiparallel diodes similar to your original proposal. But they bias those diodes from a copy of the input voltage that they obtain from the output of the chopper amplifier output using a voltage divider. Yet another way to implement offset currents below 0.1 pA. You can find the schematic in one of the Fluke 845A threads.

By the way, about nine months ago i used a 100x ADA4522 preamplifier with one of our HP 3456A voltmeters to compare voltage references. Allan variance with shorted input showed a broad minimum of 3 nV at about 30 to 60 seconds.

Regards, Dieter

PS: The advantage of a BAV199 over a pair of separate diodes is thermal coupling to keep leakage in balance.

[Rerouter]

Lesolee would you be able to try the base-collector as a diode, seems that should be the lowest leakage configuration, and curious about the forward voltage hit.

[Lesolee]

Lesolee would you be able to try the base-collector as a diode, seems that should be the lowest leakage configuration, and curious about the forward voltage hit.

Yes, MadTux suggested a C-B junction with B-E connected together (post #28).

Post #55 (Bob Pease via David Hess) suggests a C-B junction with no mention of the emitter leg.

I am inclined to cut the emitter leg off.

But the bigger issue is discriminating between the different diodes and/or structures. Below 1 pA is largely irrelevant to me in this application, as is high temperature operation. Nevertheless, it is interesting from an academic point of view (and for other applications). So I am just trying to think how to improve the discrimination, perhaps by heating the "diode" up to say 60°C. I just need a consistent way to do so (that does not involve a mineral oil bath).

[Rerouter]

For me the leakage is already brilliant, its more what the forward changes is as that should be a larger junction, (thus lower leakage)

The emitter is used when you want a slightly faster reverse recovery time, about 200ns vs 30ns from other tests I can find. I would assume this would also make the leakage a bit higher.

This should also imply the C-B junction leakage should decrease for higher voltage rated transistors assuming similar beta.

[Lesolee]

The emitter is used when you want a slightly faster reverse recovery time, about 200ns vs 30ns from other tests I can find.

Where are these other tests? 

I went for a high Hfe transistor on the basis that if it has high current gain, less base current is wasted in shunt resistance. I also tried a 2N3703 earlier (with the noisy test method and Mk1 design) but the test method was not adequately discerning.

A new thermal jig is in progress using bits and pieces on hand. The main body is an earth pin from a non-rewireable BS1363 plug I found in a scrap bin! 

Needless to say I first had to wire the µVM up to an old plug-top power supply to free up a bench power supply, since I only have two single-output PSUs.

[EDIT: found this whilst waiting for the epoxy to set]


from OP77 datasheet as mentioned in AN018 low-leakage diode note from Rod Elliot
https://sound-au.com/appnotes/an018.htm

[Rerouter]

https://sound-au.com/appnotes/an018.htm
https://electronics.stackexchange.com/questions/259713/can-i-abuse-a-transistor-as-an-esd-protection-diode

The second one is more where my guesses come from as it seems to increase capacitance when the emitter is connected, though I will agree it does not show the exact configuration.

[Lesolee]

I found the same app note. Sadly (for you) I posted the link 5 minutes before you. 

This is the donor UK mains plug with the WIP thermal stabiliser. The extra hole was drilled and tapped M3, and the intention is to recycle the fuse holder into a clamp.



And here is the finished article:



That is a 10R 5W resistor, and it was run at around 4 V to get the measured block temperature up to 82°C. The graphs in the earlier post have been updated to include the 82°C data.

[Lesolee]

Lesolee would you be able to try the base-collector as a diode, seems that should be the lowest leakage configuration, and curious about the forward voltage hit.

Here it is, head to head using the same transistor. The temperature was measured on the block, so the junction temperature may be a little less due to cooling through the leads. But both configurations have the same transistor, and the mounting method was not changed for the test, which is the best one could hope for.

I am surprised by the result. The graphs show no appreciable difference between the two configurations in terms of currents.

[David Hess]

It should also be mentioned that Bob Pease’s formula (see post #55) is remarkably inapplicable given that the leakage resistance is independent of current in this range. 

I think some context is missing from what I quoted and Pease is referring to the reverse saturation current of the junction and not the leakage at any particular voltage.  Obviously the leakage at exactly zero volts is zero.

[Lesolee]

The Pease formula (post #55) is easy to derive, now we know what it is trying to say.

[Lesolee]

It is perhaps worth a little look back at a proposed clamp solution using BAV199 diodes. I originally had such a scheme in mind (but not with BAV199s) but rejected it as it was unnecessarily complicated. I also rejected the suggestion of BAV199s as they are surface mount parts and would have been a pain to use compared to the simplicity of a pair of back-to-back transistors.

But let’s just take a look at a BAV199 data sheet snip (the full data sheet is attached as well).



At a reverse voltage of 3 V they typically have a reverse leakage of 200 pA. Doesn’t sound very good to me. 

Oh, maybe I used the wrong manufacturer. How about this one?



That’s better: 3 pA at room temperature, provided you read the “correct” curve. The typical value is 3 pA and the worst case is 5 nA. A factor of 1666 between typical and worst case. That seems like a bit more than 3 sigma! 

Let’s try somebody else.



Wow, 1 pA with a bold line. Why worry about a dashed line. That can’t be important, can it? 

I would love to speak to an in-house engineer at one of these manufacturers as to what on earth we are supposed to do with such a ratio between “typical” and worst case. If I get a reel of all the same performance devices at 1 nA leakage, all my production run of discombobulators are going to be rejected and end up on my bench to fix. But the manufacturers can insist that the device is in-spec. Everyone else got the good ones. 

If you want a well specified diode for low leakage we have the FJH1100. 3 pA at room temperature, guaranteed. WOW! Of course if you use it at any temperature other than 25°C there is no spec at all.  No curves, no typicals. And it costs an arm and a leg to buy. 

Another point, if you look back to the Diodes Inc curves above, their diodes don’t follow the diode equation. They tweak the doping, and the diffusions, and so forth, to make it a good diode. But that doesn’t make it follow the diode equation!

[David Hess]

I would love to speak to an in-house engineer at one of these manufacturers as to what on earth we are supposed to do with such a ratio between “typical” and worst case. If I get a reel of all the same performance devices at 1 nA leakage, all my production run of discombobulators are going to be rejected and end up on my bench to fix. But the manufacturers can insist that the device is in-spec. Everyone else got the good ones. 

It comes down to the cost of testing.  The parts are only tested to meet the worst case specifications, which in this case is the maximum leakage because testing leakage at a lower level costs more time which is money.  Testing time is literally 10s of cents (as of 1980 anyway) per second.  If you want a good example of this, check the price difference on the LMC6081 ($2.45) and LMC6001 ($12.24); they are the same part tested to different leakage specifications.

If you want a well specified diode for low leakage we have the FJH1100. 3 pA at room temperature, guaranteed. WOW! Of course if you use it at any temperature other than 25°C there is no spec at all.  No curves, no typicals. And it costs an arm and a leg to buy. 

If you want an inexpensive but tested low leakage diode, then the 10 picoamp 2N4117 and the 1 picoamp 2N4117A low leakage JFETs are the best option.  Or grade your own parts, I like 2N3904s, or design your circuit so that it can test itself and the parts can be replaced if necessary.

[Lesolee]

If you want an inexpensive but tested low leakage diode, then the 10 picoamp 2N4117 and the 1 picoamp 2N4117A low leakage JFETs are the best option.

Probably the price went up when you weren't looking.

£11.94 each (from Mouser.co.uk) is not inexpensive 

The leakage is also only specified at room temperature. I think this sort of part is no longer popular, and they are being discontinued, or re-manufactured at a significant premium.

[Kleinstein]

The 2N4117 is the old TO18 case. There are newer SOT23 equivalents - not sure about the test level however.

For a hobby project one can just try the BAV199 - chances are very good they are more close to typical. For a larger series: Check a few units per real, and take the risk for rework, or get some custom tested parts or other tested low leakage diode. They are not cheap though.

[Lesolee]

It comes down to the cost of testing.  The parts are only tested to meet the worst case specifications, which in this case is the maximum leakage because testing leakage at a lower level costs more time which is money.

That might actually be reasonable. They realistically expect the parts to be that good, but they can't test to that level routinely so they won't spec it. In that case you would hope they would test-screen a few diodes from each wafer, or each wafer batch, to ensure they are as expected -- but they don't mention that. It would give (me) more confidence if they did. But it does mean that not all BAV199s are created equal. The Diodes Inc data sheet shows a definitely worse diode.

[dietert1]

10 nA (worst case at 70 V and 70 °C) means less than 1 pA at 1 mV. What's the problem?

Regards, Dieter

[Lesolee]

10 nA (worst case at 70 V and 70 °C) means less than 1 pA at 1 mV.

Well it's interesting that you should say that. I would argue that you are applying an unguaranteed extrapolation method to make such a calculation.

How did you calculate that? (And is it <1 pA at 1 mV and still at 70°C?)

[dietert1]

This is the most basic linear extrapolation: 10 nA / 70 000 mV * 1 mV = 0,14 pA. Due to cascade effects that exist at 70 V but not at 1 mV it will probably be even lower than that. Yet as far as i understand you have a setup ready to check whether leakage stays below 1 pA at elevated temperature. Much better than discussing the datasheet.

Regards, Dieter

[Lesolee]

This is the most basic linear extrapolation: 10 nA / 70 000 mV * 1 mV = 0,14 pA.

I am confident that the supplier has more expertise in this field than me. Of the 3 data sheets to hand, only Diodes Inc give measured leakage data with voltage. Over the range from 70 V down to about 5 V the leakage current drops by a factor of perhaps 2. The linear extrapolation method predicts a factor of 14 reduction to 5 V whereas the data sheet says a factor of 2.

I think you are being very 'brave' in your estimation of the current from 1 data point. On the other hand I am saying to use a part with no spec at all! I am working on the basis of an area factor. A smaller junction should give a pro-rata lower leakage compared to a similar junction of larger size. Therefore a smaller collector current device should theoretically give a lower leakage. Such transistors do exist, and I would have bought one, but they come in reels of thousands from distribution -- which exceeds my interest.

There is always a problem with extrapolating manufacturer’s beyond what they are willing to state. They are, after all, the experts. If they were confident that such extrapolation was reasonable, I am sure they would be keen to publish it, even as a typical value. There then comes a question of whether the designer is being clever or unreasonable.

As long as you get away with it you can consider yourself clever. If it fails, then you go from hero to zero overnight.  

[dietert1]

The Diodes Inc curves have a knee at 7 V, where they state about 550 pA typ at 85 °C. From then on leakage appears to drop exponentially, roughly a factor 2 for a 20 % of voltage drop. Again those are typical values that one would measure when looking at a few pieces like you do. But OK, we can stop this until you have a BAV199. Then you can can contribute something.

I'd like to recommend once more having a look at the Fluke 845A input circuitry to learn where to place the protection diodes and where not to place them. In that circuit the protection diodes never see more than some 10 or 20 nV. As far as i understand then you can use almost any diode.

Regards, Dieter

[Lesolee]

I'd like to recommend once more having a look at the Fluke 845A input circuitry to learn where to place the protection diodes and where not to place them.

So readers can easily find the relevant schematics, here is a link:
https://xdevs.com/fix/f845ab/

I was surprised that this is claimed to be a "high impedance" null detector, given that on the 1 mV range and below it is evident that there is a 1M resistor directly across the input. Then I found the Issue 3 Errata of 7/93 (on the same site) where they correct the input resistance to 1M on the 1 mV range and below. 

[Kleinstein]

Extrapolating the leakage current to lower voltage is tricky. One can do that with the ideal equations, but the problem with leakage are those parts that don't work as expected and have more leakage. It is very hard to tell how those bad guys behave. For the good ones that follow the typical curve, everything is fine.  One may be able to test at a slightly higher temperature and hope things get better at lower temperature also for the bad examples.

[Lesolee]

In doing some full range testing on the µVM  I noticed that the settling time was unreasonably long. It is ok at fractions below a tenth of full range, but still not ideal. The obvious culprit is the 2µ2 polyester capacitor across the 100K feedback resistor. I hoped it would be good enough on dielectric absorption, but with 5 digits resolution it is noticeably non-ideal. 

So I made up a dielectric test set today, which was far less straightforward than I would have expected. The LM555 timers just like internally reseting themselves when they switch the relay loads. 



Anyway it is working now, so here is a taster of tomorrow’s testing. I have 4 caps to test. First is a 2µ2 ceramic as the rubbish one to get started. Then there is the existing polyester, a new PPS capacitor, and a new PP X2 beast. Details tomorrow.



Rather than the pure integrator approach, I am continuously discharging the capacitor via 1M. This makes the amplifier easier (its just a scope input). It also more readily shows the shape of the dielectric effect. Just a peak value does not tell you the time constants involved, so this test should be more discriminating against long time constant absorption.



I just checked, and a 20 minute charge does give a slightly higher peak (83.6 mV compared to 81.3mV) but I am hoping for larger changes between the capacitors than that.

[CDN_Torsten]

You may want to place a diode across the relay coil to 'absorb' the energy of the collapsing magnetic field...

[2N3055]

Bipolar 555 needs good decoupling on Vcc. Very unstable otherwise. Try 100nF ceramic and 10uF elco.. And yes, a blocking diode on relay like Torsten said..

[splin]

Alex Nikitin measured the leakage of various diodes in this thread:

https://www.eevblog.com/forum/metrology/measuring-nanoamps-and-below-like-a-ninja/msg1114374/#msg1114374

He measured various BAV199s - see reply #64 - but didn't specify the manufacturers. He hinted at the best, TI and NXP in another post however:

https://www.eevblog.com/forum/metrology/diy-cable-for-picoammeter/msg2798298/#msg2798298

Also have a look at this thread:

https://www.eevblog.com/forum/projects/forward-leakage-of-a-diode/

[David Hess]

If you want an inexpensive but tested low leakage diode, then the 10 picoamp 2N4117 and the 1 picoamp 2N4117A low leakage JFETs are the best option.

Probably the price went up when you weren't looking.

£11.94 each (from Mouser.co.uk) is not inexpensive 

The leakage is also only specified at room temperature. I think this sort of part is no longer popular, and they are being discontinued, or re-manufactured at a significant premium.

As Kleinstein points out, get the plastic packaged equivalents.  Mouser sells Fairchild MMBF4117s in the SOT23 case for 47 cents each and at 20 volts, they are 10 picoamps at 25C and 25 nanoamps at 150C.  The TO-92 version is $2.42.

I have never had problems extrapolating leakage using the doubles every 10C rule.

[Lesolee]

You may want to place a diode across the relay coil to 'absorb' the energy of the collapsing magnetic field...

It would have been easy to miss, but the relays are bistable (latching) single coil types. The coil polarity is reversed in normal use, so a flywheel diode is not possible across the coil.

[Lesolee]

Bipolar 555 needs good decoupling on Vcc. Very unstable otherwise. Try 100nF ceramic and 10uF elco..

100 nF ceramic directly between the power pins 1 and 8 was one of the first things I tried (unsuccesfully). 

[2N3055]

Bipolar 555 needs good decoupling on Vcc. Very unstable otherwise. Try 100nF ceramic and 10uF elco..

100 nF ceramic directly between the power pins 1 and 8 was one of the first things I tried (unsuccesfully). 

I presumed you did, but try adding elco too.. Spikes switching inductive load are large. 555 itself have large switching spikes even without load on output..
Problem is that it has common ground for high current path (output) and logic. When you pull a current spike it's ground ref level starts "swimming" a bit.
Make sure you have low impedance grounding. 555 is sometimes finicky.
As for diodes, fair enough, I didn't see they were bistable relays. But you can still put diodes, except you need 4 of them. One diode from negative to 555 output and one from output to positive supply, on both 555. 555 has push-pull output, so one diode across each transistor. Basically what you would do on an H-bridge (which is what you have here).
Regards,

[Kleinstein]

The test setup for DA looks odd, with quite a few points that can cause trouble.
Unless one needs to test hundreds of capacitors there is no real need to automate the test. Just using manual switches should be good enough, at least for the slow DA that is of interest here.

Unless one has a really high impedance scope (e.g. more like GOhms input impedance), it is problematic to watch the recovery voltage with the scope at the time. It may still work for the large and high DA polyester cap though. The recovery is slow and the more suitable instrument would be a high impedance voltmeter.  Even then on could consider to disconnect it at time were no reading is needed.
It may be at least necessary to connect the meter only after the cap is shorted, so there would be no recovery from inside the meter.

The only point that may want some automation would be the discharge time, especially if shorter times are of interest too. So this would be a relay (no need to go bistable) to close some defined 1-10 seconds or so.

[Lesolee]

As for diodes, fair enough, I didn't see they were bistable relays. But you can still put diodes, except you need 4 of them. One diode from negative to 555 output and one from output to positive supply, on both 555. 555 has push-pull output, so one diode across each transistor.

The thing is, the push-pull output will absorb the flyback. I don't think the output exceeds the rails (but I will recheck that). In  this case the catch diodes won't be able to catch anything.

To be fair, I just knocked the circuit up yesterday, without too much care. It was supposed to be a quick test. Probably I should rewire SW1 (which is actually DPDT) so I can transfer the relay currents back to the individual driver LM555s. That will route the flyback currents more correctly.

[Lesolee]

The test setup for DA looks odd, with quite a few points that can cause trouble.
Unless one needs to test hundreds of capacitors there is no real need to automate the test. Just using manual switches should be good enough, at least for the slow DA that is of interest here.
...
The only point that may want some automation would be the discharge time, especially if shorter times are of interest too.

Not odd. Novel! It means anyone can easily measure DA without needing expensive electrometers. An improvement.

It also differentitaes between slow DA and VERY slow DA very easily, which is potentially useful (depending on the outcome of the testing).

I could not switch a switch for 1 second reliably. And now I have turned it down to 500 ms.

So this would be a relay (no need to go bistable) to close some defined 1-10 seconds or so.

The relays are bistable because I bought them for another project where the low thermals of a bistable will be critical. I am practicing using them, as I have never designed them in before. I agree they are not necessary here. LS1 could indeed be a mechanical switch, but I still need two monostables.

[Kleinstein]

The way the scope is connected is so that it would need the very high impedance of an electrometer to measure the slower DA. This is especially true for smaller caps.

With 10 M input impedance to the scope (with 10:1 probe) and 1 µF one has a time constant of 10 seconds only. So one would be limited to the rather fast part of the DA. If the scope is connected all the time, one could as well also measure the discharge phase or take the trigger from the start of discharge, which sets the start of the time scale. The lenght of the discharge is not that important, one just also captures more of the faster DA. Instead of defined discharge lenth one can as well take the voltage at the given time as the zero point. So a single captured curve includes DA from different time scales.
With just the scope, for longer times ( t >> R*C) the measured curve changes from a voltage reading to a current reading - still possible, but unusual. One may also run into a sensitivity problem, as scopes are not very good for small DC voltages. The intermediate time (e.g. 1 - 100 seconds) would be tricky to use.

If the meter / scope is permanently connected, one kind of needs a high input impedance. So the part of the circuit to build would be a high impedance buffer / amplifier, no so much automating the switches.

[Lesolee]

The results from the tests:









My scope is pretty down-market at 20 mV/div maximum sensitivity. A normal 2 mV/div scope would give a much more reasonable resolution on the measurement. It is disappointing that the best cap, the PPS, is only 4x better than the ordinary PET capacitor.

[Kleinstein]

Normally PP is supposed to be about 10 times better than PET. However not all the caps are the same and material purity can differ depending on brand and type. The PET capacitor looks relatively good. So the smaller factor of 4 could be due to good PET one, not necessary a poor PP and PPS example.
The difference gets even small for the longer time scales ! It is more like only a factor of 2 after 60 seconds.  Due to the limited time scale it is rather difficult to compare to the normal DS numbers.

[Lesolee]

If the scope is connected all the time, one could as well also measure the discharge phase or take the trigger from the start of discharge, which sets the start of the time scale.

I hope you are not suggesting that the scope measures the full 50 V and then somehow also measures the 8 mV recovery voltage. (?) That is unworkable. The scope wouldn't have the dynamic range, couldn't change range that quickly, or would overload so badly that it would take an indeterminate time to recover.

Probably I have misunderstood what you are proposing there.

The elegance of the present relay configuration is that the scope (or buffer) is never overloaded, so does not have a recovery problem to deal with. There is, however, a weakness with it, in that the impedance to the scope (or buffer) changes from 0R to 1M. That is an unnecessary error source.

... for example, I could put a 10M resistor in series with the scope input for normal use, then short that out when the measurement cycle starts.

[sorin]

To start I want to thank you for sharing your experiment with us, i appreciate that.
I want to suggest you a different method to measure dielectric absorption in a cap, connect a picoamp input OPAMP as unity gain buffer and measure the capacitor voltage drop over time (tens of seconds or even minutes and hours).
A cheap alternative scold be LMC662.
Don't forget to shield them.

or

https://web.archive.org/web/20180723192448/http://www.datasheetarchive.com/files/national/htm/nsc03883.htm

[Lesolee]

I want to suggest you a different method to measure dielectric absorption in a cap, connect a picoamp input OPAMP as unity gain buffer and measure the capacitor voltage drop over time (tens of seconds or even minutes and hours).

I’m definitely warming to the idea of a buffer. This data from the earlier 20 V test shows that the curves (when re-scaled) look pretty similar. The offset on the blue curve is simply the scope’s s/c to o/c offset.



I have (conceptually) fixed that in a revised design which I will be re-wiring to today. Both capacitors measured as being within 1% of each other on a Tenma LCR meter (72-6634), but then again the value of an X7R capacitor is dodgy anyway. I need to repeat that test with less noise (eg x10 buffer).

[Kleinstein]

For including the discharge phase it is enough to have the trigger time. So no need to measure the full voltage with the scope / amplifier.
The starting time for the DA processes is the start of discharge (more accurately about when the voltage dropped to 1/2 its value, but the discharge should be relatively fast anyway).

A buffer / amplifier would really help, especially with the relatively poor quality scope. It does not have to be a sub pA input current amplifier, for the slower processes it is also about low frequency noise and drift.  A constant input bias could be compensated by doing 2 tests with opposite sign of the voltage to start with and than take the difference of the two.
Already a relatively common amplifier like TLC272, TL072 or OP07 could be better than the scope, though far from ideal. The AZ OP from the µV meter could also work quite good.

[Lesolee]

The PET capacitor looks relatively good. So the smaller factor of 4 could be due to good PET one, not necessary a poor PP and PPS example.

I missed out a relevant result. The results for the capacitor identified as PE (old) were not mentioned as the capacitor is 35+ years old, and who knows where it came from. The PET recovered to 29 mV, whereas the PE recovered to 33 mV from the same 50 V initial voltage. Admittedly the PE is a 250 V version, whereas the PET is only 50 V.

[Lesolee]

A constant input bias could be compensated by doing 2 tests with opposite sign of the voltage to start with and than take the difference of the two.

Aaaahhhhhh. 

There are two distinct issues:
(1) choosing the best cap for a particular job
(2) measuring the best cap's performance

Obviously the best test method is to put the cap alternatives into the target circuit and seeing which is best. That's probably easier in a sample/hold than in this particular application where the 2µ2 is being charged/discharged via a 100K resistor.

I think this test setup is good for this intended application as the cap is being discharged. Possibly less good for an infeasibly long analog sample and hold (or integrator).

We shouldn’t get too hung up on the testing out of circuit! I need to see if I can find some better cap candidates.

[sorin]

We shouldn’t get too hung up on the testing out of circuit! I need to see if I can find some better cap candidates.

You can try some Russian Teflon caps, I think that this are the best.

[Lesolee]

You can try some Russian Teflon caps, I think that this are the best.

At 2µ2 that would be seriously large. I doubt I could afford it. 

[Kleinstein]

For 2.2 µF the prime candidate is a PP film cap. Here not all brands may be the same. In my tests (https://www.eevblog.com/forum/metrology/diy-high-resolution-multi-slope-converter/msg2763326/#msg2763326) with 2.2 nF size and some 1-40 ms time scale however I did no see much difference. The best cap I found at this value was a TDK brand  NP0 cap, about 5 times lower DA than PP or PS.
However NP0 in 2.2 µF is a little tricky and large. The large ones may also behave different.

For just the 3-4 digit digital display a PP cap should be good enough. I am not sure one really needs 2.2 µF. The display module also does some averaging.

The brute force way would be to do only minimal analog filtering and than use a separate ADC, digital filtering and display. Digital filtering can be finite response type (like running average) and thus settle to 100% in a finite time - this may be an advantage over the exponential settling found for the analog filters, even with a perfect cap.

[sorin]

According to Bob Pease the next best thing is Polypropylene.

[MegaVolt]

That might actually be reasonable. They realistically expect the parts to be that good, but they can't test to that level routinely so they won't spec it. In that case you would hope they would test-screen a few diodes from each wafer, or each wafer batch, to ensure they are as expected -- but they don't mention that. It would give (me) more confidence if they did. But it does mean that not all BAV199s are created equal. The Diodes Inc data sheet shows a definitely worse diode.

This sounds absurd but you can use the ADA4530-1 as an expensive protection element with an input current in the fA area and a maximum protection current of 10mA. You must connect power to it and use only the input

[splin]

I don't know about the meter you used,  but these 5 digit meters use an 18bit ADC, MCP3421with differential input (the SOT-23-6 near the sense i/p pads) :

https://www.ebay.co.uk/itm/0-36-5Digit-DC0-33-000V-0-4-3000-33-000V-Precision-Digital-Voltmeter-Panel-Meter/202517747023?hash=item2f26ff954f:m:mUvj8klzZrGNsa3CWACgikw

You can cut the trace connecting the -ve input to the -ve supply and connect it to your local ground to eliminate the need to offset the input by 2V and the attendant drift and noise. There are two resistors dividing the input down to match the 2.048V ADC input range. The ADC has a PGA with x1, 2, 4 and 8 so the meter uses x8 for low voltages switching to x1 when the input voltage exceeds 4.3V (ish).  The divider totals 347k on my meters.

I have some of these meters and they are really good - see:

https://www.eevblog.com/forum/projects/$5-voltmeter-with-5-digit-(0-1mv)-resolution/msg591905/#msg591905

There are lots of sellers of these meters but they aren't all the same - check the photos of the PCB match this one.

[Kleinstein]

Even with an ADC that can operate with negative voltages this does not mean the µC to convert the number does actually show negative numbers as well. The LED display may not have a dedicated sign.  So it would be about making your own ADC + display part. Here the MCP3421 can be suitable relatively low cost ADC.  If one knows the µC used well (AFIAK STM8... in some examples) one could in theory hack die HW and adapt the software if needed.

The MCP3421 is at least capable to do essentially continuous sampling of the input. So there may not be much need for analog filtering in this case.

[splin]

Even with an ADC that can operate with negative voltages this does not mean the µC to convert the number does actually show negative numbers as well. The LED display may not have a dedicated sign.  So it would be about making your own ADC + display part. Here the MCP3421 can be suitable relatively low cost ADC.  If one knows the µC used well (AFIAK STM8... in some examples) one could in theory hack die HW and adapt the software if needed.

The MCP3421 is at least capable to do essentially continuous sampling of the input. So there may not be much need for analog filtering in this case.

True but usually you can connect the signal input to ensure a positive result, or you can include a reversing switch. The advantage is to avoid the drift and noise of the 2V offset required to the meter supply. If you decide to continue to use the 2V offset, driving the ADC -ve input directly allows you to separate the offset reference from the noisy 5 digit meter power supply rails and provides more flexibility for the 5 digit meter's supply rails so long as the inputs remain within the ADC's common mode limits.

[Lesolee]

This is the limit for the Mk 1 design. Starting on the buffered Mk 2 design tomorrow.

[Lesolee]

I don't know about the meter you used,  but these 5 digit meters use an 18bit ADC, MCP3421with differential input (the SOT-23-6 near the sense i/p pads) :
...

You can cut the trace connecting the -ve input to the -ve supply and connect it to your local ground to eliminate the need to offset the input by 2V and the attendant drift and noise.

The design was changed to offset the panel meter by 2 V and that is now pretty stable. But obviously if the offset could be removed it would make all voltages easier to read (compared to subtracting 2 mV from negative readings for example!)

Mine is not the same as yours.

[Lesolee]

The hugely anticipated integrator version of the dielectric tester (Mk2) is now working.

The LEDs to show relay state, although apparently trivial, make a huge difference in testing. When you have to wait 10 minutes and then find that the system wasn’t reset, or the scope wasn’t re-armed, or something else, that gets boring very quickly. 

The Mk2 construction may seem familiar to some. The Mk1 donated itself to the building effort. 

Clearly you get a lot more recovery voltage on the integrator version. How relevant that is, is debateable. If the capacitor is being used in a filter, or as a bandlimit, it will have a resistor around it, and that will shunt away the ‘weak charge’ hidden behind gigohms of series resistance.

For technical interest, I measured the ramp rate on the buffer output as 1.6 mV/minute. This equates to 6 pA leakage, which is more than adequate for the testing.

I have several more tests to run … 

[Kleinstein]

The curve looks a lot better now. The buffer / amplifier really helps.

To see how much is real leakage and how much is the very slow part of the DA.
To test the leakage one could check with a much smaller capacitor (e.g. 1 nF) range, preferably a low loss one like PS, PP or NP0.

[Lesolee]

Just as a sanity test, since it would have been easy to make a mistake, just one resistor change per test ...

[Lesolee]

To test the leakage one could check with a much smaller capacitor (e.g. 1 nF) range, preferably a low loss one like PS, PP or NP0.

Your command is my wish ...

You see that grey thing on which the tester board is sitting in the earlier post? It is a Sainsbury’s 100% cotton towel. I have been using it as a ESD build-up prevention mat. I couldn’t measure any conductivity across  it, even with a 1000 V hipot tester, but then I didn’t try that hard. So the last thing I should be doing is laying the veroboard tracks directly on top of this “conductive” mat. 

So lifting the board off the mat and supporting it just by the edges where nothing interesting is happening we get this result …



The charge injection spike is interesting. Obviously I couldn’t see that with 2200x more test capacitance. Presumably it is the relay coil or the LED contact causing it. (The Panasonic data sheet has no spec for capacitance.) 5 V swing to 6 mV means 833x smaller than 1000pF = 1.2 pF. I measured 2.0 pF using my Tenma 72-6795 capacitance meter, which all sort of ties up. I could correct for it if it was a problem, but it isn’t.

The ramp is roughly 2.5 mV/minute so that is a current of 1000E-12 x 2.5E-3 / 60 = 0.04 pA
(which is now in the opposite direction to previously) and is probably not going to stay put for very long!)

The capacitor measured as 1.003 nF which sort of confirms the meter (±0.5%) and the capacitor (±1%).

[sorin]

The charge injection spike is interesting. Obviously I couldn’t see that with 2200x more test capacitance. Presumably it is the relay coil or the LED contact causing it. (The Panasonic data sheet has no spec for capacitance.) 5 V swing to 6 mV means 833x smaller than 1000pF = 1.2 pF. I measured 2.0 pF using my Tenma 72-6795 capacitance meter, which all sort of ties up. I could correct for it if it was a problem, but it isn’t.

The ramp is roughly 2.5 mV/minute so that is a current of 1000E-12 x 2.5E-3 / 60 = 0.04 pA
(which is now in the opposite direction to previously) and is probably not going to stay put for very long!)

The capacitor measured as 1.003 nF which sort of confirms the meter (±0.5%) and the capacitor (±1%).

You understand this wrong, simply you can not use a relay for this type of measurements. It is not just about the relay leakage or charge injection. If you use a relay the mos significant error source in your case should be the voltage injection from the electromagnetic switching currents. I remember that I read a Application Note or a lab note about this topic some years ago. According to them, you are losing your time with this relay, you shold use solid state switch with Low leakage or jFET, something like this MAX329 or similar. In my opinion you can also try using Reed Relay.

[Lesolee]

You understand this wrong, simply you can not use a relay for this type of measurements. It is not just about the relay leakage or charge injection. If you use a relay the mos significant error source in your case should be the voltage injection from the electromagnetic switching currents.

It is interesting that you should make such an assertion. But it is just that.

Engineering needs to be more evidence based.

We have three possible coupling mechanisms:
(1) near field capacitive
(2) near field inductive
(3) far field electromagnetic

To say that you cannot use a relay, ever, for such a circuit is demonstrably not true. Any technique gives some error.

A solid state device with a leakage resistance above 1G ohm above 50 V is unknown to me.

There is certainly a magnetic loop, and a collapsing magnetic field. But a magnetic field only induces a voltage when it changes, so it can’t have a permanent effect on a capacitor (unless it is rectified).

Charge injection from a rising/falling driver edge is well known and established in the industry. Relays have been used for DVMs and oscilloscope switching for at least 40 years.

[Kleinstein]

I see no real problem using a relay. There can be some leakage, but still the leakage tends to be smaller than with JFETs or CMOS switches.
There can be some charge injection to, just from the coil voltage, but also from moving charged internal surfaces.
However this is mainly an effect for the initial jump and not a real problem.

Induction can cause transient effects from induction voltage, but this would be just transient for a few ms or so, and thus not a problem for the slow part.

A reed relay may be a slightly better choice (faster contact ringing) if one is also interested in the very short time scale part. For the slow part the normal relay is OK.

So the bias current seems to be really low in this case, which is a good thing. So  I don't think the drift seen with the 2.2 µF caps is from the input current, but probably still part of the really slow DA. For low leakage currents it is really difficult to separate DA and leakage. With the capacitors part of the slow DA is actually also though to be due to internal leakage current towards internal surfaces.

From my tests I found it useful to also look at the curve with a log time scale. The logical zero is the begin of the discharge phase.

[sorin]

Sorry if I'm not explain myself clearly, but please understand me, I'm very bad at writing English.
Don't forget that the capacitor that you are using is not a ideal capacitor. please see attached photo.


If you want to measure the voltage decay over a long period of time (more than 30sec) I maybe  the relay should be acceptable. You can also try doing the same measurement but replace the relay with a switch.
You can also try BF861C which have a leakage of only 0.1 pA

Sure the Relay are used all te time on multimeter and asciloscope but not in this configuration.

ps. not topic relevant but just for reference. https://www.edn.com/design-femtoampere-circuits-with-low-leakage-part-one/

[Lesolee]

Sorry if I'm not explain myself clearly, but please understand me, I'm very bad at writing English.

Not so bad, actually. Better than my Albanian

Don't forget that the capacitor that you are using is not a ideal capacitor. please see attached photo.

I wonder if that image is an actual representative model, or just a concept. Those models are often shown as concepts without values. I would be interested to see other people’s published model data to compare with my measurements.

Where did that specific one come from?

[Lesolee]

So the bias current seems to be really low in this case, which is a good thing. So  I don't think the drift seen with the 2.2 µF caps is from the input current, but probably still part of the really slow DA. For low leakage currents it is really difficult to separate DA and leakage.

There is of course the worry that the bias current might change with common-mode input signal. But the MCP6043 data sheet shows the (typ) bias current as a constant 1 pA for all common-mode input voltages between the negative and positive rails. Another proof is the linearity of the signal shape with charge voltage. And of course the linearity of the integration slope with the small capacitor.

The bottom line is that the plot is unambiguously all due to the capacitor and not the jig. There is no necessity to de-embed the drift from measured value.

[2N3055]

Not so bad, actually. Better than my Russian 

Not to nitpick but Albania has its own language. Closest country that uses Russian is Ukraine, three countries and some 650km away.. Not important, but just saying.

[sorin]

Not so bad, actually. Better than my Russian 

Not to nitpick but Albania has its own language. Closest country that uses Russian is Ukraine, three countries and some 650km away.. Not important, but just saying.

you are wrong It is 2058km away..
I think that the Geography is not his strong point
We are closer to London or Dublin than Moscow

Where did that specific one come from?

Please see my previews post

[Kleinstein]

The equivalent circuit for a capacitor with DA is a well known concept. The actual values to the resistors capacitors of cause depend on the capacitor. In addition there is no unique representation, especially as the measurement data are usually limited and the information contend is limited. There are many slightly different models that can give essentially equal results.  The main point is that there are DA effect with different time scales, ranging from very fast (e.g. ns) to very slow (e.g. months). Especially for the faster part one  may be able to identify processes behind it,  but in the slow range this is usually difficult.
The number and placement (choice of RC time constants) of the RC elements to represent the DA is not unique - more like use as many as needed to represent the observed curve. It is only for some of the identified (usually faster) processes that one has a defined dominating time constant and not just a sequence of conveniently spaced time constants (e.g. one per decade).

[2N3055]

Not so bad, actually. Better than my Russian 

Not to nitpick but Albania has its own language. Closest country that uses Russian is Ukraine, three countries and some 650km away.. Not important, but just saying.

you are wrong It is 2058km away..
I think that the Geography is not his strong point
We are closer to London or Dublin than Moscow

Where did that specific one come from?

Please see my previews post

An you cannot read :

Closest country that uses Russian is Ukraine, three countries and some 650km away

[Lesolee]

So we have a new lineup, with the X7R and PET discarded.



The board has been mounted so it doesn't rest directly on the mat, and it is altogether more mechanically stable.





Here are the details of the capacitors:



And last, but not least, are the results.



PPS was the best, but not any more.
 

[Kleinstein]

So the PP and PPS caps look comparable. Still there is quite some DA visible at the long end.
This could really be a problem for filter settling for a slow filter.
The charge recovery curve can also depend on the soaking time before the test. It may take many minutes for the DA come near saturation. So I would expect a difference between some 5 and 15 minutes soaking before the test.

The not so perfect capacitors may be a reason so limit the analog filtering to the shorter time scale, and if really needed do very low frequency filtering better in the digital domain.

[Lesolee]

The not so perfect capacitors may be a reason so limit the analog filtering to the shorter time scale, and if really needed do very low frequency filtering better in the digital domain.

It’s something we have always known. If you digitise the output of a sample and hold, you need to do so after a definite time, and not some arbitrary time when the digital stuff can be bothered to get around to it. All cycle times on such things need to be consistent in order to reduce “noise” (variability) in the readings. It‘s probably why there is so little info on the subject. Nobody does it that way anymore because it is too hard, and not worth it. It is only on “pure analog” stuff where such things are needed.

I remember back when doing harmonic distortion testing on scopes for production. We ended up using a Krohn-Hite purely analog signal generator, since all the modern generators were too noisy and had too much distortion. (And then we put a custom tuned-notch filter in series to make it even more pure!)

[Lesolee]

These tests have shown up some difficulties with the acquisition hardware/software. Initially the 1 Hz filter was being used within the software. This was a bad idea because (for some unknown reason) the software does not deliver oversampled filtering. The data was noticeably quantised at presumably the native 8 bit resolution. Thus all the plots had to be repeated in 12 bit oversampled mode.

The plots are exported as CSV files and in order to export the data to Excel easily, the number of useful points need to be limited to 32,000 per trace. This limits the sample rate of the scope. But the scope is not decimating the output data, retaining the bandwidth. It seems to be decimating earlier in the process, thereby reducing the bandwidth in an undocumented manner. It meant that data below 1 second had a very weird and improbable shape. But all the plots look the same below 1 second, so a high speed acquisition was done for this initial curve. The scope was set to 200 ms/div for this fast section, so the sample rate was then adequate.

In retrospect, the scope could have been set to sample 10x faster at 20s/div, generating 300,000 points to a CSV file, and then the file could have been decimated down to the required 32,000 points or less. But that would have meant re-doing all the tests again, and writing some code to do the decimation, all of which are pretty boring.





The bendy bit near zero is actually an artefact of the scaling.

From my tests I found it useful to also look at the curve with a log time scale. The logical zero is the begin of the discharge phase.

Applying the Kleinstein zero offset ...

[Kleinstein]

The recovery curve looks about as expected: some effect from changing the charge time, even in the range well longer than the measured part. So there are some really slow processes (time constants > 10 min) there. For the shorter times like after 1 or 10 seconds the recovery is still dominated by the faster processes, as there is relatively little difference between different charging times. So there is also quite some DA happening on the seconds time scale too.

There is still some effect going on for the long time, but for the filter circuit that started to interest in DA this should not matter that much. In the filter circuit one has a resistor in parallel and the little charge slowly coming back is not doing so much harm. The PPS and PP caps should be good enough.

[Lesolee]

It occurred to me that with this setup I could easily measure the leakage across the Panasonic open relay contacts (and veroboard) which will inform the next project.

I had to shield the input cable to reduce the stray capacitance, and I put a simple copper-tape-covered-cardboard screen over the top of the jig so that I didn’t have to hide under the bench, and stay still, as I have on earlier tests using a 1 nF integrator capacitor.

I upped the sample rate on the scope, giving 300,000 data points, then decimated it down to 6000 points using an MFC Visual C++ program.

The capacitance meter was tested against my 1.000nF ±1% reference polystyrene capacitor. The reading was 1.001 nF. Hence the 1 nF integrator capacitor, measured at 0.928 nF, is reasonably expected to be within ±1% of the measured value.



The droop on the integrator alone was 45 µV/s with say ±2% for the buffer, and another ±2% for the scope.

The nominal bias current is then  928E-12 x 45E-6 = 42E-15. Let’s call it 42 fA ±10%.

For +20 V leakage we have 340 µV/s + 45 µV/s = 385 µV/s
For -20 V leakage we have -418 µV/s + 45 µV/s = 373 µV/s

The average is 379 µV/s, which equates to a current of  928E-12 x 379E-6 = 352 fA

The leakage resistance across the board and relay body is then 20 / 352E-15 = 57E12 = 57 T ohms ±10%

[EDIT: Addition]
If you think about it some more, you  will realise that this ‘live leakage current’ is also critical to the evaluation of the jig. Since the 50 V is usually left connected to the open relay contact, this leakage current is 21x greater than the opamp leakage. Clearly we could use a second relay contact, and an intermediate pull-down resistor, or simply turn the power supply down during most of the test, but it does mean we have possible leakage paths around 30 T ohms effectively across the capacitor under test. In this case that is a tolerable amount of leakage, but we needed to have tested it to prove the point.

[Lesolee]

I have found the military dielectric absorption test online. MIL-PRF-19978L (2016). It seems to go back to MIL-C-19978F (1994), although I can’t find a copy of that online. What I really want to find is MIL-C-19978D of unknown date. I would like to know what the date was, and what revisions, if any, occurred. If these standards are online, they don’t seem to be indexed. 

[Lesolee]

To finish off all this Dielectric Absorption testing, I have done another couple of weeks of testing, ... and summarised it all in a report.

I also uploaded the complete file to my website: http://lesliegreen.byethost3.com/articles/Dielectric.pdf

I also plotted out the step response of the MicroVoltmeter (Mk 1.30)



[EDIT: added a link to the complete file on my website]
[EDIT: re-printed to PDF using Cute PDF Writer so it is small enough to fit in one piece]

[branadic]

Attached is a combined and compressed version for you.
And not to forget, thanks for your effort Lesolee.

-branadic-

[Lesolee]

Attached is a combined and compressed version for you.

Original is now fixed so it fits in one piece.

Thank you for your interest in it.

[EDIT: changed to reflect the fact that the original file has been re-printed smaller, so it fits in one piece without noticeable degradation of image quality.]

[Kleinstein]

Nice summary of the results so far.

There are a few point's I like to comment on:
For the test with a load resistance, the extra discharge current mainly complicates things and limits the time scale that can be measured. It is not actually speeding up the test, but like restricting the time constants covered. It is easier to use a very high impedance buffer and no extra load. With modern CMOS OPs there is no real need to accept an extra load that complicates the interpretation.
For testing the residual load effect (e.g. R_in of the buffer, relays) I would suggest doing a test with 2 equal caps and with both caps in parallel, preferable with relatively small low loss ones (e.g. 1-10 nF PS). This would show the effect of leakage and input impedance.

I find it odd to plot the voltage for the charge recovery also on a log scale. The interesting part the reappearing voltage relative to the initial charging, not the relative development, as the initial charge is kind of not so well defined if the discharge phase is relatively short. For the discharge phase, there is actually no really need to use different lengths of the discharge part: for the DA in the capacitor there is essentially no different if the discharge is from some 20 V to true zero or to some 1 mV. If there is a small residual voltage this could be subtraced from the charging voltage (usually negligible unless one has really high DA). For the recovery curve one would also subtract the voltage from the starting point. The time when one reads the zero for the recovered voltage essentially sets the lenght of the discharge phase - so one can get the data for different assumed discharge times from a single run.

For the time scale the logical starting point is the start of the discharge, not the end. If discharge is relatively slow (e.g. large resistor) one may have to take something like the point where the voltage goes to something like 50%, 1/e or 10% - still a bit to decide discuss there, but in most cases this does not really matter. The shape of the curve is empirical not really following a theoretical law. In most case I have found an approximate straight line in the semi log curve (voltage linear, time logarithmic starting with the start of discharge).

[Lesolee]

There are a few point's I like to comment on:
For the test with a load resistance, the extra discharge current mainly complicates things and limits the time scale that can be measured. It is not actually speeding up the test, but like restricting the time constants covered.

Teverovsky's 2013 NEPP report, eg Fig 3.1 (page 10) shows the absorption currents following nice straight lines on log/log scales. Sadly he misses out (what for me is the interesting part), the exponential to power law corner. But he is measuring nasty X7R capacitors, not nice PPS/PP types.

I can do a 1M recovery test in 10 seconds rather than a 10G recovery test in 1000 seconds.
In my universe 1000 >> 10

The long time result is predicted by the short time test for good capacitors (again, not necessarily nasty X7R -uggh )

For testing the residual load effect (e.g. R_in of the buffer, relays) I would suggest doing a test with 2 equal caps and with both caps in parallel, preferable with relatively small low loss ones (e.g. 1-10 nF PS). This would show the effect of leakage and input impedance.

I'm not sure what you are saying here. Did you get to page 34 "Test Jig Validation" yet? Is your test suggested as an improvement on that section?

[Kleinstein]

The test with 2 capacitors is a little like the part done in the test jig validation. It may be a little simpler, but the tests describes are Ok too.

One can do the test for the higher impedance for any time one wants, just stop when you are no longer interested in later times. If one needs a curve for the case with a load one can just calculation the curve one would get with any load resistance - it is just relatively simple math:
The loaded voltage would be the integral over exp(-t/RC) time the derivative of the unloaded curve.
So not problem having a high Z buffer and than calculate the curves expected for 1M or 15 K. The indirect way would no add significant noise. Only with really poor caps (e.g. electrolytic) or the nonlinear X7R and similar there can be a small difference.
Just from the short measurements with an extra load one gets less information for the longer times and non for those longer than the actual measurement. So an extrapolation to how the curve would look like for less loading is more guesswork based on other measurements, but not based on the actual test. With a little more math one could be able to get the curves for more loading. Trying to estimate the curve with less loading from a measurement with more load would amplify the noise (especially past the peak) and ends where the measurement stopped.

The log-log scale graph depends on how long the discharge phase was or what point is defined as zero voltage. So the initial part is not well defined. It may be later help to compare largely different caps, but the curves will all flatten out due to the log voltage scale - so very hard to see any difference. The semi-log scale can cover a large time range - though this may need to separate tests. The tests here are from some 100 ms to a few 1000 seconds, but with faster switches (e.g. FETs) one could extend the curve down to below ms - limited by the discharge time constant. It may need smaller caps at the very fast end.
For just one polarity, one could even build a combined test jig to measure DA from some 50 µs to some 1000 seconds. It would still need 2 runs, but the fast part (e.g. 50 µs to 1 s) only takes little time.

Another point is that the DA can be temperature dependent. Some of the effects get faster quite a bit with higher temperature. However I have not found much information about this and if at all more about the faster part.

[Dave Wise]

MIL-C-19978D* through F specifies the Dielectric Absorption test as 5 minutes charge, 5 seconds discharge, 1 minute measure.  MIL-PRF-19978G through M are 1 hour charge, 10 seconds discharge, 15 minute measure.  Each version of the test ignores some time constants, they're both just trying to be an overall figure of merit.  You have to test for the time scale you care about.

MIL-PRF-83421 specifies 5m/5s/1m from at least revision B to current revision F from 2017.

FWIW,
Dave Wise

* I don't have the original MIL-C-19978 spec, or revisions A, B, C, or D.  A couple of webpages mention D's time scale.