The basic configuration for the multiplying DACs is with some 10 or 7 V reference and than 0 to -10 or 0 to -7 V out. So an output gain of 0 to -1.
The supply to the chip is for the switches and the ref. voltage can be higher and even negative. It is a bit tricky to directly add gain, as Rfb is matched to the resistors in the R2R DAC part. So gain would be relatively separate from the DAC. The bipolar version is a bit tricky with extra precision resistors needed.
One may not even need a negative sign. For the negative half one could just change the wiring from the meter to the tester. This would mean running the test as 2 parts.
An extra inverter for an alternative signal with the other side also makes some sense (see below).
A main case for the sum test is having 1 voltage and half the voltage. It would be relatively few divider ratios that really make much sense. So I see little sense in a 2nd DAC for this.
A 2nd DAC may be usefull for other tests, maybe getting close to the chain of voltages as in the original idea: One DAC sets the even voltages and the other the odd ones. For the overall test one would also have ground as a 3rd path for the switches to the DUT terminals.
With buffered signals, leakage would be not critical als relatively simple CMOS switches (e.g. DG411) would likely be good enough for switching.
The general setup could be 2 MUX chips like DG408/9 and a bunch of test signals to choose for both sides. The question may be if one wants protection (one side can be enough) towards the DUT(meter) or take the risk of possibly damaging the switches(e.g. from ESD or a short).
If the 10 V range is enough one could use just the DAC output and a divider. It could make sense to have a buffer for the resistive divider to avoid a loading effect. I would consider a small offset the lesser problem than the output impedance of the divider.
For a larger (e.g. 20 V) range one could consider driving both sides and use an extra inverter after the DAC to kind of replace a 1:1 divider by some effective gain of 2 for the signal between the positive and negative output and ground as the center point. Compared to normal gain this would not need a higher supply and may be more convenient with CMOS switches to have the same GND as the DAC.
This way one would also have the other sign available for other tests.
So possible test signals to the mux chips could be:
1) the DAC output (e.g. 0 ... -10 V)
2) inverted DAC out 0 ... 10 V
3) GND
4) 1:1 divider from DAC + buffer (e.g. 0... -5 V)
5) optional: 1:1 divider from - DAC + buffer (e.g. 0... 5 V)
6) possibly a 2nd DAC
7) possibly the raw 7 V or 10 V ref.
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