Statistical arrays

[doktor pyta]

Dear colleagues,

First of all we heared about interesting properties of TaN resistors statistical arrays.
There are some CERN- related papers describing developments made by great Mr John Pickering.
He seems to like using this technique as it does the job at reasonable price and in relatively simple, elegant way.
Inspired by him I made simple setup to see what can be achieved using off the shelf component.
I used 8x10k NOMCA in SOIC 16 package and wired the circuit as shown on the drawing below.
It is thermally balanced divider by 10.

The setup takes advantage of HP 34401A in ratio mode, Data Precision 8200 as (4-wire) voltage source, thermocouple thermometer.


P.S.  please post examples of statistical arrays applications (schematics) that You know about

[Echo88]

Wavetek 7000-series voltage reference used statistical dividers model Vishay-TDP: https://www.eevblog.com/forum/metrology/teardown-voltage-standards/msg902910/#msg902910
https://www.vishay.com/docs/60045/tdp.pdf
http://www.vishay.com/docs/60117/nomca.pdf

[branadic]

I was always concerned about the tracking t.c. of 5ppm/K for Vishay TDP16031002 or NOMCA16031002. I wonder if TaN statistical arrays are any better. But even if they were, they seem to be unobtanium. I once searched for more information, but wasn't able to find the real hints. So any link to related papers are welcome.

https://www.ebay.de/itm/1pcs-TDP16031002BUF-Vishay-Resistor-Networks-Arrays-10Kohms-16/263962507025
https://www.ebay.de/itm/1pcs-NOMCA16031002ATS-Vishay-Resistor-Networks-Arrays-16-pin-10/263957703582

-branadic-

[doktor pyta]

Now watch this:

1. division ratio error: +12ppm (no adjustment!)

2. T amb=25'C, T heat=50'C
average T.C. of division ratio: 0.32ppm/'C

3. Thermal shock 25'C; -20'C; 25'C
division ratio change: 0ppm

4. Thermal shock 25'C; 100'C; 25'C
division ratio change: 0ppm

Keep in mind 1ppm is a resolution of my simple but very stable setup (further measurements need to be done).


To be precise I used P/N NOMCA16031002ATS bought from Farnell.

[d-smes]

When you did thermal shock, did you go from 25C to -20C, back to 25C, and then make the measurement?  Or did you go from 25C to -20C and then make the measurement?  I just wondering why the TC didn't show up in the ratio measurement...

[doktor pyta]

2. and 3.
3. and 4. describe situation after thermal shock. So measurements were performed @25'C.

[branadic]

So this means it's not a temperature coefficient [ppm/K] but hysteresis value [ppm] you measured for any case @ 25°C, doesn't it?

-branadic-

[Kleinstein]

Using more resistors is a known way to improve TC matching and similar in a kind of statistical way. Knowing how the resistors are located on the substrate could go beyond just the statistical improvement. The more normal case is to have a gradient in TC over the chip.

[doktor pyta]

So this means it's not a temperature coefficient [ppm/K] but hysteresis value [ppm] you measured for any case @ 25°C, doesn't it?

-branadic-

3. and 4. is hysteresis in ppm

[doktor pyta]

Using more resistors is a known way to improve TC matching and similar in a kind of statistical way. Knowing how the resistors are located on the substrate could go beyond just the statistical improvement. The more normal case is to have a gradient in TC over the chip.

True, but here in metrology section only few (2...3?) of us ever tried using this technique.
Besides I haven't found their results.
I needed numbers to have reference point for my further designs.

Kleinstein, could You please point a literature, papers which explains theory behind statistical arrays ?

[e61_phil]

Just for my naive understanding:

I wonder how much improvement you're getting from that "mixed" wiring and if that very good behaviour here is only luck?

Such arrays are normally specified with a tracking and an absolute TC. The absolute is worse than the tracking, because the tracking is more or less only the difference in TCs of the resistors. I think with such a layout used here one can improve the thermal homogeneity but I wouldn't expect an order of magnitude improvement only by that.

Which point I'm missing here?


A second point is the increase of the amount of resistors. Averaging out the TC over many resitsors only works if the mean of many resistors is really zero (or nearby). I have no experience with such tan arrays, but I measured a lot of thick film HV resistors (Caddock USF) and resistors with negative TC are very rare.

[pigrew]

A second point is the increase of the amount of resistors. Averaging out the TC over many resistors only works if the mean of many resistors is really zero (or nearby). I have no experience with such tan arrays, but I measured a lot of thick film HV resistors (Caddock USF) and resistors with negative TC are very rare.

My naïve understanding:

These are used as voltage dividers. It doesn't matter if the mean TC is zero (or not). It matters that the effective TC of each group is matched. If one group has a +14.5ppm/C and the other is +14.6ppm/C, then the ratio will be very close to constant with temperature, even though the value of the resistors changes significantly with temperature

These resistors are specified as having a tracking coefficient of 5 ppm/C. This means that the ratio of any two resistors will change no more than 5 ppm/C.

With enough resistors, the sample mean TC approaches the population mean TC (assuming random sampling), so the TC of the two samples of resistors should approach equality. In this case, we think that neighboring resistors will have better matched TC and more identical temperatures, so we try to distribute likely-matched resistors into separate groups, so the groups will match each other with fewer resistors required than if we assumed a random sampling of resistor TCs.

[e61_phil]

Ahh 

Yes, of course you only need to average out the tracking, because your whole divider is in that chip (not like mine, where only the HV part consists of the Caddock resistors)

Thanks!

[Magnificent Bastard]

Since (on the NOMCA), the resistors are on a ceramic substrate, and the package material is epoxy, one would have to assume that the two materials will behave differently with changes in temperature and humidity (with humidity being the more evil of the two effects).  This would most likely result in a curvature lengthwise-- suggesting that the resistors more near the center of the package will track better than the resistors near the ends of the package.  For better statistical tracking, we can also combine multiple units.  for example, we start with some NOMCA 10K 16-pin (8-resistor) networks.  Now place them side by side on a PCB.  We wire R1 in series on all three packages (resulting in a 30K resistor R1')-- and then do the same with the other 7 resistors in each package.  Now we have 8 resistors (R1' through R8') that have a value of 30K-- with "statistically better" absolute value and TCR tracking.  Let's now make the same 10:1 divider.  We need (3) 30K resistors in series, and (3) 30K resistors in parallel, making 90K and 10K.  It is assumed that resistors next to each other in the network will TCR/humidity track each other better than resistors farther apart from each other-- so, the best arrangement is to "interdigitate" the resistor sets (the 90K and the 10K).  With this in mind, we ignore R1' and R8'.  R2', R4', and R6' are wired in series making 90K, while R3', R5', and R7' are wired in parallel, making the 10K.  Now, wiring the 90K in series with the 10K, we end up with a 10:1 ratio that will track very well-- (at least theoretically, anyway).  My "gut feel" for this arrangement is that it will track within +/-0.1ppm over temperature and humidity.  Not bad actually-- and you can do this over production without selecting parts!

[JimmyJo]

Dear Doktor Pyta,
I see that you have interleaved the divider resistors of different power dissipation.  Would a current step be useful to determine the power coefficient of ratio?

p.s. Has anyone actually seen the internal construction of of these resistor networks? are they really just 8 resistors side by side on the substrate? 

[Magnificent Bastard]

Dear Doktor Pyta,
I see that you have interleaved the divider resistors of different power dissipation.  Would a current step be useful to determine the power coefficient of ratio?

p.s. Has anyone actually seen the internal construction of of these resistor networks? are they really just 8 resistors side by side on the substrate?

Actually, in his original post, they were NOT described as being "interleaved" (or "interdigitated"), which they should have been.
Edit:  I was looking at the schematic and not the layout.  The layout is done correctly-- (using the inner-most resistors only, and interdigitating the series and parallel connected resistors-- this provides the best chance of tracking).

Yes, the resistors are made on a ceramic substrate one after another.  There is literature on the Vishay website that describes how they are made.  There are also thin-film networks that use a silicon substrate, and these are less desirable for this application (because they flex more).

[doktor pyta]

Would a current step be useful to determine the power coefficient of ratio?

Other test would be more suitable.
I've just applied 7.07V instead of 10.00V (half of power is dissipated at 7.07V)
34401A in ratio mode changed reading from:
100.0012m @ 10V to
jumping between 100.0011m and 100.0012m @7.07V

so the change is below 1ppm and it is not necessary 100% related  to DUT.

[Kleinstein]

I have no reference for a chance to get more than just the statistical advantage. The point is more from simple reasoning:
The TC of the individual resistors will likely not be purely random but likely will also have some position dependent part, like changing in one direction from one side to the other. In this case the use of interleaved resistors is more efficient in compensating these differences than just averaging over random values.

Also for self heating the interleaving helps to get faster and better temperature matching between the resistors, even with self heating.

I really like the idea of using the array.

[doktor pyta]

Finaly I found a good paper related to our subject.
'20A trapezoidal reference current pulse generator for the evaluation of current transducers'  DOI: 10.1109/I2MTC.2013.6555434


My next step will be testing an array to replace temperature setting divider in LTZ1000 circuit.
From my measurements I expect that one 8-resistor array may do the job.
I have an idea shown on the schematic below.
Divider by 13 could replace 1k/12k divider which might be used only with LTZ1000CH.
Divider by 16 could replace 1k/15k divider which might be used with LTZ1000ACH, unfortunately it will be hot inside. In this case thermal layout seems to be slightly worse.
Off course more possibilities can be obtained using two arrays, but I didn't came up with any universal solution like thermally balanced divider by 14.

If someone has better ideas please share.

[Magnificent Bastard]

Finaly I found a good paper related to our subject.
'20A trapezoidal reference current pulse generator for the evaluation of current transducers'  DOI: 10.1109/I2MTC.2013.6555434


My next step will be testing an array to replace temperature setting divider in LTZ1000 circuit.
From my measurements I expect that one 8-resistor array may do the job.
I have an idea shown on the schematic below.
Divider by 13 could replace 1k/12k divider which might be used only with LTZ1000CH.
Divider by 16 could replace 1k/15k divider which might be used with LTZ1000ACH, unfortunately it will be hot inside. In this case thermal layout seems to be slightly worse.
Off course more possibilities can be obtained using two arrays, but I didn't came up with any universal solution like thermally balanced divider by 14.

If someone has better ideas please share.

This looks good-- no need for the 8th resistor-- you could use a 14-pin device.  3K would be ideal, but not available (ever!) as Vishay NOMCA-- so you can use 2K or 5K.  If you want to special order, you can buy some series SOIC-C at 3K from IRC/TT-Electronics (through Mouser)-- you will have to ask Mouser for a quote, and there will be a minimum buy quantity-- (~100?)  A 14-pin 2K or 5K NOMCA will work just fine, and you might find some in stock (somewhere).

Edit:
Another possiblity is to use 14-pin 1K NOMCA networks (3 of them).  As before, wire all R1's in series to make R1' (a 3K resistor).  Now do the same for R2-R7 making R2' through R7'.  Now wire these 3K resistors (R1' though R7'), as before:  R1', R3', R5', and R7' in series to make 12K; and R2', R4', and R6' in parallel to make 1K.  You now have a 12K:1K divider that will TCR and humidity track within 0.1ppm/K-- and this will be true over production without special parts selection.  Pretty cool!

Aren't Hamon dividers fun and useful?

[doktor pyta]

Has anyone actually seen the internal construction of of these resistor networks? are they really just 8 resistors side by side on the substrate?

zlymex once posted a picture of TDP series array.
https://www.eevblog.com/forum/metrology/any-resistor-series-that-are-stable-wrt-timetemp-but-not-precision-values/msg1056895/#msg1056895

[branadic]

I wonder how they perform in a 4k : 10k or at least 10k : 25k configuration for the 7V --> 10V boost circuit. Any real world numbers on that?

EDIT: The only used experience seems to be with LM399

-branadic-

[doktor pyta]

This will be next step. Will be tested for sure.

[branadic]

Have ordered a few NOMCA16035001 for experiements as NOMCA14035001 are equal to NOMCA14032001 and NOMCA16032001 simply unobtanium. So the 8th resistor can be used in parallel to some low ohmic resistor for fine adjusting the 10V output voltage.

-branadic-

[razvan784]

Played with this (in LTSpice) some time ago as a replacement for 13k-1k.
Tried a layout that is as symmetrical as possible.
Didn't manage to built it yet.