Ultra Precision Reference LTZ1000

[niner_007]

I'm wondering if there is any concern in routing sensitive signal path in the inner layers, or whether it should always be routed on the top or bottom. Maybe surface contamination on the inner layers can't be as well controlled as on the top layer or bottom layers, which can receive a good cleaning at any time, hmm? Or am I overthinking.

[Andreas]

perhaps orientation is not visible well

ok my fault.
I expected the nose on the top side of the PCB.

with best regards

Andreas

[Kleinstein]

I'm wondering if there is any concern in routing sensitive signal path in the inner layers, or whether it should always be routed on the top or bottom. Maybe surface contamination on the inner layers can't be as well controlled as on the top layer or bottom layers, which can receive a good cleaning at any time, hmm? Or am I overthinking.

The traces are to a large part protected by the solder-mask. So surface leakage is mainly at the solder joints, and these have to on the outer layer anyway. The circuit is not that high in  impedance for most parts - so leakage is not very critical, it is not about pA currents.
The layout looks nearly like 1 layer, so there is essentially no need or advantage to go with 4 or more layers. 2 layers should be good enough. More layers add to possible mechanical stress in the board.

The traces are relatively wide and this way give quite some heat conduction paths around the LTZ1000.
The ground star point is a tricky part. Electrical is may be still OK with the relatively thick path to LTZ1000. Thermally this is not a good solution.  The alternative solution is to have the critical low side sense directly from the pin of the LTZ1000 and keep the rest separate with thinner traces.  It depends on the circuit around the reference (and off the board) how the ground connection should be.

[Noopy]

Any LTZ1000-fans here? 

By popular request I have "designed" a LTZ1000 coffee cup:

https://www.redbubble.com/de/i/tasse/Referenzspannungsquelle-LTZ1000-von-Richis-Lab/63614214.9Q0AD

 

The LTZ1000 clock looks quite interesting... 

[niner_007]

I'm wondering if there is any concern in routing sensitive signal path in the inner layers, or whether it should always be routed on the top or bottom. Maybe surface contamination on the inner layers can't be as well controlled as on the top layer or bottom layers, which can receive a good cleaning at any time, hmm? Or am I overthinking.

2 layers should be good enough. More layers add to possible mechanical stress in the board.

What’s the mechanism by which that would happen? That seems surprising to me. I went for more layers just for layout neatness. This is not meant to be efficient economically, I am using VHD200 after all, which is overkill for an LTZ1000 design with its high ppm attenuation factor.

[niner_007]

Mr. Kleinstein, made few updates, how's this? Replaced SMD diodes with thru hole diodes. Added ground plane for VCC and AGND. And made traces smaller. I think I could also add equalized "ballast" thermal pads for each trace around the LTZ1000 as well ala Datron. As is, does it lift your concern about thermals?

With the space I have, I don't know if better can be done 

[d-smes]

Six layer board?!

[niner_007]

Yes, 6. As said, unless it has a negative effect, I have no problem with it. There is some digital circuitry planned that will need the extra layers.

Btw, my thermal design is not good, stay tuned for some updates.

[niner_007]

For the non critical resistors, I use Vishay MBA0204, which is very similar to the one you listed. I think relief or cutouts around the mounting screws might make sense, but I think the way it's done in your picture might make the board prone to vibration.

I believe a plastic mounting cap can be made, such that the pressure will be put on the plastic no matter the pressure, not on the PCB, while still being tight. When I get to the CAD tool, I'll post pics when I have them. A much simpler solution might be a tiny piece of rubber top and bottom to the cap.

[floobydust]

I had thought of putting a copper pour as a big dot inside the LTZ pin's circle.
Somewhere I had modelled it in FEMM and it seemed to help keep all the pins isothermal. This pic is as far as I got debunking voodoo slots for myself, with FR-4 and 1oz cu. and air. The copper traces do not seem to conduct as much heat away but my simulation could be wrong. FEMM is not easy to use.

[niner_007]

Are the L shapes copper pour?

[CDN_Torsten]

floobydust - I like your idea of a copper pour in the pin-circle.  This should offer some thermal equalization benefit...especially if done on all layers and then via stitched to thermally tie all layers together.  Getting the pour to 'hug' round each of the pads would help as well...

For your simulation - intuitively is doesn't feel completely right.  I would have expected the copper traces (and FR4) to conduct much more heat, and I would have expected the slots would be a much more distinct thermal barrier.

I fully agree with you that these simulations are very complex to set-up correctly.  I have worked with OpenFOAM and have felt the pain...

For your simulation, it feels like too coarse of a mesh was used in the simulation...this may be blurring the detailed thermal behaviour you are looking for.

[3roomlab]

For the non critical resistors, I use Vishay MBA0204, which is very similar to the one you listed. I think relief or cutouts around the mounting screws might make sense, but I think the way it's done in your picture might make the board prone to vibration.

I believe a plastic mounting cap can be made, such that the pressure will be put on the plastic no matter the pressure, not on the PCB, while still being tight. When I get to the CAD tool, I'll post pics when I have them. A much simpler solution might be a tiny piece of rubber top and bottom to the cap.

you are right, i tried some leaf spring equations and there might be issues

i made another doodle for fun.  some bottom copper pours are missing for viewing clarity. out of curiosity, i wanted to know the thermal resistance of the thermal ring. D = 11mm, 2oz Rt = (0.5pi.D/(380*0.002* 70e-6))/2 = 162C/W (too high?). by using a 1.5mm dia solid copper wire as a ring = (0.5pi.D/(380*cu area))/2 = 13 C/W . 6 layers? 162/6 = 27C/W ? this is like an unknown performance variable.

[Dr. Frank]

Hey folks, I finished the layout of my LTZ1000 reference module. It is built around an 3458A reference form factor. 6 layers, uses mostly through hole parts, the divider is VHD200, the other sensitive resistors are VHP202Z, I also use MKP capacitors, and plan on using the free space for a few LMT70 temperature sensors, a USB interface and microcontroller for tracing and calibration.

I appreciate any feedback on the layout, specially around grounding.

OK, I can't resist any more to make some comments.

At first, this 6 layer board is a complete over-engineering, and mostly counter-productive.

These additional layers do more harm in terms of thermal-electric voltages, than simply using a single sided board only.
Latter would reduce the number of solder- and via- joints to the absolute minimum, would let you control them much better as you would have a single iso-thermal plane only, not randomly distributed over 6 planes.

Alternatively, you could place all analogue signal joints on one layer, and the supply voltages on a 2nd layer.
Please revise your star point concept for the two reference points, especially concerning the current flow from and into the different resistors around the LTZ1000.
I can not recognize at all, if these paths are all correctly Kelvin- sensing designed. Also, you should try to get a symmetrical layout for the reference pins.

These GND and Vcc shielding planes are useless, because it's a DC-application, but not an RF board.
In contrary, possible EMI disturbances will come from outside the board only, therefore an EMI shield (tuner box) all around the PCB would be more useful.

This could also serve as a shield against air draughts inside the 3458A. As often discussed before, the constant air flow inside the 3458A contradicts the data sheet recommendation to keep all solder joints away from this.

Maybe you also want to reduce the oven temperature to reasonable values, i.e. 12.5k/1k for 60..65°C.

The only proven measure to equalize the temperature gradients of the LTZ1000 is to apply a broad copper ring AROUND the chip.... the electrical connections to the LTZ have to be made on the opposite layer, of course.  This way it's done inside the Datron/Wavetek M7000 reference, which is the best LTZ1000 based 10V reference.

Frank

[notfaded1]

Like this one Dr. Frank? 
Seems nice since they have LTZ1000 in them versus what's in our Flukes.

[Dr. Frank]

No, it's the Datron 7001 module, ZLYMEX showed the interior, it has even two concentric copper rings around the LTZ, and all electrical connections on the bottom side:

https://www.eevblog.com/forum/metrology/teardown-voltage-standards/msg902910/#msg902910

https://www.eevblog.com/forum/metrology/teardown-voltage-standards/?action=dlattach;attach=211775;image

The earlier 4910 / 4911  share these LTZ1000 modules from the Datron 1281 / 1271 DMMs, also on display on that page, and these have these accidental slots around the LTZ, which later many have copied blindly.


Frank

[floobydust]

[...] The only proven measure to equalize the temperature gradients of the LTZ1000 is to apply a broad copper ring AROUND the chip.... the electrical connections to the LTZ have to be made on the opposite layer, of course.  [...]
Frank

Yes, the ring outside the pin circle and what about a dot inside? Thermally-coupling the warm and cool pads.
I understand a goal is to keep the LTZ1000 PCB pads all at the same temperature. For a two-layer board, I think this is not so practical due to the doubled-up traces for the Kelvin connections, leaving that pad cooler than the rest, along with any non-symmetry with other PCB traces fanning out from the LTZ also giving unequal heat transfer.

I see widely varying designs for a thermal ring, some close to the LTZ, others many cm away.

Having a copper-pour ring around the outside of the LTZ, once it's cut into segments I don't think it's as useful.
Because FR-4 thermal conductivity is poor, you don't get much heat transfer over the gap. I find that a PCB copper-pour with a cut or slice is no longer good at transferring electrons or heat, despite the mind being fooled and thinking it's all continuous.

[niner_007]

OK, I can't resist any more to make some comments.

Frank

Thank you for the feedback Frank. Don't hesitate to share it, and I appreciate your feedback very much.

[Kleinstein]

Not all pins at the LTZ1000 are equally important. The critical ones are the 2 with the kelvin connection to sense the output voltage. These two should have a similar temperature, if possible. Here it is not even every temperature difference that is really bad, just the change in the difference. The more constant part just add a few µV to the reference voltage.

I would be a bit careful with a 4 or 6 layer board, as this are layers glued together and this may cause internal stress between the layers. Normally 2 layers should be plenty for the LTZ1000 reference layout.

The rings around the reference can make sense. 2 separate thinner rings can make some sense and could be more effective in suppressing gradients. I still think this is more like a point that is done, because it can be done and is cheap - not really needed.

With connectors for the output I would more worry about heat flow around the connectors - these can also cause thermal EMF and there naturally is heat flow to the other side. It may make sense to have relatively thin traces at the connector for the critical signals.

[niner_007]

I would be a bit careful with a 4 or 6 layer board, as this are layers glued together and this may cause internal stress between the layers. Normally 2 layers should be plenty for the LTZ1000 reference layout.

TiNs KX and FX designs are 4 layers, isn't stress a concern there too?

[floobydust]

Not all pins at the LTZ1000 are equally important. The critical ones are the 2 with the kelvin connection to sense the output voltage. These two should have a similar temperature, if possible. Here it is not even every temperature difference that is really bad, just the change in the difference. The more constant part just add a few µV to the reference voltage.

I would be a bit careful with a 4 or 6 layer board, as this are layers glued together and this may cause internal stress between the layers. Normally 2 layers should be plenty for the LTZ1000 reference layout.

The rings around the reference can make sense. 2 separate thinner rings can make some sense and could be more effective in suppressing gradients. I still think this is more like a point that is done, because it can be done and is cheap - not really needed.

With connectors for the output I would more worry about heat flow around the connectors - these can also cause thermal EMF and there naturally is heat flow to the other side. It may make sense to have relatively thin traces at the connector for the critical signals.

Sorry, I had questioned all this before in page 75 from 10/2017 and liked my idea to thermally couple the pads somewhat, like in pic (having troubles posting images tonight).
Agilent 34470a ref has oddball extra pads at pins 3,7. You wouldn't put anything, like a capacitor there, it only makes to sense to me if they are for thermal EQ, or their PCB layout guy is not so great. 34470a has forced-air cooling so a steady draft across the ref PCB backside as well, then less of an issue for (pads) temperature difference compared to using a closed box for an enclosure. The 3458a has the cap/cover on BOTH sides of the pcb.

I'm not sold on the outside ring, it only can work if there are no cuts/slices and very hard to analyze with a thermal imaging cam and the emissivity of copper in the way. Although, there are a great many different rings designs out there.

[Echo88]

The W7000 uses a > 2 layer design, so apparently it works just fine.
I cant remember if we had thermal pictures of ltzs with copper thermal rings around them to see how well it works and know only about the KX reference which is 4 layer and has large copper areas beneath its thin prepregs.
Considering that Copper/FR4 thermal conductivity difference is a factor of ~1100 i imagine the heat doesnt really care if theres a thermal conductor (copper ring) on the other side of a 1.5mm thick thermal insulator and happily continues to go where it wants along the traces.

Vishay recently released their THJP-product, a highly conductive thermal jumper, which may be suitable to thermally couple the ltz-legs. At 1€/piece its maybe worth a try. Maybe its not beneficial in the end, like slots around the LTZ.
Attached is an example design that uses THJP0612, which i incorporated into a prototype LTZ-pcb.
Tests still to be done, layout isnt ready yet.

https://www.eevblog.com/2020/11/14/eevblog-1347-smd-thermal-jumpers-could-be-game-changing/
https://www.vishay.com/docs/60157/thjp.pdf
https://xdevs.com/doc/Wavetek/7000/img/w7000top.jpg trace color indicates at least three layers

[TiN]

I think multi-layer stuff is the new voodoo slots  . If design is done properly it will work good on 1 layer or on 6 layer. If design is not good, then no amount of layers will help it. Too my inexpirienced eye this PCB screenshot from 3roomlab tends toward bad design. I mean why we have mix of THT and SMT parts? No kelvin connection for sense from LTZ package. Mix of various trace thickness. Resistors oriented different ways towards LTZ package. Also if LTZ chip is not in same spot as in original 3458A then it will generate issues for stuff on A1.

[dietert1]

Especially true if you don't want to cut the legs,,

Regards, Dieter

[niner_007]

3roomlab, are you planning to replace the reference in the 3458A? For me that answer is not quite, I just adopted the form factor. But nice to see others using the same form factor