Ultra Precision Reference LTZ1000

[branadic]

bond wires used to be pure gold, but now were changed in the whole electronics industry to pure copper.
aluminium is always used for the top chip metallization, and the bond landing pattern .
On that photograph, obviously LT uses aluminium bond wires.
Afaik, this material is used in power semiconductors also, therefore low resistance may have been the argument here.
.

I doubt they used aluminium bond wires unless the chip metallization is known and this is not gold (see the picture), what you would need for an aluminium bond wire.

[Dr. Frank]

I doubt they used aluminium bond wires unless the chip metallization is known and this is not gold (see the picture), what you would need for an aluminium bond wire.

Excuse me, branadic.. I receive PCNs (Product Change Notification) every day, from all relevant semiconductor suppliers worldwide.

So I can tell for sure, that for the chip metallization, usually and definitely aluminium IS used!

Follow the Heraeus link, available bond wires are made of Au, Cu or Al, and can well be distinguished by their color.
And the most probable material in the LTZ1000 cut-off is aluminium bond wires.

The bonding process  is some sort of creating an alloy; Au alloys very nicely with aluminium.
In short, equal metals are not required for bonding, but aluminium/aluminium bonding is of course possible, why not?

This avoids diffusion problems. 

Anyhow, does that play a role in this actual discussion?

Frank

[branadic]

Excuse me, branadic.. I receive PCNs (Product Change Notification) every day, from all relevant semiconductors suppliers worldwide.

So I can tell for sure, that for the chip metallization, usually and definitely aluminium IS used!

This is only true if the bond wire is gold. You can't bond an aluminium wire to an aluminium surface, sorry but I studied microsystem technology and still work in a field where bonding is one way to connect bare dies to a pcb or mid

[Dr. Frank]

This is only true if the bond wire is gold. You can't bond an aluminium wire to an aluminium surface, sorry but I studied microsystem technology and still work in a field where bonding is one way to connect bare dies to a pcb or mid

Ok, that I didn't know.. learnt something.

Do you also know the reason for that behavior, it's not obvious for me?

I also read those magazines about power electronics, with many macro photographs of bare die technology, there's often aluminium used for the bond wires, but the metallization also have a silver color.

Do you know anything about that?

Frank

[branadic]

I was very surprised when testing the VRE3050AS reference which is in a hermetically sealed package with gull wing leads. In this case I thought that the influence of the PCB to the chip would be negligible. But this was not the case. I measured values from -16 to +186 uV against untwisted PCB.
Other references have other values depending on construction and individual make.
A LT1236ACS8 gave around 400uV between minimum and maximum value.

If this is true you should have no change using the LS8 package right?

Concerning the die attach, using glue with silver particles could be a hint that the backside of the die is connected to ground/case and not for thermal purpose only. The thickness of the glue in any case should be as low as possible. The transparent brown mass on the picture is so called underfill. This is used because the filled conducting glue has low adhesion and with underfill mechanical stability is increased.
I agree that hermetical packages have improved mechanical stability but they are not stress immune. Stress to the pcb and so to the package (a leg of the package will transfer the force over the bond wire to the chip, even if this is orderes of magnitude lower compared to molded chip packages) will have an influence in any case, the question is "Is it big enough that you can measure it?" I don't now because you can't seperate all the effects from another. Bending the pcb will also change the temperature relations inside the chip package and whatever.

The references are running and I will observe if I can see an influence or difference if bending the board.

[Dr. Frank]

... The TO-style metal cans are 100% immune to mechanical board stress.  More than likely, the slots in the PC board were to reduce heat-loss, and (in turn) reduce power consumption when running on battery for the 4910 reference.  I am guessing that the engineer at Datron that designed this left the company, and then following engineers simply copied the design without understanding why.  The "A" version of the LTZ1000 did not show up for a while-- so Datron only had the LTZ1000 to work with-- and it is going to use more power for the heater than the "A" version-- thus the need to not only reduce heat loss through the PC material, but also to insulate the LTZ1000 with foam.

You can use slots on your LTZ1000(A) design if you want-- this will reduce heater power a very small amount (and even smaller on the "A" version).  If you intend for your reference to run on battery power for extended periods of time, this may be important to you.  If your reference is line-powered only, then I just don't see any benefit to the slots.

...

Your explanations are really striking!

Me also, would also accept different expertise about those darn slots, if a measurement can demonstrate to have effects above 0.1ppm over whatever kind of parameter.

Up to now, the best naked LTZ1000 stability which can be achieved on an ordinary concept (evaluated by test, model and calculation) is around 0.3ppm/yr and below 0.05ppm/K.

If the influence would be below those ppm-numbers, it would be fully useless to spend any effort in this feature.

Frank

[branadic]

Okay, I made the test. Setup: Philips PM 2534 and Prema 5000 measuring the voltage difference between the references. Both meters are in 6.5 digit mode. One reference side is fixed in a bench vise the other reference side is bend. The leads of the voltage references are as short as possible from the last thermal test. So if there were stress at the leads the references would get it with the maximum amount.
I can't see any change if the board is bend and I can't see a difference between both layouts. So whatever the slots are good for can only be due to thermal purpose. The result is hard to show, but I hope you trust my statement.
What is true for the LM399 is sure true for the LTZ1000.

So my conclusion is, it's worth making the leads of the reference as short as possible to keep the temperature gradient along the legs small and the solder joints at nearly the same temperature as the reference. This is what Keithley does in its 2002 device with the LTZ1000 and sure in other gear too. Against air flow they provide this little black cap what certainly improves temperature stability.
The slots are neither good nor bad. You have to decide individual on your design, because the reference is followed by an amp. If you pass on slots you can put your amp as close as possible to the reference. This can be helpful or causes trouble.

However, sad that such an investigation was never performed or published before. But with the pictures shown everybody can get an idea of what's best. No space for manipulation or speculation

[branadic]

And there you have it...  'nuff said...

To quote my boss: "An experiment does not forget any question."

But I agree, art work is pretty cool and it would be worth people would spend some more time in designing their pcbs. Everybody could profit by rf design (pcb based filters etc.). At the end of the day electronics can raise a claim to look art like and stimulate the eye.
I call myself esthete.

[branadic]

If you are assured by your approach go for it and let uns know your results

[Dr. Frank]

I just return from the basement, where I also tested mechanical stress on the PCB, where an LTZ1000 is sitting beneath.
See my first tear down photo on p. 13 (reply #180).

I simply pressed hard with a screw driver near the LTZ, to bend the PCB locally.
The bending effect from local heating  caused by the reference itself will for sure be much, much smaller.

The output of 7,147 975 5 V did not change under this disturbance, only the normal fluctuations on the last digit could be observed.

This quick and dirty test is no proof, I have to admit.

Frank

[alm]

This is kind of interesting.  The 0.05ppm/C figure comes from the original Ap-Note.  So, the temperature sensing transistor will have about -2mV/C response.  Using the original circuit in the Ap-Note, many experimenters have found that the ouptut voltage of the LTZ1000(A) will have ~50ppm/C drift with the oven not used.  This means that to achieve the 0.05ppm/C performance we have to maintain the die temperature +/-0.001C.

You can't assume the tempco to be stable over temperature unless you tested it. Tempco will often vary as a function of temperature, current and other parameters. See the Solartron calibration of the 7081 zener current for example. Or the temperature setting on an OCXO.

The 0.3ppm/year stability figure is for the original circuit-- perhaps running the die at 45C.  If you drastically lower the die temperature (to say, 0-deg-C), then you might expect long-term drift to be far less than that-- perhaps as low as 0.1ppm/year (on selected devices of course-- the "average" device will be slightly higher).  This can be done using a multi-stage Peltier device to chill the case of the LTZ1000(A) to -10C, then run the on-chip oven (which has superior temperature control over the Peltier device controller) at 0C.  The results should be quite striking-- almost "spooky" JJA-like stability...

Maybe, but does anyone have data to support this? You can't make solid predictions based on extrapolation. The stability may very well plateau below a certain temperature. It may also be that the high tempco (see above) at 0°C will mess up this idea. Or moisture (condensation).

[Andreas]

If this is true you should have no change using the LS8 package right?

The LS8-package (LT1236AILS8-5) I did not test with all pins soldered to the PCB. Because I knew that this would have a significant influence.
In a earlier publication (New Product Catalog August 2012) LT published a humidity coefficient for "Humidity (25% RH Change) < 10ppm" for the LT1236 with the LS8 package. I asked them if this was due to the PCB expansion and if I could reduce the rH dependency by some kind of dead bug mounting. The answer was "yes". And with the next version of the data sheet the rH parameter was removed and replaced by "However, PC Board material may absorb moisture and apply mechanical stress to the LT1236LS8. Proper board materials and layout are essential."

And although only having soldered one of the pins to a wire connected directly to the board I have measured
-2 .. +5uV giving a span of 7uV for the LS8-device on my ADC17.

With best regards

Andreas

[branadic]

Most PC board materials exhibit piezoelectric (and/or triboelectric) effects with mechanical stress

Do you have a publication to that statement?

[alm]

No-- I have seen no study with a statistically large enough population that would indicate to any level of certainty that my assertions are correct.  However the Spreadbury study did produce some interesting results [see figure 4 in the attached file], and if you can believe the theory that the drift of the LTZ1000 chip will be reduced by 1/2 with each 10C lowering of die temperature, then it is worth an experiment.

I agree, fig. 4 looks promising. Still, no way to know without testing. I certainly wouldn't assume better stability than 25°C without evidence.

It is possible that this theory is wrong, or that there are other limiting factors that would prevent such low levels of annual drift-- only experimentation with hundreds of units over several different wafer lots would prove this-- and this would take a great deal of money and a great deal of time-- perhaps at least 3 years--

I'm not convinced that you need hundreds. If the drift of individual samples is close enough and the temperature produces a major improvement, then say 5 at 0°C and 5 at some higher temperature may already be enough to show an improvement. You would need to measure over fairly long time periods because of the small magnitude of the drift, and quantifying long term drift may indeed prove interesting.

The only thing we can do as hobbyists, is build a few of these, and see how they drift against each other-- not as good as having a JJA, but it would tell us something at least.

What if at 55°C the references all have a drift of between -2 and -3 ppm/y, but at 0°C the drift would be between +1 ppm/y and -1 ppm/y. Without an independent observer, the latter wouldn't be any better (similar spread). The Spreadbury paper unfortunately doesn't provide enough data to tell if the spread in drift also decreases with temperature.

[robrenz]

You need to be more Diligent

[branadic]

No I do not-- I was reading about it on the Internet a few weeks ago, and silly me, I did not bookmark the page-- and I am too lazy to try to search for it-- but, if *you* find it, post a link and then we can all enjoy it-- (and I will read it again-- my memory is not as good as it used to be when I was younger).

I can't find any hint to such a problem in the web for FR4 substrate. And I don't see any physical background that the glas epoxy mixture can produce piezoelectric voltages. I can only imagine that LTCC have possibly such effects but I don't know for sure.

Maybe you mixed it up with the problem of piezoelectric effect of smd ceramic capacitors on pcb?

[Andreas]

This quick and dirty test is no proof, I have to admit.

Hello,

But together with the test of branadic this convinces me that at least the LM399 and the LTZ1000 are insensitive to mechanical stress.

Are you certain that it was package stress causing the shift in output voltage?
 I could believe this with an epoxy package, but not the LS8 (ceramic LLC)-- can you make a movie of this and put it on YouTube so we can all enjoy it?

Yes it is repeatable. And  the LT1236AILS8-5 references have a push pull output with a very low impedance. So the impedance of the meter does not play a role when regarding static electricity.
And no. I will not do Daves (video-) job just to repeat a measurement where I have already the data that I need.
Usually I am doing the mechanical stress test only once at the begin of the life of my ADCs.

With best regards

Andreas

[Mickle T.]

Our laboratory researches wasn't confirmed the insensitivity of the LTZ1000 to mechanical (thermo-mechanical) stress. Output voltage drift is small, but measurable even in 7.5 digits mode and well explained via strain compatibility conditions of LTZ1000 and PCB's.

[quarks]

Hello Mickle,

Thanks for your information. As I know, you have done a lot of very impressive projects and research around them. I would like to know what you learned and what you would sugest to implement, if you would build your next LTZ1000 board.

Bye
quarks

[branadic]

Interesting results, but is it really due to stress or is the reason to be searched in the change of thermal distribution?



This picture in mind I can imagine a donat like heat distribution. If you now bend or tild the board the distributions emphasis will change.
On the other hand the deformation in your simulation is quite big, compared to the board size, isn't it?

[robrenz]

FEA simulations usually exaggerate displayed deformations so it can be visualized.

What about the strain gage effects (resistance change) of the conductors as being the primary cause? Either circuit board traces, chip leads, or chip die level.

[branadic]

FEA simulations usually exaggerate displayed deformations so it can be visualized.

Sure, but ±0,5mm is at least 1mm deformation!

[robrenz]

I see what you mean, that is much more deflection than what would occur naturally even with poor handling.

[Dr. Frank]

Our laboratory researches wasn't confirmed the insensitivity of the LTZ1000 to mechanical (thermo-mechanical) stress. Output voltage drift is small, but measurable even in 7.5 digits mode and well explained via strain compatibility conditions of LTZ1000 and PCB's.

Hello Mickle,
those are interesting findings!

But I do not understand them yet, sorry, it's always me.

What in fact is your explanation of the offset, what you call strain compatibility LTZ/PCB?
I still do not see, which physical effect causes this shift of voltage, and where this effect is located: in the solder junction, in the package, on the chip?

It's clear, high temperatures on a PCB cause strain between rigid bodys of different thermal expansion coefficient , e.g. SMD ceramic components (R, C) versus the PCB itself.
But that's not valid for leaded components, as the leads will simply follow the PCBs expansion.
Only if you have a torsion of the PCB, I could imagine, that the different leads of the TO8 package see different forces in different directions, as you obviously want to demonstrate by your measurement (what was your measurement setup?) and your finite elements simulation.

I see no reason why the PCB should perform such a torsion , if the PCB simply is heated in the middle of the LTZ.

Then, it's not clear to me, why the PCB should heat up to 65°C, if the reference is at this stabilization temperature, or at much lower values (e.g. if run on 45°C), as there is a thermal gradient between the TO 8 package and the PCB.

So, is the observed/measured shift just an exaggeration of this (still not named) effect?

For me, it would be very interesting, how you construct LTZ references today, i.e. which resistor types from Vishay, LTZ A type or not, which temp?
Well I could first investigate on your 7081 modification, but it would be nice, if you would answer specifically to the open questions here.


Thank you very much!

Frank

[Dr. Frank]

FEA simulations usually exaggerate displayed deformations so it can be visualized.

What about the strain gauge effects (resistance change) of the conductors as being the primary cause? Either circuit board traces, chip leads, or chip die level.

Which resistors do you mean?

I thought of such an effect in first instance also, but there is no such resistor element, perhaps SMD, as all precision resistors are leaded parts also.

Frank