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using a voltage follower in the feedback loop of a zero drift amplifier

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Hello everybody,
I am new here, so please forgive and redirect me in case the metrology section is not appropriate for my question.

While studying the schematics of the wonderful CERN open hardware voltmeter I came across a design topology that I am not familiar with and so far not fully understand. At several critical points in the design the designer chose to put a voltage follower into the feedback of a primary opamp. An example would be the circuit for the common mode bias voltage buffer.

The designer chose an ADA4522-1 zero drift type as primary opamp. Obviously due to its very low offset voltage drift and very low 0.1 Hz to 10 Hz noise. The secondary opamp is an AD8065 FET type with pA input bias current. I'm assuming that this was chosen to minimize the input bias of the combined arrangement, but I would like to understand this a bit better.

I hope that some of the forum members will be able (and willing :)) to help me understand this in detail.

* Is my assumption that the secondary opamp is chosen to lower the input bias current of the circuit correct?
* Why would the second amplifier not increase the noise in the low frequency range?
* Can anyone point me to some explanation of such combination?
Thanks a lot for your help.

The important feature of the 2nd OP is not the low bias.
The important point for the 2nd OP is the high speed.  It should be faster than the AZ OP to make it easy to get the loop stable, though the extra cap and resistor make it possible even get that without the high speed.

The circuit wants a low output impedance and fast recovery even at high frequency / short times (e.g. 100 ns scale).
So the 2nd OP is responsible for the higher speed part, the AZ OP is only for the low speed part (e.g. < 15 kHz).

There is  another possible use for the extra OP: with a little filtering between the OPs, they could also reduce the chopper artifacts from the AZ OP. So they may have missed out on that option or found it not to be worth it.

One important aspect of this arrangement of amplifiers, AKA composite amplifier, is high gain. Simply spoken you combine the gain bandwidth products of the two amplifiers. This gives you higher (closed loop-) bandwidth at higher gain basically.
The more relavant aspect for metrology is a much reduced gain error: Let's think of an amplifier that has a gain of 106 you get 1uV offset error per 1V output. With two amps this offset becomes 1pV (given both amps have the same gain) In an integrator as an example this error contributes to nonlineariy as the 1uV adds to the input voltage.
Another advantage of such a composite amp is that the heat generated by the output stage (under load) does not affect the input stage.
Last but not least it allows to create an amplifier that can be optimized for both input- and output specs like fA input bias current and 100mA output current.



In the past they used a transistor as output stage to take the power away from the precision buffer amplifier: A cool amplifier would drift less. The good old HP 3456A lab voltmeter already had that transistor buffer for its LM399 reference. With chopper amplifiers this no longer applies as they drift much less.
I used the transistor buffer for some 10 V references as output stage. That output stage is stable under capacitive load, see here: https://www.eevblog.com/forum/metrology/lm399-based-10-v-reference/msg3567571/#msg3567571.

Regards, Dieter

Two good replies--
Just to add to answer #1, the speed aspect is needed to drive ADC refin. Many LT app notes mention this.

See, for example, the ADA4523-1 datasheet which has this type of circuit on the front page. In that circuit, as Kleinstein mentions there is some low-pass filtering added, as well.

AN21 from Jim Williams is a classic reference, see his last circuit.


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