Electronics > Metrology

What is the purpose of such op-amp connection?

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For the circuit it would make sense to run a Spice simulation. Most of the parts should simulation OK, maybe except some details of the charge injecition at the JFETs.

The voltage peaks at the integrator input alone don't cause much noise. The trouble there is more with phases that are rather short and the reference already switching before the integrator input is fully settled.
I don't like the reference swiching part very much: when off the switch node is only coupled via the resistor to the integrator. This gives quite some change in resitance for the integrator input and thus the need for the 2 amplifiers.
The modulation frequency is also quite low and thus not too many switching events to cause noise and a reasonable time for settling. There are several parts that don't look really low noise and high linearity. The LF355 is a rather fast amplifier, but not known for precision or low noise.  Another somewhat nasty part is the delay caused the BJTs to switch the JFETs. The variable load to the reference vottage can also be a problem. That reference part looks somewhat odd. 


--- Quote from: Kleinstein on June 24, 2022, 08:24:22 pm ---For the circuit it would make sense to run a Spice simulation.
--- End quote ---
I don't have LTspice, but made a simulation some time ago. It works in browser. Problem that OP-amp there is ideal, with only gain adjustable. There is 741 with rising time adjustment, but to simulate LF355 I need to put JFETs before it's inputs - this is to much and he gives error message. Simulation with simplified digital part and reference (as a switch used ideal CMOS output with 7V suply of IC):

--- Quote from: Kleinstein on June 24, 2022, 08:24:22 pm ---The trouble there is more with phases that are rather short and the reference already switching before the integrator input is fully settled.
--- End quote ---
You mean if Ux is low and reference pulse is short - time is not enough? I agree. It will cause nonlinearity, but I hope - stable nonlinearity, which can be corrected by compensator.

Regardless, scales work fine. The ADC range is 30g (if more they automatically use weights with 20g step, 170g total capacity), scales show 0.0001g and it "costs" exactly 1 pulse per 0.5s cycle. No extra bits, and the last symbol is pretty stable! Of cause, controller calculates average of last 2, 4 or 8 cycles - what you need - stability or speed.
There are some other problems.

As far as I understand, slew rate primarily decreases with:
- increasing of common-emitter stages number;
- increasing of amplitude on collectors of such stages.
I made a picture of LF355 internal structure (attachment 1) with external transistor and current source (blue). Output protection and null adj. circuits are erased. Red transistor is closed, works only on setting time.
At the bottom we see something like Sziklai pair, with p-JFET as p-n-p transistor in classic Sziklai pair. It follows voltage on output of differential stage. Because of very low amplitude on exit, provided by common-base external circuit, amplitude on differential stage exit is also low. In such small signal regime the role of internal compensation (especially C2) also declines.
It would be better to use upper part, because no common emitter there. But if we look at OP07 structure (attachment 2) - bottom part is p-n-p and common collector. OP07 about 10 times slower, than LF355, so I think Prema circuit was designed to increase it's slew rate.
Sartorius produces scales, not voltmeters. Probably they bought this circuit from some patent. Or maybe circuit first was designed to use OP07, but then it was just replaced with LF (same case and pinout)  for some reasons.
I remember audio circuit of Deutsch (DDR) ham, who used very similar idea to make slow A109 OP-amp faster (attachment 3).

David Hess:
I thought of a reason they did that.  I have seen the same thing in a Solartron design and now it makes sense.

Because of the current source and transistor, the LF335 output is held at a constant voltage and constant current, so its power dissipation is constant.  If the output current or voltage was allowed to change, then changes in heating of the die would cause offset voltage changes and lower open loop gain, limiting precision.  Open loop gain in an operational amplifier is primarily limited by thermal feedback from the output transistors to the input transistors.

Circuits using precision operational amplifiers often take steps to minimize the output load to retain precision, or go to the same extreme shown here.

The current seen by the OP-amp is not constant, but only constant on average, which is enough not to effect the temperature too much.
The LF355 is not a high precision OP - so the self heating is more like a smaller problem and the OP07 could well be the better choice, though slower. It may be a cost factor / BOM simplification.

The slew rate is not so much the relevant limit. It is more the GBW that is relevent for the integrator, though one needs to stay away from the slow rate limit. The slew rate is usually limited by the current the input stage can deliver and the capacitor used for compensation. The number of transistors in emitter circuit is not relevant - it is more the slowest part beside the stage used for the compensation that limits the maximum useful bandwidth of the amplifier circuit.

The JFET based amplifiers often have a relatively high slew rate relative to there BW as the input stage needs a higher voltage at the input to get the full output current. With no base current to cause bias current,  the input stage can run with a relatively high current with not much negative effect. BJT based differential stages usually saturate at some 50 mV differential and it takes additional emitter degeneration to raise that limit.


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