I decided to play around with STM32 without using HAL (CubeMX).
yes, I could blink with the internal HSI clock, so tried to input the HSI clock to the PLL to speed up the process, but it did not work.
When I debugged it,
"Break at address “0x0” with no debug information available, or outside of program code."
Something seems to be happening.
try again, change to the external HSE clock, but at a randomly(I did a Step Into).
"Break at address “0x4b166012” with no debug information available, or outside of program code."
dasm window:
"4b166012: Failed to execute MI command: -data-disassemble
-data-disassemble -s 1259757586 -e 1259757715 -- 3
Error message from debugger back end: “Cannot access memory at address 0x0x2000.
Cannot access memory at address 0x4b166012"
What is going on!
registers seem to be set correctly in the SFR window.
The problem apparently occurs when the SYSCLK exceeds 48 MHz.
Perhaps the other ICs on the Discovery board are affecting it?
HSE = 8MHz.
PLL PLLM = 8 (PLL input freq = 8/8=1MHz)
PLL PLLN = 100 (PLL multiply freq = 1*100=100MHz)
PLL PLLP = 2(0b00) (PLL main div freq = 100/2=50MHz)
PLL PLLP = 2(0b00) (PLL main div freq = 100/2=50MHz)
PLL is also locked (flagged), SWS register is also flagged, set the port for blink...HALTED!. Why?
Do I need to set any registers yet?
(SYSCLK has been checked with MCO1 output. Properly 50MHz.)
#define STM32F469xx
#define __SOFT_FP__
#include <stdint.h>
#include <stm32f4xx.h>
void delay(int delay_seconds);
int main(void)
{
//init clock
//MCC1 output
RCC->AHB1ENR |= (0b1 << 0); //GPIOA clock enable
GPIOA->MODER |= (0b10 << 16); //set alternate mode
GPIOA->OTYPER |= (0b0 << 8); //set push-pull mode
GPIOA->OSPEEDR |= (0b11 << 16); //set high speed mode
GPIOA->PUPDR |= (0b00 << 16); //set without pullup/down
//set HS External clock source
RCC->CR |= (0b1 << 16);
//wait to HSE clock is ready
while(!(RCC->CR & (0b1 << 17)));
//set system clock source is HSE
RCC->CFGR |= (0b01 << 0);
//wait to set clock source
while(!(RCC->CFGR & (0b01 << 2)));
//disable HS Internal clock source
RCC->CR &= ~(0b1 << 0);
//wait to HSI clock is disabled
while(RCC->CR & (0b1 << 1));
//set power scale 1
PWR->CR |= (0b11 << 14);
//set pll config
RCC->PLLCFGR = (0b111 << 28) | (0b0100 << 24) | (0b1 << 22) | (0b00 << 16) | (100 << 6) | (8 << 0);
RCC->CR |= (0b01 << 24);
//wait to lock pll
while(!(RCC->CR & (0b1 << 25)));
RCC->CFGR = (0b11 << 21) | (0b110 << 13) | (0b110 << 10) | (0b10 << 0);
//wait to set clock source
while(!(RCC->CFGR & (0b10 << 2)));
//init blink port
RCC->AHB1ENR |= (0b1 << 6); //GPIOG clock enable
GPIOG->MODER |= (0b01 << 12); //set output mode
GPIOG->OTYPER |= (0b1 << 6); //set push-pull mode
GPIOG->OSPEEDR |= (0b00 << 12); //set low speed mode
GPIOG->PUPDR |= (0b00 << 12); //set without pullup/down mode
while(1){
GPIOG->ODR |= (0b1 << 6);
delay(1);
GPIOG->ODR &= ~(0b1 << 6);
delay(1);
}
}
void delay(int delay_seconds)
{
for(int i=0; i<delay_seconds; i++){
int j=0;
for(; j<1000000; j++);
}
}