A Bendable Non-silicon RISC-V Microprocessor

[DC1MC]

OK, now for something different, what does the forum thinks of this:
https://www.pragmaticsemi.com/newsroom/blogs/bendable-non-silicon-risc-v-microprocessor

Research article here:
https://www.nature.com/articles/s41586-024-07976-y

Will we have some very flexible Milk-V boards, or just dodgy technology ?

Cheers,
DC1MC

[shtirka]

It will be very interesting to see how things will develop for them - off the top of the head I seem to remember that the processor was like 12.5k transistors and running at whopping 60kHz or something very similar (ah found the link where I read it - https://www.pcgamer.com/hardware/processors/the-worlds-first-fully-functional-32-bit-bendy-cpu-can-run-while-wrapped-around-a-straw-but-boy-is-it-slow/)
Ilya

[coppice]

They've been showing off simpler devices for quite a while. I can see a lot of high volume applications, in things like tagging, where a super thin flexible device would be great if the price is right. Most of that work doesn't require great processing speed, except for one sticking point - wireless communications. Maybe we could see a move from 13.56MHz near field comms to 125kHz. If they can make a RISC/V run at 10's of kHz I expect they could implement 125kHz near field comms.

[brucehoult]

It's 60 kHz and the SeRV core, which means 32 cycles for most instructions, 64 cycles for shifts and branches.

Sometimes simply being programmable is enough, you don't need all that much speed, as coppice says.

SeRV at 60 kHz is going to do between 1000 and 2000 instructions per second, depending on the instruction mix.

As something to compare that against, an Apple ][ running AppleSoft BASIC runs `FOR I=0 TO N:T=T+I:NEXT I` at 250 loops per second.

On SeRV that loop is going to be something like ...

Code: [Select]

loop:
    add  a1,a1,a2
    addi a2,a2,1
    bge  a0,a2,loop

... which will take 128 clock cycles per iteration, or about 470 loops per second at 60 kHz, so that's almost 2x faster than AppleSoft on an Apple ][. Which many people found fast enough to start a revolution.

Yes, AppleSoft is using floating point numbers, which are slower than integers, but Integer BASIC only runs that same code at about 330 loops per second.

Original IBM Model 5050 PC runs the same loop at 415 loops per second in BASIC (380 for BASICA), if that's your reference ecosystem. Not a big difference. Still slower than SeRV at 60 KHz.

Interpreted BASIC was the only thing most end users had on those computers, for quite a few years, until Turbo Pascal and Think Pascal/C changed everything.

Professional software was written in assembly language but at the start of the revolution most of the programs that people wrote themselves, or that you saw printed in magazines to type in yourself, were in BASIC.

Today everyone has high quality free C / C++ / Rust / Swift / Mojo compilers, so the baseline for microcontrollers is compiled code. Only masochists use µPython.

(speeds for Apple ][ and IBM PC checked on online Javascript simulators which claim to be cycle-accurate, which is not hard to do for 6502 and 8088)

[SiliconWizard]

Yep, that's interesting but you may wonder what's the use case exactly.

The underlying technology compared to silicon would take us back many decades ago. The power consumption is also unimpressive (6mW for a SeRV core @60kHz, sure).

I can see some very niche use cases for "bendable" ICs, but high volume applications? Why would you ever need bendable ICs for tags, for instance, when the required IC(s) can be less than 1mm2 and basically wouldn't require being bendable themselves even on a flexible tag (within reason).

They also talk about "ML" in their marketing pitch, so it just looks more like tech trying to find investors than anything ready to really meet real demand. But that's like 95% of startups. So, why not.

[coppice]

Yep, that's interesting but you may wonder what's the use case exactly.

The underlying technology compared to silicon would take us back many decades ago. The power consumption is also unimpressive (6mW for a SeRV core @60kHz, sure).

I can see some very niche use cases for "bendable" ICs, but high volume applications? Why would you ever need bendable ICs for tags, for instance, when the required IC(s) can be less than 1mm2 and basically wouldn't require being bendable themselves even on a flexible tag (within reason).

Although the chip in a tag is very small, if creates a lump, and its attached to a flexible sheet that forms the antenna. A simple sheet with no connections to make seems like an improvement if all other factors, like price and power consumption, work out. Tags are a massive application on their own.

They also talk about "ML" in their marketing pitch, so it just looks more like tech trying to find investors than anything ready to really meet real demand. But that's like 95% of startups. So, why not.

Right now everyone's marketing talks about ML. I expect you find soap powder being claimed to have an ML angle somewhere.