Hi! I recently discovered Aldec Active-HDL development environment, it seems quite good and usable, but I just wonder why does it exists in the first place? I mean, does anybody use it in the industry? Because usually I see vendor-specific environments like Quartus II, Xilinx ISE or Actel one. Is there any reason why somebody will use this Active-HDL instead of Quartus II + Modelsim?
I use Active-HDL daily.
It should be noted that it is a simulation and verification tool only. It does not do synthesis nor does it do the place-and-route required to get a bitstream. For synthesis you can choose the FPGA vendor-provided tools or you can spend large $$$ to get Mentor Precision or Synopsys Synplify. For place-and-route you need the vendor tools.
The reason some engineers may not have heard of it is because the FPGA vendors provide either a castrated version of Mentor's ModelSim or in the case of Xilinx' ISim their own HDL simulator. In many cases, especially for smaller designs, these tools are more than adequate.
If your designs exceed what the free simulators can do, then you start looking for better alternatives, and there really are only two: Active-HDL and ModelSim. ModelSim is the more expensive of the two, and neither are affordable by the hobbyist. But if you do full-time FPGA development and you have proper test benches with models of external devices (memories, converters, whatever) then you soon realize that the free simulators won't work and the money spent on the Active-HDL or ModelSim license is worthwhile.