AM335x [BeagleBone Black] ADC Input Protection

[seancsnm]

Hello, I am working on an undergrad project using the BeagleBone Black, and as versatile as the device is, there is no protection circuitry built onto the board for the ADC inputs. The microprocessor itself may have some protection but I have no idea how effective it is. On the front end of what we're feeding into the ADC, we're dealing with an input voltage that can potentially jump to +10 V if the user is not careful so it's important that we build an additional buffer/over-voltage protection circuit for the input. To build a protection circuit though, we need to know what kind of abuse the microprocessor itself can handle.

As the BeagleBone Black is configured, it has a declared input voltage range of 0-1.8 V for its ADC. The absolute maximum supply voltage for the ADC is given as -0.5 to +2.1 V. As far as I can tell, it doesn't say anything about ADC input voltages. What I'd like to know is if the ADC input voltage (not the supply voltage) limits are given in the datasheet either explicitly or implicitly, or if I am safe assuming that the input voltage limit is the same as the ADC supply voltage limit.


Linked here is the datasheet for the microprocessor in the BeagleBone. Page 80 has absolute maximum ratings. Page 97 has ADC specs.

My second question is, does anyone have any good ideas for a simple voltage protection circuit that can effectively limit the voltage to within the acceptable ADC input range without distorting the original input signal? What we are doing right now is a buffer amp fed into a zener diode circuit that builds off the ideas given here. The problem is that at very low output voltages the signal becomes nonlinear. This can be any number of things so I won't get into details until I've done some more testing but is this the diode clamper still the way to go for very low voltage protection circuits?

[pmbrunelle]

Most microcontrollers have ESD diodes for each pin to Vcc and ground that will limit the pin voltage to within a diode drop of the rails.

So maybe you can just use a series resistor to limit the current going through the ESD diodes to some continuously safe value... maybe it's as simple as that! But I don't know if the source resistance seen by the ADC will result in too much error... If the signal bandwidth is low, maybe you can put a non-leaky capacitor in parallel with the ADC input to give the sample and hold capacitor some help to charge up quickly.

Low-voltage zeners suck; they don't have much of a knee. Also, for a zener solution, you have the zener voltage tolerance and the 1.8 V voltage regulator tolerance; these two tolerances may result in the clamping voltage being wrong.

It's best to limit the voltage relative to the actual 1.8 V rail (whatever its true voltage may be). This is why I prefer a diode to Vcc. If you don't trust the microcontroller's internal ESD diode, but you have access to the 1.8 V rail, you could also install a more beefy Schottky diode between the signal and Vcc. Then, the external diode will do the clamping (because of its lower voltage drop than a standard diode), while the internal diode will not conduct. So with this solution, the external beefy diodes will allow for less series resistance to be added, because the safe current can be higher. However, the leakage current may become a problem.

This 1.8 V stuff is rubbish, though... every little amount of noise/offset becomes a big deal. If it's too much trouble, you can use an external ADC chip. This will also limit the carnage.

[seancsnm]

The problems you mentioned with the zener diodes were exactly the sort I was running into. I was doing some pretty contrived things to try to get the values just right and in the end they may have still been off.

The ADC input impedance is given as a function of frequency (I assume frequency of the input signal?) and because we're sampling from essentially a DC source, it's looking like it's going to be in the tens of megaohms to gigaohms range.

I did a quick simulation so you can take a peek at the results to make sure we're on the same page. Assuming we have access to the 1.8 V source on the Beaglebone I think this solution will do the trick. It looks like the schottky diode is dropping about 0.3 V and sinking about 7 mA of current at most. The signal loss from the 1k input resistor looks negligible.

I'd also considered an external ADC - that'd let us go up a lot in voltage and would probably give a much less noisy signal. Probably the most outrageous thing about using the built-in ADC is that no matter how clean the signal is at the output of the amplifier, it's gotta travel over about 6 inches of unshielded, open air AND has to deal with the noise on the BeagleBone PCB and microprocessor. If we stick with this solution the filtering is going to essentially be a software filter.

Anyways, thanks for the suggestions.

[pmbrunelle]

We are talking about the same thing, based on the schematic and graphs.

I don't really think that "impedance" in the sense of Ohms and a phase angle is a proper way to describe how a micro's analog input pin is seen by the outside world... Nevertheless, probably a 1 k resistor is OK, especially if your gadget will remain at room temperature. Leakage current from the Schottky diodes may become significant if your circuit will see automotive temperatures, but I assume it won't.

If you'll be sinking 7 mA into Vcc when your input is at 10 V, you should ensure that you have at least 7 mA worth of loads on the 1.8 V rail. Otherwise, if you have insufficient load, even if the voltage regulator shuts off completely, the current (with nowhere to go) from the diode will jack up the rail voltage, which will ruin your day.

I don't see 6 inches of wiring being such a huge issue. Telephones are analog, yet voice can (intelligibly) travel for miles on a twisted pair. Analog isn't bad.

[seancsnm]

If you'll be sinking 7 mA into Vcc when your input is at 10 V, you should ensure that you have at least 7 mA worth of loads on the 1.8 V rail. Otherwise, if you have insufficient load, even if the voltage regulator shuts off completely, the current (with nowhere to go) from the diode will jack up the rail voltage, which will ruin your day.

Good point. I'll have to see if borrowing from the Beaglebone's regulator will suffice or if I'll need to run another regulator which intentionally sinks some current. Or maybe a 10k resistor instead will suffice. The voltage protection should only kick in if something goes a bit awry on the user side, but a second or two is plenty of time to cook silicon quite thoroughly.

Thanks for the help/advice. I'll start doing some testing once I can get my hands on suitable components.

[SeanB]

After the clamp diodes do not go to Vcc but instead go to a simple zener regulator of say 3V3, fed from the unregulated supply, so the zener has around 20mA flowing through it in normal operation. Will be a very soft knee, so might only be 2V7 in normal operation, but when you apply an input overvoltage the zener will sink all the current. Then add another series resistor to the ADC input, 1k will do, and if you are only dealing with slow changing signals and want best accuracy an input capacitor according to the datasheet will help reduce noise.

[seancsnm]

After the clamp diodes do not go to Vcc but instead go to a simple zener regulator of say 3V3, fed from the unregulated supply, so the zener has around 20mA flowing through it in normal operation. Will be a very soft knee, so might only be 2V7 in normal operation, but when you apply an input overvoltage the zener will sink all the current. Then add another series resistor to the ADC input, 1k will do, and if you are only dealing with slow changing signals and want best accuracy an input capacitor according to the datasheet will help reduce noise.

So in essence, create a zener diode voltage regulator with some current (say 20 mA) flowing through it via a resistor to ground, instead of using a dedicated linear voltage regulator? I suppose  that could work, but I would be afraid that the zener diode isn't precise enough. A change of 0.1-0.2 V could really throw things off. It also relies on the main supply voltage being well-regulated. Maybe I'm mis-understanding you. I've attached my interpretation of your description.

[nctnico]

Most microcontrollers have ESD diodes for each pin to Vcc and ground that will limit the pin voltage to within a diode drop of the rails.

So maybe you can just use a series resistor to limit the current going through the ESD diodes to some continuously safe value... maybe it's as simple as that! But I don't know if the source resistance seen by the ADC will result in too much error... If the signal bandwidth is low, maybe you can put a non-leaky capacitor in parallel with the ADC input to give the sample and hold capacitor some help to charge up quickly.

Low-voltage zeners suck; they don't have much of a knee. Also, for a zener solution, you have the zener voltage tolerance and the 1.8 V voltage regulator tolerance; these two tolerances may result in the clamping voltage being wrong.

It's best to limit the voltage relative to the actual 1.8 V rail (whatever its true voltage may be). This is why I prefer a diode to Vcc. If you don't trust the

A solution can be the use of a few stabistors to ground. These are diodes with a very well defined forward voltage. I don't like clamping to supply rails because that could potentially wreck your entire circuit. Another way to have somewhat accurate low voltage clamping is using a schottky diode which dumps current into a properly biased shunt regulator.

[diyaudio]

My second question is, does anyone have any good ideas for a simple voltage protection circuit that can effectively limit the voltage to within the acceptable ADC input range without distorting the original input signal? What we are doing right now is a buffer amp fed into a zener diode circuit that builds off the ideas given here. The problem is that at very low output voltages the signal becomes nonlinear. This can be any number of things so I won't get into details until I've done some more testing but is this the diode clamper still the way to go for very low voltage protection circuits?

This is something I'm busy investigating, I am developing a small data acquisition module using a 16-ADC and its impossible not to get non-linearities using any system in fact it depends on your dynamic range for the intended signal you measuring, example I am interested in measuring 1.2V to 20V at a resolution of 1mV  at 0.05% so far I'm getting very good results within the INL specs of the converter, but as soon as I use 3.3V zeners, measuring low input signal voltages at 100mV their seems to be leakage small enough to reduce and lower the signal gain.

The best would be to probably use a good front end amplifier (depends on your signal DC/AC) I use a OP07 as my front end DC buffer for impedance matching, then a high speed LM393 comparator to latch the signal and take the signal to ground when over-voltage is detected, perhaps in your case you can drive a PIN on the processor and issue an ISR to alert a OL overload condition ect.. or simple LED what ever..   

consequently any system in a signal chain causes signal degradation in some way. it boils down the absolute specifications of your intended signal dynamic range.. real ADC front ends dont use these crude methods (single zeners, external diode clamps) to protect measurement systems.           

example read this, even though its geared towards RF its still an eye opener.
http://www.analog.com/library/analogdialogue/archives/49-04/input_protection.html     

[seancsnm]

How 'bout this? It leaves the signal essentially unaffected unless the voltage limit is hit, in which case it does a shunt to ground. A schottky  diode would clamp negative voltages to ground, and may not even be necessary depending on the amplifier configuration.

What I don't like about this solution is that it uses two ICs. I think I can get away with just the comparator though and leave out the buffer amp entirely.

[pmbrunelle]

I'm not sure why you need the op-amp buffer anyway; it seems kind of pointless to have a buffer which is then immediately followed by a 1k resistor.

If you choose a proper open-collector comparator, such as the LM393 suggested above, then you can lose Q1. Use the comparator's NPN transistor directly as the shunt.

But now that you have a naked comparator input exposed to the outside, doesn't it too need input protection

EDIT: I did once try a comparator clamp to limit the voltage of something. I ended up creating a sawtooth oscillator. You may have better luck though (EE training and whatnot).

I think the shunt regulator, dedicated for the diode clamping purpose (referenced to the existing 1.8 V rail) would be easier. So you could just use an opamp buffer to do this, possibly with a PNP emitter-follower wrapped in the feedback loop.

The pain with all of these active schemes is that now your power supplies need to be sequenced correctly. For example, do you need to wake up the protection first, and then turn on main circuit? Are you OK with not being protected at power-on?

You could also just add a resistor load to the 1.8 V rail to guarantee that the sinking current can be handled. I dont think it's a lot of extra load (depends on the number of inputs you want to clamp I guess), but you could do the following test:
Look at the (unmodified) board with an infrared camera, look for hotspots.
Add the load resistor.
Look again at the board with an infrared camera, see if the regulator got any hotter.

[MT]

NXP    BAS17, etc

[Alex Nikitin]

What bandwidth is required on the ADC input? If not much, say, below 1kHz, than just put 100K resistor in series with the input and it will provide a good protection.

Cheers

Alex

[seancsnm]

I'm not sure why you need the op-amp buffer anyway; it seems kind of pointless to have a buffer which is then immediately followed by a 1k resistor.

If you choose a proper open-collector comparator, such as the LM393 suggested above, then you can lose Q1. Use the comparator's NPN transistor directly as the shunt.

But now that you have a naked comparator input exposed to the outside, doesn't it too need input protection

EDIT: I did once try a comparator clamp to limit the voltage of something. I ended up creating a sawtooth oscillator. You may have better luck though (EE training and whatnot).

I think the shunt regulator, dedicated for the diode clamping purpose (referenced to the existing 1.8 V rail) would be easier. So you could just use an opamp buffer to do this, possibly with a PNP emitter-follower wrapped in the feedback loop.

The pain with all of these active schemes is that now your power supplies need to be sequenced correctly. For example, do you need to wake up the protection first, and then turn on main circuit? Are you OK with not being protected at power-on?

Doing a circuit simulation confirmed my suspicion and answered the question about the buffer amp. The instrumentation amp I'm using has something like a 2.2k resistor in series with its output. This is the point where the comparator makes its reference. If that signal is fed through a 10k resistor then shunted by the comparator, this decreases the reference signal and oscillation results. I don't know how to model the oscillation, but it's clearly a function of capacitance and resistance. And probably whatever transistor(s) are in the comparator. Anyways, I can't see a reason the oscillation is a problem as long as the output voltage is limited (which it is).

I'm not really picturing what you're suggesting as far as the shunt regulator goes.  I don't have direct access to the 1.8 V rail, so I'd have to go with something that can produce a reasonably accurate 1.8 V on its own. Something like this looks like it'll do the  trick. Not exactly a shunt regulator, but I don't see why it wouldn't work.

I should probably clarify that I'm protecting the ADC input from op amps that could rail to a couple volts above/below the ADC limits under certain circumstances. Tuning the supply rails for the amp can't really be done for a few reasons.

As far as using a stabistor, I'm not quite sure what the benefit is. I've never used one, but it looks like their main merit is a well-defined voltage-current curve. However, the voltage drop is rather high.

The bandwidth is very low - on the order of Hz. You're probably right - I am probably over-thinking things. However, I'm also getting educated. 

[diyaudio]

I'm not sure why you need the op-amp buffer anyway; it seems kind of pointless to have a buffer which is then immediately followed by a 1k resistor.

If you choose a proper open-collector comparator, such as the LM393 suggested above, then you can lose Q1. Use the comparator's NPN transistor directly as the shunt.

But now that you have a naked comparator input exposed to the outside, doesn't it too need input protection

EDIT: I did once try a comparator clamp to limit the voltage of something. I ended up creating a sawtooth oscillator. You may have better luck though (EE training and whatnot).

I think the shunt regulator, dedicated for the diode clamping purpose (referenced to the existing 1.8 V rail) would be easier. So you could just use an opamp buffer to do this, possibly with a PNP emitter-follower wrapped in the feedback loop.

The pain with all of these active schemes is that now your power supplies need to be sequenced correctly. For example, do you need to wake up the protection first, and then turn on main circuit? Are you OK with not being protected at power-on?

Doing a circuit simulation confirmed my suspicion and answered the question about the buffer amp. The instrumentation amp I'm using has something like a 2.2k resistor in series with its output. This is the point where the comparator makes its reference. If that signal is fed through a 10k resistor then shunted by the comparator, this decreases the reference signal and oscillation results. I don't know how to model the oscillation, but it's clearly a function of capacitance and resistance. And probably whatever transistor(s) are in the comparator. Anyways, I can't see a reason the oscillation is a problem as long as the output voltage is limited (which it is).

I'm not really picturing what you're suggesting as far as the shunt regulator goes.  I don't have direct access to the 1.8 V rail, so I'd have to go with something that can produce a reasonably accurate 1.8 V on its own. Something like this looks like it'll do the  trick. Not exactly a shunt regulator, but I don't see why it wouldn't work.

I should probably clarify that I'm protecting the ADC input from op amps that could rail to a couple volts above/below the ADC limits under certain circumstances. Tuning the supply rails for the amp can't really be done for a few reasons.

As far as using a stabistor, I'm not quite sure what the benefit is. I've never used one, but it looks like their main merit is a well-defined voltage-current curve. However, the voltage drop is rather high.

The bandwidth is very low - on the order of Hz. You're probably right - I am probably over-thinking things. However, I'm also getting educated. 

Without explicit details its hard to help, the low pass filter (anti aliasing) needs to be determined. what are you even measuring ? 
a differential front end  can be used to further exterminate noise, averaging as well (this a code thing)  what is your accepted noise floor ? 500uV, 1mV, 10mv ? AM335x has a SAR ADC at +/-2 LSB, so dont expect to much out of it.
but then again, we dont know what your parameters / requirements are.

[seancsnm]

Without explicit details its hard to help, the low pass filter (anti aliasing) needs to be determined. what are you even measuring ? 
a differential front end  can be used to further exterminate noise, averaging as well (this a code thing)  what is your accepted noise floor ? 500uV, 1mV, 10mv ? AM335x has a SAR ADC at +/-2 LSB, so dont expect to much out of it.
but then again, we dont know what your parameters / requirements are.

So I don't think the requirements are tight enough to require an in-depth analysis (besides this, I'm not sure I'm competent enough to perform such an analysis). But, let me give what details I can.

We are measuring tensile force from this 25 lb S-beam load cell. This load cell is being provided with +5V/GND. The resistors are nominally 350 ohm. We found that the differential voltage changes by about 0.5 mV/lb (this was found using an amplifier, so I'm fairly certain of its precision within +/-0.05 mV). Next, we have an instrumentation amplifier with a gain of 160 (The AD829). This amplifier has some built-in low-pass filtering. The output of this amp would go through the voltage protection, followed by the ADC, which I think is going to remain the Beaglebone ADC.

I know it's pretty vague, but the nature of the measurements being made does not require ultra-high precision, so it's something we're going to get as good as we can without spending a huge sum of money or time. Assuming the system has less noise than the ADC, I get a rough figure of the precision this should give us as follows:

The force sensor has a sensitivity of 0.0005 [V/lb].
0.0005 [V/lb] * 160 = 0.08 [V/lb] (at the instrumentation amp output)

The ADC is running from a 1.8 V reference, and can be assumed accurate within +/- 2 LSB. The minimum dV we can expect to be accurately read from the ADC is:
2/4095*1.8 = 0.000879 [V/2 div]

The system force/ADC division is thus
(0.000879 [V/2 div]) / (0.08 [V/lb]) ~= 0.011 [lb/2 div] = 0.176 [oz/2 div] = 0.049 [Newton/2 div].

There is of course going to be some noise from the environment/instrumentation amplifier and some nonlinearities, but are those going to affect the precision we can expect from the system? Are there other factors that I didn't account for? I think I need to wrap this design up today. These numbers also make me feel pretty comfortable, even if they are a factor of 2 or 3 off because we really don't need that much precision. Accuracy/drift is something I'd be more concerned about, but I've done enough tests to be confident that won't be a problem unless I bodge up the voltage protection or use resistor values that are far too low.

Edit: I forgot to mention that we only need to measure up to 15 lb. The ADC should max out at 20-22 lb so as long as we have proper voltage protection for the ADC, the measurement range is fine.

Edit2: I butchered some of the unit notation. It should be better now.

[pmbrunelle]

Load cells are ratiometric; since they are resistor voltage dividers, they produce an output voltage that is proportional to their excitation voltage. So the load cell output voltage will drift (proportionally) with its excitation voltage.

Similarly, an ADC count represents a fraction of its reference voltage. So as the ADC reference voltage changes, so does the magnitude of each step.

So you think you need all the voltage references to be rock-steady... false.

The best thing you can do with an ADC - load cell system is to power everything from the same power supply.

Both the load cell and the ADC speak in the same language; they speak in fractions of supply voltage, whatever it may be. So you can use a crummy power supply that drifts (within reason), and it doesn't matter.

Also, power your rail-to-rail instrumentation amplifier from this same power supply. Now, it can't spit out anything that can harm the ADC.

Probably you want 0.5 V to 4.5 V output (10% to 90% actually, think ratiometric!) to stay away from the rails for best linearity, and also for diagnostic purposes... 0% output = broken wire; 100% output = short to Vcc

If you need to set the reference pin voltage to something other than Vcc or GND, use a voltage divider; again ratiometric. So even with supply drift, the offset will be a fixed number of ADC counts. You're even spoiled with this instrumentation amplifier; the reference is already buffered. Too easy.

I would suggest an SPI ADC to talk with the beagleboard. The digital logic levels might not be compatible, but dealing with different levels on unidirectional digital signals is a fairly minor issue.

You may also do the fastest thing that you are comfortable doing, even if it is suboptimal in order to meet deadlines. Don't worry, this is common.

[seancsnm]

The best thing you can do with an ADC - load cell system is to power everything from the same power supply.

Good point, but powering from the same supply isn't going to be an option for this project. That I guess leaves the question, how good is a 7805 regulator with drift? If it sucks, maybe a designated reference? It'd require about 15 mA of current.

Also, power your rail-to-rail instrumentation amplifier from this same power supply. Now, it can't spit out anything that can harm the ADC.

Probably you want 0.5 V to 4.5 V output (10% to 90% actually, think ratiometric!) to stay away from the rails for best linearity, and also for diagnostic purposes... 0% output = broken wire; 100% output = short to Vcc

If you need to set the reference pin voltage to something other than Vcc or GND, use a voltage divider; again ratiometric. So even with supply drift, the offset will be a fixed number of ADC counts. You're even spoiled with this instrumentation amplifier; the reference is already buffered. Too easy.

I would suggest an SPI ADC to talk with the beagleboard. The digital logic levels might not be compatible, but dealing with different levels on unidirectional digital signals is a fairly minor issue.

You may also do the fastest thing that you are comfortable doing, even if it is suboptimal in order to meet deadlines. Don't worry, this is common.

Although it says it's rail-rail on the op amp, in testing it was shown that the output needs to be at least 400-500 mV above the negative supply, so I went with the contrived solution of -1.2 V/+4.2 V. I am a bit concerned why it's not working properly at near 0 V, but I tested more than one instrumentation amp with the same result, so I'm pretty certain it wasn't a defective amp. The positive supply voltage needs to be 1.7 V above the input, which is 2.5 V. That means the positive input needs to be 1.7+2.5 = 4.2 V. However, I've been running on 4.0 V with no problems. I might push it to 4.3 V since the op amp can run at an recommended/absolute max of 5.5/6 V.

I am certain, at least for this iteration of the design, that we'll be sticking with the Beaglebone ADC. I seriously considered using a different ADC, but in the end, the guy who did the coding doesn't have time to implement a different ADC. I am really tempted to sneak in an I2C ADC (that's the only serial port available ATM) on the board with the option of enabling/disabling it via jumpers. It would only be a few jumpers. However, in the end it would be much more for comparison purposes than practical purposes. As I said before, I think the design is already offering more precision than we need.

Edit: I'm not sure of all the places where drift comes from for the 7805, but it's rated to have 0.2 mV/degree C. For a 30 degree temperature rise, let's say the voltage goes from 5.000 V to 5.006 V. And say there is a 20 lb load on the force sensor. Then the differential voltage moves from 0.010000 V to 0.010012 V. That's a difference of 0.000012 V. Multiply that by 160 and it gives that the ADC will drift about 4 divisions. That's the equivalent of 0.022 lb.

[seancsnm]

Just a quick update. I ended up going with using diodes for voltage protection as in Reply #2, using a 10 kohm buffer resistor instead of a 1 kohm buffer. This was a mistake on two levels. First, it turns out that the equation I used to determine the input impedance of the ADC must not have taken into account the multiplexer at the 8 ADC inputs, because there is some very significant current cross-talk between the two ADC inputs when the ADC is on. After doing some reading, I found out that it is generally recommended to actually use buffer op amps at the inputs of ADCs to account for ADC transients and impedance, and I guess ADC MUX's too.

The second problem was with the protection diodes used. I used these schottky  diodes which work great but have a pretty significant reverse current which I neglected to look at. What's more their reverse current is ultra temperature dependent - a 25C temperature increase results in almost a 10-fold increase in current through the diodes. Doing some number crunching, it looks like these diodes will cause about a 0.18 [V] increase in voltage at the ADC with a 25 C temperature increase. I verified this with a heat gun. About a second of heat 6 inches away from the board causes a 0.2-0.4 volt increase.

Realistically this means that even if the board is air-sealed to prevent transient drafts from changing component temperature, a temperature change of a few degrees C throughout the day can mean the difference of 0.1-0.2 [N] in the data, leading to some head scratching and useless data.

So how can I fix this. Here's what I propose:
1) Move the diodes to the output of the op amp. They can handle up to 800 mA and the op amp can handle a dead short so things should be fine if a shunt situation occurs. Under normal circumstances, the op amp will provide enough current to negate the effects of the diode reverse current. The problem may be that the direct output of the op amp may not be accessible for a bodge fix.
2) Move the diodes to the 2k ohm impedance output of the op amp. Will reduce effect of temperature changes to about 1/5-1/6 of what it is.

I'll try option 1 then 2 for now. Later I'll see if I can redesign the board with a buffer amp and relocate the diodes to a better spot in the circuit. 

[nfmax]

How about using a purpose-designed clamping OPAMP like the AD8036, with the clamp voltages set by the 0V and 1.8V rails from the BBB? The 'knee' of the clamp region with these parts is only about 10mV, so you only lose 45 codes or so dynamic range from the ADC? Much faster than you need, but maybe worth a look.

[Kalvin]

This is pretty common (see attachment).

- R1 is used to limit the current when the analog input signal level exceeds the maximum allowed signal level.
- D1  starts conducting when the input signal level exceeds the maximum allowed signal level.
- D2 starts conducting when the input signal level wants to go negative ie. be less than minimum allowed input signal level.
- D3 provides the reference voltage level to the maximum allowed input signal level. When the input signal level exceeds the maximum allowed level, the D1 starts conducting and the D3 will clamp the voltage level to its zener voltage.
- R2 is used to limit the input current to ADC pin should the clamp circuit pass some ESD-spikes.
- R3 will provide bias voltage to D3.

R1 and R2 can be 100 ohm - 1 kohm depending on the A/D-input requirements and accuracy needed. D1 and D2 are low leakage diodes 1N4148 or BAS17 etc. (not schottky as they tend to leak too much for precision analog measurement purposes). D3 is a zener diode with the maximum specified clamping voltage Vz (to be more precise Vz = Vmax - 500mV). R3 can be 1 kohm - 10 kohm. The circuit will effectively clamp the A/D-input voltage between -500mV  ...  (Vz+500mV). The D3 is there to clamp the excess input voltage/current instead of dumping the excess voltage/current directly into the positive voltage rail. The zener D3 and resistor R3 can be shared with multiple analog inputs.

You want to use this protection circuit to protect the A/D-input from excess voltage. This means that your A/D-converter will output the maximum code when the input signal is too high (positive clipping) and the A/D-converter will output minimum code when the input is too negative (negative clipping). Now you can accurately measure small signals as the diodes will not leak and ruin the measurement. As the diodes do not start really conducting when the input signal exceeds the A/D-converter maximum range you can also measure accurately signal with high peak-to-peak value (ie. very little distortion). You want your software to catch those positive clipping and negative clipping instances without distorting the signal unnecessarily in the input protection circuitry.

[seancsnm]

nfmax: I didn't know those sorts of devices existed, but I'll definitely give it a look! Probably won't make it into this circuit, but maybe a future one.

Kalvin: That's essentially the circuit that I'm already running. The difference, as you pointed out, is the selection of specific components. The reverse current of those 1n4148s looks good but what about the forward voltage? It gives a value of <=1 V@ 10 mA which may be too much for the ADC to handle. The op amp I'm selecting already has an R1 = 2.2-5k which is the primary reason I probably need to bring in a buffer amp. That impedance may still be too high for the ADC input.

AcHmed99: Again, I'm not familiar with that method. Good for reference though, thanks!

Edit: I just saw why you biased the zener diode in your circuit - that's not a bad idea!

[seancsnm]

Just another update: Things are looking pretty good with the voltage protection. The solution I went with for now was using the diodes to clamp the op amp output directly. It can supply up to 35 mA which exceeds the 1.8 V reference output capacity (it is connected to the diode and a resistor to ground, so it has to supply all of the current to the shunt resistor until the diode starts providing current). I will have to put in a beefier voltage reference/regulator/zener diode but it looks like a good solution.

I've been looking at the data received by the system, and it's not looking too bad if some digital filtering is done. I've attached some beautiful plots for you all to look at in awe.

Figure 2: A histogram of the ADC values, converted to voltage. ~20k data points were taken with the force sensor at a constant force over a period of about 3 seconds. Notably the readings stretch over about 5-6 bits and a bit surprising to me is the fact that the mode does not occur dead center but rather a bit offset. Maybe it's the ADC topology that's causing this?

Figure 6: A fft of the data. It's sort of all over the place, probably due to the discretized nature of the ADC.

Figure 7: The raw data readings (red) and the response to a 5 Hz digital 5th order Butterworth filter.

Figure 8: A fft of the filtered data.

Note: In the cases of the ffts, I'm pretty certain that the y-axis label is wrong - I don't think it's voltage amplitude being displayed but rather the value through some normalized scaling. I used scipy's fft function without too much thought going into what was going on.

Thoughts? Insights? Corrections to my logic? Admirations of python's beautiful plots?

Edit: Not sure what the ADC sample rate was, but I do know that the data was being recorded every 200 us, so the sample frequency was 5 kHz.