Or latches, like many early CPUs. Instead of using up to 24 pins for a 16 bit address bus plus an 8 bit data bus, that stuff was multiplexed with a timing signal to drive latches, Instead of using 16 lines to get 16 bits, you can use a latch, 8 lines, plus one additional as the timing signal. Latch the upper or lower 8 bits, then apply the second 8 bits to the port, timed to the destination by the signal line, when it goes high (or low, depending on the latch used, etc), you now have 16 bits present on a bus in a valid state for the receiving device to utilize.