I am trying to drive a display using 16bit bus connected to STM32F746's FMC.
I did configure the FMC for SDRAM + SRAM (both share the same data and address lines) and write the data directly to the SRAM address where the display is connected to:
volatile uint16_t * const lcd_data = (volatile uint16_t*) 0x60000000;
*lcd_data=value;
When sending a single word I can see the FMC_NWE line pulsing once, as expected. But when sending multiple words in a burst it also pulses only once.
It looks like some caching is happening somewhere, so only one write is generated despite multiple writes being requested. If I add a short pause (5us) after each write, I get the correct number of pulses and the display works, but it is much too slow.
I can rule out the data cache, because it is disabed.
Can any ARM expert give me a clue where the caching happens and how to solve this problem?