Hi :-) I've been a member here longer than I've been at SiFive. I'm not a founder or manager or spokesperson or anything like that, just a pleb programmer. All opinions are most definitely my own. I liked the tech and its possibilities so much I joined the company.
That's great news!
what sort of prices should we expect for the RISCV parts?
Impossible to answer. Anything from tenths of a cent to many tens of dollars. Which core(s) do you want? Configured how? 32 bit or 64 bit? With multiply? How fast? With divide? How fast? How much if any branch prediction? How much return address stack? How many hardware breakpoints? How many performance monitor registers? FP? MMU? How many of each core on the part? How much L1 data and instruction cache or tightly-coupled scratchpad? What about L2? What peripherals do you want from SiFive or its partners, and how many? What process do you want to use?
SiFive isn't a typical chip manufacturer. We don't come up with ten configurations that we think will sell and then build a few million of them and put them in a warehouse. The idea is to provide a chip buying experience that is like going into a web site and ordering pizza. You pick your size, thickness of the base, type of crust, toppings, sauces press a button and some time later the pizza arrives at your door.
Or in the case of SiFive, you get a bitstream and RTL based on your custom choices within a few hours.
Watch this, especially starting at around 7m40s:
SiFive *can* organise to get your chip fabbed -- especially for a sample run of 100 chips -- or even for high volume production runs, but most customers will already be making chips and just want to add our cores to their own chip. SiFive gives them the RTL and they do synthesis and something that falls out the end of that is the area and therefore the cost.
You can right away, for free, download real working (but limited) RTL for a few fixed configurations of various SiFive cores right away, put it through your workflow and get your own PPA estimates. You can download real working FPGA bitstreams of them and write and test software (at limited MHz, obviously).
https://dev.sifive.com/risc-v-core-ip/evaluate/rtl/If you want to build a typical E31 core (like the HiFive1, but updated and improved) on 180 nm then you'd be looking at a few cents per processor. If you take an E20 and configure it with minimal scratchpad RAM then the cost per core could be fractions of a cent.