There are some companies like SiFive which are doing fully open designs and taping them out. I think one of their employees is a member here. I still haven't grasped the business model (i.e. what's stopping someone from downloading the design and taping it out themselves), but I'm watching it with interest 
Hi :-) I've been a member here longer than I've been at SiFive. I'm not a founder or manager or spokesperson or anything like that, just a pleb programmer. All opinions are most definitely my own. I liked the tech and its possibilities so much I joined the company.
The business model is, I would say, something like RedHat. Nothing stops you putting together your own Linux distro or using one of the many free ones, but some people prefer to pay money for a supported version, with components and versions of components that have been tested and certified to work together.
Last I saw, RedHat had $2.9 billion of annual revenue.
Right, so RISC-V allows private extensions that will lead to various incompatible variants emerging, fragmenting the market. How is this different from ARM apart from the fact that the fragmentation possibility is written straight into the spec in the RISC-V case (where ARM specs only the core and leaves the rest to the implementors).
One difference between RISC-V and ARM here is that RISC-V explicitly allocates opcode space for non-standard extensions, so that they can break each other, but not future standard extensions.
Yes, also non-standard extensions are quite likely to not be made public, but just be deeply buried in that company's products. Compatibility with someone else's non-standard extensions is unlikely to be a factor.
People who would like to submit their extensions for ratification as part of the standard are encouraged to stick to RISC-V norms (e.g. no more than two source registers and one destination register for integer instructions), put operands in the standard places in the encoding, and generally use as few encoding bits as practical.
Recommendations are being worked on to allow the actual opcodes for extensions to be remapped as easily as possible (e.g. possibly as simple as a single #define in binutils). Even though the resulting binary programs won't be compatible, source code will be compatible at the C and asm levels.
There is also a review path through the foundation for non-standard extensions to become standardised if they turn out to be widely applicable. This doesn't solve my general concern of how shrinkwrapped software distributors are going to (not) handle the various possible ISA configurations, but it's also not exactly the same situation as ARM
Even in shrink-wrapped applications, the vast vast majority of code will do just fine using the standard instruction set. Extensions are likely to be confined to just a few routines in a library. Mechanisms such as GNU function multiversioning can be used to choose the best functions at runtime.
Yeah it's quite odd that most RISC-V SoC projects are developing their own bus standards rather than using AMBA. Anyone can freely implement AMBA masters and slaves, and IMO that seems like a better way of leveraging existing infrastructure 
AMBA has a free license but it's not unlicensed. You have to agree to the license terms, and it seems possible ARM could decide to withdraw a license.
There is particular confusion around whether you can use AMBA with non-ARM CPU cores. Some people interpret the wording to mean you can't have a non-ARM CPU in your AMBA system. Others interpret it to mean if your core executes ARM instructions then it must have a paid-for license from ARM.
None of which has I think been tested in court.
Using AMBA in a RISC-V system might be low risk, but could still be the largest risk of getting sued.
SiFive uses Berkeley's "TileLink" point to point interface. I think it's roughly equivalent to AXI4 ACE. We have high performance adaptors to AXI if you need them.
I think some others are using WishBone? I'm not aware of anyone rolling their own from scratch.