Hi,
Granted there are some good SAM programmers here...
I have an issue with my ATSAME70Q21B where I can't seem to be able to use PCK4 to drive the USART0 SCK in SPI master mode.
I'm using MPLAB X IDE 6.20 with Harmony 3/MCC. Frankly nothing really bad to say about the code generation so far... makes things a bit quicker despite the fact I re-write a lot of functions to use registers my way as to optimize and time some things manually.
The code generated seems OK...
For PCK4 configuration :
static void CLK_ProgrammableClockInitialize(void)
{
/* Disable selected programmable clock */
PMC_REGS->PMC_SCDR = PMC_SCDR_PCK4_Msk;
/* Configure selected programmable clock */
PMC_REGS->PMC_PCK[4]= PMC_PCK_CSS_MCK | PMC_PCK_PRES(0);
/* Enable selected programmable clock */
PMC_REGS->PMC_SCER = PMC_SCER_PCK4_Msk;
/* Wait for clock to be ready */
while( (PMC_REGS->PMC_SR & (PMC_SR_PCKRDY4_Msk) ) != (PMC_SR_PCKRDY4_Msk))
{
/* Nothing to do */
}
}
The code for USART0 initiatialization:
void USART0_SPI_Initialize( void )
{
/* Configure USART0 mode to SPI Master (0x0E) */
USART0_REGS->US_MR = US_MR_SPI_USART_MODE(US_MR_SPI_USART_MODE_SPI_MASTER_Val);
/* Reset SPI RX, SPI TX and SPI status */
USART0_REGS->US_CR = (US_CR_SPI_RSTRX_Msk | US_CR_SPI_RSTTX_Msk | US_CR_SPI_RSTSTA_Msk);
/* Configure clock source, clock phase, clock polarity and CKO = 1 */
USART0_REGS->US_MR |= (US_MR_USART_USCLKS_PCK | US_MR_SPI_CHRL(US_MR_SPI_CHRL_8_BIT_Val) | US_MR_SPI_CPHA(0x0U) | US_MR_SPI_CPOL(0x0U) | US_MR_SPI_CLKO(1U));
/* Enable TX and RX */
USART0_REGS->US_CR = (US_CR_SPI_RXEN_Msk | US_CR_SPI_TXEN_Msk);
/* Configure USART0 Baud Rate */
USART0_REGS->US_BRGR = US_BRGR_CD(10U);
/* Initialize instance object */
usart0SPIObj.callback = NULL;
usart0SPIObj.context = 0U;
usart0SPIObj.transferIsBusy = false;
}
Upon trying any kind of communication, I can't see any clock on the USART0_SCK pin with a Salae logic analyzer. Nothing, nada.
PCK4 just seems to not make it work at all, despite being the same exact frequency as MCK.
My baud rate divider for USART is set to 10, more than the required minimum of 6 from the datasheet.
When changing back to master clock and regenerating the code, everything works beautifully. The ONLY thing that changes from working to not working is PCK4 which is set at 150MHz just like the master clock MCK.The data sheet states :
USART0 config in MCC code generator :
Would there anyone who sees a reason it wouldn't work?
EDIT: What's more, PMC.SCSR register with AND mask 1<<3 returns 0b1000 which means PCK4 is (technically?) enabled...
I'm probably missing something I guess I just don't understand what.
EDIT2: Tried with 4 different boards, all not working. Can't believe all those 4 boards would be defective/toast. For each, everytime I go back to MCK, it works.
My SOM is a NetBurner MODM7ae70-100IR fwiw, its not the Xplained board. Regardless, it should work as the datasheet seems to state PCK4 is linked to USART0 within the chip.