The thing is, you were not expected to tell the pointed ic in 30 s, you were to present the thought process of figuring it out... well, and boast with experience and acumen.
Imo the SMPS was just a random point. Say, you got the job, and you are tossed a pcb from competition product with task "figure it out and make ours better and cheaper".
But anyway, just my thoughts:
- considering a joke with a smile: right away "I have no idea what it is, I'd just type the package marking into browser to get over it". - but that's actually on point as it is usually an initial step to recognize an unknown ic.
- "oooh is that an AD ic? they noice but pricey..." - assuming you can recognize different producents logotypes, and have some comment on their products coming from an experience.
- "can I have the photo of opposite side of the board? Or just give me the actual board, I can't see shit on this photo, my eyesight fails me or sth... Maybe there are additional parts for the IC, like frequency source for clocked ic, or heatsink stiching from the exposed pad of the ic, as QFNs can have exposed pads, and power ic may require either external heatsink or some pcb-made, though things like fast interfaces transceivers/phy also can have heatisinks...nope, no ethernet or usb on board..."
- "I didn't had a look around the whole board, so I can't tell where the DSPs are powered from so maybe that's the power ic... are those DSP require multiple voltage levels and full amps of current? Big cpus, or fpgas usually reqire so... the bigger and faster ic, the more amps it sucks, and the voltage spec are tighter and tigher... Those DSPs are from.. TI? don't know, never worked with TI DSPs"... and so on.
- more on that ic: smps controllers have strict routing rules, producer usually draws that in the datasheet or app notes, you can usually have bloated copper around inductors and flyback capacitors, maybe big fat tracks with multiple stitchings, sinking into inner layers (thats why bottom of board helps to tell it; and these can be visible, outside of IC - under QFN with exposed pad there is usually no space to route underneath). Multichannel ic have repeating patterns of such structures...
Or, say some C++ interview. Noone is expected to recitate the standard or know by heart some obscure syntax of edge condition template crap.
The correct answer is often sth like "I heard/read/saw about it, the issue is how compiler deals with X, it propably can be solved by doing Y (I'm not sure, but that's possible to check by myself,) with Z or sth header file, some syntax magic since iirc c++17, with some obscure "auto" special meaning introduced in another newer standard in last decade, and with some new keyword I forgot... but definitely it is explained in the reference of Y or Z. But hey, that's is still a progress, as in the past there was no way to do this. That's a point for java
".