Comes from:
http://www.microchip.com/forums/m935215.aspxWhat makes you think Proteus's simulation of the ADC is accurate? I wouldn't be surprised to find it doesn't support simulation with /CS hard grounded.
I wouldn't entirely trust Proteus's PIC simulation either, as it has a certain reputation for running code that appears to work OK but doesn't work properly on real hardware.
I've looked at the MCP3551 datasheet in some detail, and it looks like the *ONLY* way you can guarantee bit alignment in the data transfer with /CS grounded is if your MCU controls power to the ADC. Otherwise any glitch on the SCK line will result in an off by one error, and there is no pattern in the data that can be used to resynchronise. If you don't have a pull-up/down resistor on the SCK pin to bias it towards its idle state there is a high probability that the floating pin during startup will glitch SCK.
Connect a DSO with protocol analyser and waveform export to the real hardware and find out what's actually happening, or at the very least show us the Proteus waveforms and the output of its SPI analyser, annotated in a graphics package to show us what you think is a problem.