Can an unitialised bit change it's state?

[Circlotron]

Background to the question - I used several bits in a particular RAM byte as flags. They would be set at power up if certain external conditions were yes. The mistake I made was not clearing the RAM first, and so sometimes those bits that should have been clear would be randomly set... 

So, the question is, if a bit is not specifically set or cleared at power up, can it be kind of borderline halfway and perhaps be read as a 0 for a while and later drift be read as a 1?  Sort of like when an input pin is left floating and eventually drifts across the low/hi threshold.
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I never picked up this non-cleared RAM problem until just now. HC908 micros never gave a problem for quite a few years. Switched to S08PA micros three years ago and still no problems. Then switched to S08FL because of chip shortages and this is where it all started. Those micros have been a pain in the butt for a number of reasons, but it's an ill wind that blows nobody no good. At least I found a bug that I probably wouldn't have otherwise. 

[ejeffrey]

No.  SRAM is bistable.  It will land on a 0 or 1 within nanoseconds after the power rail is stable and stay there indefinitely.  DRAM will be driven to a logical state at the first read or refresh

[Geoff-AU]

SRAM will pick a state and stay there

DRAM will be refreshed and whatever state is read the first time will be reinforced by the refresh so it'll stay there too

but *.RAM being in an unknown state at startup is an important paradigm to be aware of.  Your startup sequence should initialise anything it's using in RAM to a known state (the C compiler does this for simple variables but if you're assigning a flag to a fixed RAM address then the compiler won't automatically zero it for you).  Also..  if you assign but don't initialise an array then its contents will be whatever was in that memory beforehand.

[srb1954]

No.  SRAM is bistable.  It will land on a 0 or 1 within nanoseconds after the power rail is stable and stay there indefinitely.

Unless it is hit by a powerful cosmic ray.

[free_electron]

No.  SRAM is bistable.  It will land on a 0 or 1 within nanoseconds after the power rail is stable and stay there indefinitely.

Unless it is hit by a powerful cosmic ray.

one alpha particle is enough ...

[Circlotron]

Okay. I'll put something like the following in right at the start.

Code: [Select]

CLRX
CLR_LOOP CLR $40,X
        DBNZX CLR_LOOPIt would only clear the first 256 bytes (starting at $40) of course, but my stuff only uses about 50-60 bytes max.

[Circlotron]

I never picked up this non-cleared RAM problem until just now. HC908 micros never gave a problem for quite a few years. Switched to S08PA micros three years ago and still no problems. Then switched to S08FL because of chip shortages and this is where it all started.

Update on this - it turns out it was not the fault of the different micro. When I ported the code to the FL micro I forgot to include the line that specifically clears the flags RAM byte. I should have cleared all used RAM right from the start. If you believe the data sheet then the basic code *should* run on all versions in that micro family, but it ain't so. The DDRs are one example. And the clock setup details...