It just seems they are conservative. When things are specified based on simulation, there is a great level of confidence that real characterization would not improve them by a lot.
Well, the C21 has only one PLL and the x5x only has two PLLs and the GCLK only allow even dividers.
So with the given values you are severly limited.
That would change a little if in the x51 SERCOM, CAN, TC4...TC7, AC, ADC and DAC at least had a maximum input frequency of 120MHz.
And if the CAN-FD in the C21 would allow 80MHz it would work with more than 2Mbit/s, the "10 Mb/s for CAN-FD mode" as stated in the datasheet are not possible with only 48MHz, at least not reliable.
8Mbit/s would be 6tq at 48MHz and 5tq at 40MHz, 10tq at 80MHz and 15tq at 120MHz.
This alone should be a valid reason to actually qualify what the controllers really can do.
And in this context I wonder why the same CAN-FD module supposedly can only do 48MHz in the ATSAMC21, 100MHz in the ATSAME51 and whatever the limit is for ATSAMx7x as it looks like this information is not given in the datasheet.
48 MHz is the maximum frequency for C21. 100 MHz is the typical maximum value for a lot of peripherals that don't need higher clock for D5x/E5x. Having lower value (less than 120 MHz) means that it is easier to meet timing requirements for routing. This is the same reason for introduction of I/O Sets. Too many pin multiplexing options make it very hard to meet timing requirements.
For V7x there are recommended frequencies: "It is recommended to use the CAN clock at frequencies of 20, 40 or 80 MHz." Those are easy to derive from standard PLLs and there is no need for CAN to have a higher clock for real applications.
Well, how do you get 40MHz clock for the CAN in a C21 and 48MHz for the core? You can't.
Likewise you need two PLLs to use 80MHz for the CAN in an E51 while running the core with 120MHz since the PLL and the GCLK can "only" do 200MHz and not 240MHz.
And then you have OEM requirements that CAN-FD controllers must use a clock with multiples of 40MHz.
So you either violate that requirement for the C21 or clock the core at 40MHz as well.
And for E51 you practically have to use both PLLs to run the CAN-FD at 80MHz and the core at 120MHz which means that every other peripheral is locked into that base frequencies as well. Running either the CAN-FD at 120MHz or the core at 80MHz or 160MHz would free the second PLL.
Do I need to use 80MHz or 120MHz for the CAN-FD? Yes, 40MHz only works up to 2Mbit/s.