Comments of Fujitsu 8.bit controllers?

[JoannaK]

I was looking for a low end (sub 1$) microcontroller with some 10-20-30 io and realized that Fujitsu makes some really low-price chips, beating Pic.s and AVR.s on features/price.

I have not seen those used on any system that I know, but these seems to be avaiable on big distributors (like farnell etc) and the price seems to be ok. Otoh, I have no knowledge of the hidden costs (like tools/SW) so I can't compare them. So I decided to open a question here, in case someone with experience can tell if those are any good?

[mikeselectricstuff]

Unless you are into high volumes where a few cents matters, it's not worth the hassle of designing in relatively obscure micros.
I've lost count of the number of my customers who had in the past been pursuaded  into using some oddball micro by an over-enthusiastic sales guy handing out free devbards, only to regret it when they later find long leadtimes, sudden obsolescence, and the hidden problem of very few people being familiar with it, so when their engineer leaves they can't find anyone who knows about it to maintain their products.
Add to that things like subcontract manufacturers not being able to program unusual devices, or needing to buy expensive programmers, or a much more limited choice of programming service providers.   
You have to look very hard at all the potential costs to decide if it is really worth straying away from mainstream, available, widely supported devices from manufacturers with good track records of support, continued availability, good documentation, stable devtools etc.

[senso]

STM8 8 bits micro-controllers are also some pretty cheap and nice micros, they are more or less common and pretty near identical to avr's.

[HardBoot]

Any micro that can be easily used with simple open source tools for cheap that gets the job done is a good micro.
I have no brand loyalty since every company is bad in their own way.

Wish I could just design my own micro, there's a dead-zone between 8-bit and higher-end... CPLDs somehow end up fitting in some niches.

[JoannaK]

Mike: I agree, and if this was for something even half usefull (or had any money in it) I'd definitely went that way. But I asked this just for my own (stupid) interest. I just like to read and test the cores and systems and see what I can tinker (usually with asm). But quite frankly the price may well be too much for essentially no reward whatsoever with my current income level.


Hardboot: What kind of feature you are looking for? There may be one you have not seen yet?

Also: Designing microcontroller ain't that hard, if you want to try with HLD:s and FPGA.s . Even getting it to produced is possible, but quite frankly it's darn expensive. (seen opencores.org ?)

Generally I tend to like to see odd cores/io:s .. Not most of them are popular or even available for wide masses, but it's interesting to see alternative possibilities alongside these mass-prodced x86 and Arm cores.

[HardBoot]

Hardboot: What kind of feature you are looking for? There may be one you have not seen yet?

If you want to do something high bandwidth, but very simple computing wise, a micro just doesn't have the speed and memory unless you get an expensive($10+) one.
I've been looking at using a PIC32 to drive VGA but the biggest one has only 128KB of memory so I can't do standard 640*480 4-bit, instead 800*600 pixel doubled(400*300) 4-bit.
With a CPLD it can do 640*480 or 800*600 no problem, just a matter of having some RAM stuck on... which makes the CPLD almost as expensive as the micro, but it gets the job done.

I've looked for other micros but it's hard getting non-bga, and if I used BGA, the board itself would cost a lot more, with QFP I can go single-sided.

[amyk]

These seem to be aimed at the automotive industry. There's a lot of relatively obscure MCUs in that area.

[JoannaK]

Hardboot: What kind of feature you are looking for? There may be one you have not seen yet?

If you want to do something high bandwidth, but very simple computing wise, a micro just doesn't have the speed and memory unless you get an expensive($10+) one.
I've been looking at using a PIC32 to drive VGA but the biggest one has only 128KB of memory so I can't do standard 640*480 4-bit, instead 800*600 pixel doubled(400*300) 4-bit.
With a CPLD it can do 640*480 or 800*600 no problem, just a matter of having some RAM stuck on... which makes the CPLD almost as expensive as the micro, but it gets the job done.

I've looked for other micros but it's hard getting non-bga, and if I used BGA, the board itself would cost a lot more, with QFP I can go single-sided.

If you'll need the full size multicolor bitmap, then Parallax Propeller ain't suitable since it lacks necessary amount of internal Ram. But for tiled display it can deliver even higher resolutions.. I can't rember off-hand how many bits/pixel they have made it drive, but it's darn flexible as single chip µC goes.

[HardBoot]

If you'll need the full size multicolor bitmap, then Parallax Propeller ain't suitable since it lacks necessary amount of internal Ram. But for tiled display it can deliver even higher resolutions.. I can't rember off-hand how many bits/pixel they have made it drive, but it's darn flexible as single chip µC goes.

It's a pretty alien thing to me, definately interesting though. Can't even find a normal datasheet like with an avr or pic.

[free_electron]

Wish I could just design my own micro, there's a dead-zone between 8-bit and higher-end... CPLDs somehow end up fitting in some niches.

Go for it ! it ain't that hard. i've done 2 so far in an FPGA. you define an instruction set , write a huge switch case statement in verilog and cram in all the crap you want to do there. one of my machines uses a dataword that holds an instruction and 3 register addresses. i use multiport memory for RAM.

The ADD instruction takes 3 addresses , two are source the last the target.

ADD 01,02,03  adds data of location to location 02 and stores reult in location 3
ADD 01,02,01 adds data of location to data of location 2 and stores result in 01
ADD 01,01,01 adds data of location to itself and stores result to itself.

in other words : this machine has no registers , accumulator or anything. The whole memory is a registerbank. instead of shuffling data around and having to use intermediate registers i simply connect the whole ALU where it needs to be.
the entire machine is pointer operated , only 'load' operations can throw data in a pointer
the pointers have their own little ALU so i can give relative offsets

the instructions are optimized towards a high level language ( similar in keywords to Basic. I wanted it to be as close to 'human readable english' as possible )
there are special instructions to repeat things a number of times.
the repeat instruction throws something in a downcounter and the loop vectors back to the begin address until the memory location hits zero. there is no stack or anything needed
 
For x = 10 to 20 step 2
   blablabla ...
next

Data is 32 bit in my machine. i 'seed' the data with the begin value. the next word in memory contains the step interval , the third word the end clause
 the fourthe the return address and the fifth the continue address.
in machine language :



the above line of code allocates 5 words of RAM :
x = 10
x+1 = 2
x+2 = 20
x+3 loop begin adress
x+4 loop exit address

the ALU gets a machine insutruction
ADD x,x+1,x    ' add the step to the count value and store in the count value
   blablabla ...
IFEQUAL x,x+2,x+4  'compare memory locations of x ( the counter ) and x+2 ( the endvalue ) . if they math load the program counter with the contents of X+4
PC = x+3  ' load progrma counter iwht contents of x+3 ( begin of the loop )

the compiler is very simple to make. i don't care about optimisation of area of instruction packing ar anything else. i'm after speed. one clocktick should do as much as possible. if i need to add two numbers i do not want to waste 2 clockticks moving data to accumulators, one executing tha add and another moving the data back out. it has to happen in 1 tick.

the triple port memory is a dream for that. i can simply preload the source and target addresses on the bus on the falling edge of the previous instruction. the rising edge triggers my ALU and the result of the alu is latched in memory on the next falling edge. it's a kind of peristaltic movement.

my instruction set is expandable. i can define as many opcodes as i want.

[nctnico]

Any micro that can be easily used with simple open source tools for cheap that gets the job done is a good micro.
I have no brand loyalty since every company is bad in their own way.

Wish I could just design my own micro, there's a dead-zone between 8-bit and higher-end...

TI's MSP430 series is a very nice 16 bit microcontroller with many options to choose from. I agree about the open source tools. When a sales rep. tries to sell me a microcontroller my first question is whether the tools are free. If the answer is no then I have no use for it. Another thing to look for in a controller is a flat memory model where the peripherals, RAM and ROM share the same address space. This gives you a better chance the code you write in C can be used on another controller and you don't need to jump through hoops to avoid using pointers.

[HardBoot]

Go for it ! it ain't that hard. i've done 2 so far in an FPGA. you define an instruction set , write a huge switch case statement in verilog and cram in all the crap you want to do there. one of my machines uses a dataword that holds an instruction and 3 register addresses. i use multiport memory for RAM.

I've designed working CPUs in logic simulators, but I use very different architectures from traditional ancient stuff taught in schools.
Hardware interpreter,
concurrent and parallel task management,
no traditional instruction pipelines or registers,
hardware memory access management,
preemptive memory calls and jumps,
priority aware work multiplexing,
program and memory space are separate allocations with PIDs and parent/child PIDs,
unified memory model with communication streams.
32-bit, 8 and 16 bit is useless for anything but trivial tasks and the silicon space needed for 32-bit is puny.

The nice thing about a design that doesn't use monolithic cores is it's actually very lightweight and maximizes resource utilization, there's no performance hit when task switching either, in fact, it can change main task every 4 clocks(while even letting other things(routines) continue with work) so it's pretty much the ideal for a realtime OS.
It's fundamentally limited in scaling but if you want a little thing that can do billions of operations per second well under 1GHz without the waste of multiple cores... yeah.

[bingo600]

STM8 8 bits micro-controllers are also some pretty cheap and nice micros, they are more or less common and pretty near identical to avr's.

But the compilers are $$$$

/Bingo

[senso]

See this:
http://www.chibios.org/dokuwiki/doku.php?id=chibios:articles:stm8_compilers

It seems like the Raisonance compiler is free to use(maybe not for commercial projects).