Author Topic: Comparing "Modern" embedded chip programming languages?  (Read 19913 times)

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Offline captbill

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Re: Comparing "Modern" embedded chip programming languages?
« Reply #100 on: July 18, 2016, 05:03:01 am »
There are also the Wiznet network chips (for wired network) which use SPI. Usually SPI allows the use of FIFOs and DMA.
I've just been playing with these - starting off from knowing nearly zero about ethernet/TCP etc. I got it running pretty quickly - main issue was the datasheet isn't very clear in some places.
The W5500 is pretty cheap, includes the PHY and supports SPI up to something like 80MHz. Because it handles all the low-level stuff, you don't need particularly low latency, just empty the buffer fast enough.
I was using it with a PIC32MZ, which actually has ethernet onboard, but needs an external PHY, but the Wiznet chip just made things really easy so was a good solution for what I was doing.

I ordered a board with the WZ5500.  The board has only the WZ5500 and a bunch of pins in a header.  This will allow me to connect it to any of the uCs I have laying around.  The Wiznet development board was pretty underwhelming in terms of on-chip RAM.

I have a few STM43F boards laying around so I should be able to come up with something.

BTW, the WZ5500 can handle 8 sockets.  More than enough for my needs.

Since you need high throughput the WizNet sounds like the best route . There is someone at the Oberon mailing list that is working with the WizNet.
I specifically remember the "WZ5500" ,as a matter of fact. I would ask around at oberon-request@lists.inf.ethz.ch and you might find what you need.
« Last Edit: July 18, 2016, 06:01:03 am by captbill »
 

Offline rstofer

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Re: Comparing "Modern" embedded chip programming languages?
« Reply #101 on: July 18, 2016, 05:25:04 am »
There are also the Wiznet network chips (for wired network) which use SPI. Usually SPI allows the use of FIFOs and DMA.
I've just been playing with these - starting off from knowing nearly zero about ethernet/TCP etc. I got it running pretty quickly - main issue was the datasheet isn't very clear in some places.
The W5500 is pretty cheap, includes the PHY and supports SPI up to something like 80MHz. Because it handles all the low-level stuff, you don't need particularly low latency, just empty the buffer fast enough.
I was using it with a PIC32MZ, which actually has ethernet onboard, but needs an external PHY, but the Wiznet chip just made things really easy so was a good solution for what I was doing.

around.  The Wiznet development board was pretty underwhelming in terms of on-chip RAM.

I have a few STM43F boards laying around so I should be able to come up with something.

BTW, the WZ5500 can handle 8 sockets.  More than enough for my needs.

I'm in the 'thinking about it' stage.  I have the uC and I will soon have the 5500.  So, do I just grab up the C sample code and call it good?  Do I try to write the code in Ada - I have the ARM toolchain installed but I would have to write my own board support stuff.  Or do I spend money on Oberon and still have to write my own board support stuff.  I'm thinking about it...


Since you need high throughput the WizNet sounds like the best route . There is someone at the Oberon mailing list that is working with the WizNet.
I specifically remember the "WZ5500" ,as a matter of fact. I would ask around at oberon-request@lists.inf.ethz.ch and you might find what you need.
 


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