SWD STM32F446VE bare minimum

[BurnedResistor]

Dear All

I am about to order a pcb designed for the STM32F446VE and multiple peripherals needed for my application. For programming and debug I intended to use the swd connection. However this is the first time I am designing a board for an stm32.

I just wanted to confirm that the board fulfills the bare minimum for me to be able to program and run the chip.

I deleted all the extra peripherals from the gpio to remove the cluster. This is a prototype so it has a switch to constantly hold the chip in reset, a reset button, and the boot wire is not directly wired to a rail but rather uses jumpers to allow me to easily change it while playing around!

Thank you for the help!

[Brutte]

This is a prototype so it has a switch to

Just buy an LQFP100 discovery, desolder uC and solder your stuff.
15eur, 0% risk, 15 minutes of work.
You want your board schematics then copy Discovery. Do not reinvent the wheel.

[BurnedResistor]

I totally agree that that is the easiest option. But I need some parts with some crazy annoying footprints (3x3mm 24pin qfn, lgas etc) that are only really solder able on a custom pcb. Also simply implementing an micron-controller onto your own pcb hardly seems to be reinventing the wheel, but rather using a product in its intended way. I simply wanted to confirm I had everything hooked up right.

However consulting the schematics for the disco is a very good idea, thank you!

Still if anyone sees something blatantly wrong with my design please do tell me

[jmsigler]

Your sch looks correct to me. You can probably take out the switch on nRST and pull it straight to vdd. I have done this in my design and it works fine.

[BurnedResistor]

Your sch looks correct to me. You can probably take out the switch on nRST and pull it straight to vdd. I have done this in my design and it works fine.

Thanks for the advice!

Is there a quick guide to hooking up swd for a processor? I could not find any good documentation from either st or arm on the topic... Am i missing something or is this just not documented very well?

[cnoviello]

The schematics looks ok. However, in all my designs (especially in those using high speed STM32 MCUs, like the F446), I'm also used to add:

• A large electrolytic capacitor between VDD and ground (typically something between 4.7 uF and 10uF is OK - a tantalum capacitor is also OK) no more than 2-3cm away from the chip.
• A small ferrite bead (with an impedance ranging from 600 to 1000 ohm) placed in series between the analog power supply AVDD and digital power supply VDD.

Both of them help a lot reducing EMI emissions and reducing unwanted noise on the AVDD.

Take a look to the AN4488 from ST for a complete reference.

[Brutte]

Your sch looks correct to me.

You have tied AVcc to Vcc. No, no, no.
And that Aref to Vcc just kills the purpose of built-in ADC. This is a 180MHz micro, you know.

Why cannot you buy a lousy 15eur Discovery, rip off all the components STM included only for their heart's content and see how your "design" works?
That 3x3 LGA can be placed on some expansion. I could understand that PCB redesign if you wanted an SDRAM there but doing that for 24pin chip, just to find out there are seventeen other bugs? 

[BurnedResistor]

The schematics looks ok. However, in all my designs (especially in those using high speed STM32 MCUs, like the F446), I'm also used to add:

• A large electrolytic capacitor between VDD and ground (typically something between 4.7 uF and 10uF is OK - a tantalum capacitor is also OK) no more than 2-3cm away from the chip.
• A small ferrite bead (with an impedance ranging from 600 to 1000 ohm) placed in series between the analog power supply AVDD and digital power supply VDD.

Both of them help a lot reducing EMI emissions and reducing unwanted noise on the AVDD.

Take a look to the AN4488 from ST for a complete reference.

I have all that filtering in place I just cut it out the schematic because I simply wanted to check if the SWD was hooked up correctly . Thank you for your thorough help though. Currently the analog section of the board is running on 5v, so the analog supply sits at that voltage. I will probably create a separate 3 analog supply again filtered by a bead after your suggestions. Thank you for linking in the an. Clears up a lot of things.

[BurnedResistor]

Your sch looks correct to me.

You have tied AVcc to Vcc. No, no, no.
And that Aref to Vcc just kills the purpose of built-in ADC. This is a 180MHz micro, you know.

Why cannot you buy a lousy 15eur Discovery, rip off all the components STM included only for their heart's content and see how your "design" works?
That 3x3 LGA can be placed on some expansion. I could understand that PCB redesign if you wanted an SDRAM there but doing that for 24pin chip, just to find out there are seventeen other bugs? 

Thank you for the friendly help. It means a lot. Using a devboard really does not help me but prolongs the problem as I will still have to spin my own pcb at some point which will require a swd connection.

And if it helps you sleep better at night, my "design" ( ) does not use the ADC. I simply hooked it up to AGND and and VDD because those where the signals available on the board, my AVDD runs on 5v. simply if i should need it while debugging and prototyping which I probably wont.

[jmsigler]

Your sch looks correct to me.

You have tied AVcc to Vcc. No, no, no.
And that Aref to Vcc just kills the purpose of built-in ADC. This is a 180MHz micro, you know.

Why cannot you buy a lousy 15eur Discovery, rip off all the components STM included only for their heart's content and see how your "design" works?
That 3x3 LGA can be placed on some expansion. I could understand that PCB redesign if you wanted an SDRAM there but doing that for 24pin chip, just to find out there are seventeen other bugs? 

I guess I was assuming he wasn't using the adc (for anything percision at least), but I should have asked. You are totally right you need better filtering on the adc reference if you are going to be using it heavily.

I disagree on the Discovery. You can learn the same from looking at ST's app notes. There is a better change of missing a trace/component copying it from discovery vs a schematic in an app note.

[ataradov]

While layout of your SWD connector is correct, you have reversed pinout. SWDIO is located on the pin 2.

[BurnedResistor]

While layout of your SWD connector is correct, you have reversed pinout. SWDIO is located on the pin 2.

Oh yes. Thank you