Finally I have not complicated my life with the solution of the CPLD, I have designed the new board with the original schemes, but I have reduced the size of all the components, and all that have been possible, which are the majority I have put SMD ( on the original board are all THT).
All the passive components are now 0402, the 74HCxx in TSSOP, PAL in TSSOP, the eprom in PLCC32, the crystal of 3.2x2.5mm and the RAM that is now in SOIC I will replace it for a TSOP.
The processors have not been able to reduce them, the TS68000 stays in PLCC and the other processor in DIP mounted in socket. As I assemble all my boards with my own Pick and Place, a Neoden4, assembly time is not a problem, it is very fast and convenient.
However, I would like, when I have time, to learn how to program CPLD, I'm sure I give it some use with new designs, or to redesign old boards.