I am new here, so apologies if anything I do is not exactly protocol.
I have a problem with a dsPIC33EV256GM102 chip with MPLAB X 6.00:
I run into the following error when programming/debugging: "Failed to program device"
This problem usually is because of choosing the wrong programming pins or incorrect wiring, but here are all the things I've done to try solve the issue:
I have checked the ICDS pin selection.
I have checked and confirmed continuity from the PICKIT to the pins on the IC.
I have tried both powering the device with the PICKIT and externally.
I have tried other versions of MPLAB X (5.4 and 6.1)
I have tried a different PC.
I have tried a different PICKIT (also 3)
I have another almost identical PCB that works fine.
Here's where things get weird:
I have unsoldered the chip and replaced it with another PIC and have the same problem.
The problem momentarily went away for a while with no physical changes.
Attempting the debug (as opposed to programming) made the problem come back.
Here are my config stuff (Programmer is connected to pins 1, 14 and 15):
// FSEC
#pragma config BWRP = OFF // Boot Segment Write-Protect Bit (Boot Segment may be written)
#pragma config BSS = DISABLED // Boot Segment Code-Protect Level bits (No Protection (other than BWRP))
#pragma config BSS2 = OFF // Boot Segment Control Bit (No Boot Segment)
#pragma config GWRP = OFF // General Segment Write-Protect Bit (General Segment may be written)
#pragma config GSS = DISABLED // General Segment Code-Protect Level bits (No Protection (other than GWRP))
#pragma config CWRP = OFF // Configuration Segment Write-Protect Bit (Configuration Segment may be written)
#pragma config CSS = DISABLED // Configuration Segment Code-Protect Level bits (No Protection (other than CWRP))
#pragma config AIVTDIS = DISABLE // Alternate Interrupt Vector Table Disable Bit (Disable Alternate Vector Table)
// FBSLIM
#pragma config BSLIM = 8191 // Boot Segment Code Flash Page Address Limit Bits (Enter Hexadecimal value)
// FOSCSEL
#pragma config FNOSC = FRC // Initial oscillator Source Selection Bits (Internal Fast RC (FRC))
#pragma config IESO = ON // Two Speed Oscillator Start-Up Bit (Start up device with FRC,then automatically switch to user selected oscillator source)
// FOSC
#pragma config POSCMD = NONE // Primary Oscillator Mode Select Bits (Primary Oscillator disabled)
#pragma config OSCIOFNC = ON // OSC2 Pin I/O Function Enable Bit (OSC2 is general purpose digital I/O pin)
#pragma config IOL1WAY = OFF // Peripheral Pin Select Configuration Bit (Allow Multiple reconfigurations)
#pragma config FCKSM = CSDCMD // Clock Switching Mode Bits (Both Clock Switching and Fail-safe Clock Monitor are disabled)
#pragma config PLLKEN = ON // PLL Lock Enable Bit (Clock switch to PLL source will wait until the PLL lock signal is valid)
// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler Bits (1:32,768)
#pragma config WDTPRE = PR128 // Watchdog Timer Prescaler Bit (1:128)
#pragma config FWDTEN = OFF // Watchdog Timer Enable Bits (WDT and SWDTEN Disabled)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable Bit (Watchdog timer in Non-Window Mode)
#pragma config WDTWIN = WIN25 // Watchdog Window Select Bits (WDT Window is 25% of WDT period)
// FPOR
#pragma config BOREN0 = OFF // Brown Out Reset Detection Bit (BOR is Disabled)
// FICD
#pragma config ICS = PGD2 // ICD Communication Channel Select Bits (Communicate on PGEC2 and PGED2)
// FDMTINTVL
#pragma config DMTIVTL = 0x0 // Lower 16 Bits of 32 Bit DMT Window Interval (Enter Hexadecimal value)
// FDMTINTVH
#pragma config DMTIVTH = 0x0 // Upper 16 Bits of 32 Bit DMT Window Interval (Enter Hexadecimal value)
// FDMTCNTL
#pragma config DMTCNTL = 0x0 // Lower 16 Bits of 32 Bit DMT Instruction Count Time-Out Value (Enter Hexadecimal value)
// FDMTCNTH
#pragma config DMTCNTH = 0x0 // Upper 16 Bits of 32 Bit DMT Instruction Count Time-Out Value (Enter Hexadecimal value)
// FDMT
#pragma config DMTEN = DISABLE // Dead Man Timer Enable Bit (Dead Man Timer is Disabled and can be enabled by software)
// FDEVOPT
#pragma config PWMLOCK = ON // PWM Lock Enable Bit (Certain PWM registers may only be written after key sequence)
#pragma config ALTI2C1 = OFF // Alternate I2C1 Pins Selection Bit (I2C1 mapped to SDA1/SCL1 pins)
// FALTREG
#pragma config CTXT1 = NONE // Interrupt Priority Level (IPL) Selection Bits For Alternate Working Register Set 1 (Not Assigned)
#pragma config CTXT2 = NONE // Interrupt Priority Level (IPL) Selection Bits For Alternate Working Register Set 2 (Not Assigned)[/list]