Author Topic: EtherCAT Microchip LAN9252 Implementation  (Read 2284 times)

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Offline thedrummer2016

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EtherCAT Microchip LAN9252 Implementation
« on: May 14, 2018, 02:24:11 pm »
Hello Everyone,

Does anyone have any experience with Microchip's LAN9252 EtherCAT Slave Controller?

I have an application that I need to setup an EtherCAT slave with CANopen over EtherCAT (CoE) and I purchased a Microchip EVB-LAN9252-3PORT demo board to test the technology but I am having very little luck getting it operational and finding very little documentation on their software stack. I have been creating case after case through microchips website and still not getting the answers I need so I am hoping someone here can help.

A little background info: I have joined the EtherCAT group and used the SSC tool to create my own profiles for the board but I cannot even get the supplied project files from Microchip to work per their startup guides. I followed their guides to no avail so I figured loading in the factory supplied demo files would surely work but no luck.

Any help is much appreciated!
« Last Edit: May 14, 2018, 06:40:39 pm by thedrummer2016 »
 

Offline Hypernova

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Re: EtherCAT Microchip LAN9252 Implementation
« Reply #1 on: May 15, 2018, 02:31:45 am »
What I made with LAN9252 for SPS Nuremberg 2016 (controller is RPi3)


For the 2017 show (controller is i.MX6):


The slave stack code for the 2016 demo didn't use the SSC, it used a minimal implementation that did PDO in Freerun as I didn't have access to the conformance test tool at the time. By the 2017 demo I have switched to a heavily modified SSC that passes all the tests. As well as DC sync so that all inverter PWM cycles for all drives are in sync.

Things to keep in mind:
* You need an SII in the EEPROM that is good enough to boot the LAN9252, otherwise not even the 0x12345678 test read register would work as the entire chip won't boot. This is one of among many WTF worthy design decisions Microchip made.
* Don't let the claim of fast SPI bus fool you. The insane register indirect access scheme completely nullifies the high clock frequency advantage as you have to constantly baby the SPI bus for even simple int32 register reads.
* Comment out stuff to do with timeouts in the SSC (and comment out most of the SSC except for the ESM portion) and run the thing in a main() while(1) loop. Start simple, slowly uncomment as your unit tests reach those area.
* The SSC does not give a complete implementation example for the CoE part. Especially with Object Dictionary access. You need to write your own SDO access calls.
* It really helps if you had experience implementing the CANopen stack.
* Get your hand on the official test tool or at least tools like https://sourceforge.net/projects/ethercat-explorer/ that generate simple test commands. With protocol development initially you will be doing a lot of whack-a-mole with unit test failures. You need a proper test tool, TwinCAT is not that tool.
* While Beckhoff claims that EtherCAT is a free standard that applies only if you don't sell EtherCAT products. To sell EtherCAT products they must be tested against the CTT and that has an annual subscription fee. The real rub is if you stop paying the subscription you must recall your existing products from the market.

At the end I only kept the Mailbox and ESM AL part of SSC, everything else was custom. For extra points in masochism I am using a C2000 based MCU where a single char in 16bits. As comparison in complexity - excluding the low level Object Dictionary access which is shared with the EtherCAT stack my CANopen stack was >2k lines of code. The EtherCAT equivalent is about 3x that.
 
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Offline thedrummer2016

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Re: EtherCAT Microchip LAN9252 Implementation
« Reply #2 on: May 15, 2018, 08:51:59 pm »
That's pretty impressive! Thanks for sharing the videos and things to keep in mind.

Can you point me in the direction of good support documentation as I am a newbie when it comes to both ethercat and canopen. Ultimately my application will need to communicate digital and analog data to a motion controller over CoE. I have been staring at EtherCAT standards docs along with Microchip support docs but am still not finding all of the information I need. I have loaded the factory supplied SDK files which do not work. I have also created my own program files and loaded per their documentation but they don't work as described either. In particular, their documentation describes a setup that simply maps 8 bits of inputs and outputs from a PIC32MX controller through the LAN9252. When I load the project the board boots and comes up to OP mode but the IO does not work.

Any help you can provide would be greatly appreciated!
« Last Edit: May 15, 2018, 08:54:37 pm by thedrummer2016 »
 

Offline Hypernova

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Re: EtherCAT Microchip LAN9252 Implementation
« Reply #3 on: May 16, 2018, 09:19:02 am »
Because you are doing CoE like I said before you need to be familiar with CANopen as a foundation. The first spec to read is the CiA 301 specification that explains what SDO and PDO is. For the SSC example you need to set it to generate examples with CoE in one of the options. The default will give you example for an EtherCAT I/O module profile as you found out.
 
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