SUCCESS!

The STM32U5's feature support for RDY to signal the SPI peripheral's readiness to transfer data. I decided the easiest strategy to have one long data transfer with carefully timed gaps in the middle was to leverage RDY, since RDY low causes the SPI transfer as well as its clock to suspend completely, effectively gating the transfer. While the ADC I'm using doesn't generate RDY, it does have Data Ready Line (DRL) which is useful for generating an RDY signal.
I needed RDY to be a pulse 32 SCK cycles wide, starting just after the falling edge of DRL. I used the falling edge of DRL as a slave trigger for TIM3, with TIM3 configured in PWM mode 2 (one pulse mode) and then patched this to the RDY pin. Turns out there's some latency between DRL trigger and the TIM3 pulse, as well as between the RDY rising edge and commencement of SCK, that meant I had a bunch of dead time I didn't want. So I switched to using the preceding rising edge of DRL instead and added delay to the pulse as necessary to place the SCK in the window I wanted. You can see the delays in the attached LA output.
I don't know how deterministic the latencies are, and this seems kind of open loop / fragile / prone to timing error. I'm stretching my (very recently developed) abilities in this field already so barring any brilliant ideas from others I'm stopping here for now. Also the last byte of the 32 bits is useable as a check bit, and in a few hundred samples taken I haven't seen a read error. I guess I have to do some more rigorous testing for errors, including under various MCU load conditions.
At 40Mhz SCK clock I'm just slightly over the target of 740ns to complete my 32bit read. I could drop the last byte (check byte) and be compliant but I like the idea of keeping it to catch data errors. Adjusting the prescaler to give 80Mhz is overkill, so I may need to tweak the clock config register values I copied from the CubeMX HAL code to get me something around 50MHz.
Then I need to figure out how to properly sleep/stop mode the MCU without impacting DMA. This MCU has Low Power Background Autonomous Mode (LPBAM), LPDMA, LPTIM, and all sorts of low power stuff I'm not yet sure I should be using.