| Electronics > Microcontrollers |
| GCC compiler divmod call generation for Cortex-M0 |
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| coppice:
--- Quote from: westfw on January 04, 2025, 10:11:48 pm --- --- Quote --- it's just less than optimal code generation. --- End quote --- gcc support for ARMv6m (Cortex M0, M0+) isn't great. Another example is that there is no "optimized" floating point code (there IS for ARMv7m), so any use of floats on CM0 brings in the rather bloated and slow C version from gcc. --- End quote --- Very few people implementing GCC for a machine without an FPU have bothered to do much about that slow C code implementation of floating point. I think it was only intended as a "get you started" version of floating point, so I don't think they even tried to make it as good as you can get with C. I started to do work on it at one point, but got distracted. |
| SiliconWizard:
For those who want faster FP on the M0/M0+, you should definitely look at the RPi's implementation for the RP2040. I don't know what license it is, so whether you're allowed to use it on other targets. Something to look at. If I'm not mistaken, it's based on this implementation, which for sure you can freely (GPL 2) use: https://www.quinapalus.com/qfplib-m0-full.html |
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