Electronics > Microcontrollers

GD32F4 flash banks

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Takkie:
Good day everyone :)
I am using the GD32F407VGT6 MCU in a project and I want to enable easy firmware updates by using 2 flash banks and switching between them using address mapping.
The chip apparently supports these features but I cannot figure out what to do here exactly.
Specifically, there is somewhat conflicting information in the user manual:
Option bytes contains a bit named "BB" (guess this stands for boot bank) in register FMC_OBCTL0 which has the following documentation:
0: Boot from bank0, when configured boot from main memory
1: Boot from bank1 or bank0 if bank1 is void, (or Bootloader continues executing if 
bank1 and bank0 are both void, and the chip is not under security protection 
level high,) when configured boot from main memory.

On the other hand there is a bit named "FMC_SWP" in register SYSCFG_CFG0 with this documentation:
This bit controls the address mapping swap between Bank 0 and Bank 1 of the Main 
Flash.
0: Main Flash Bank 0 is mapped at address 0x0800 0000 and Main Flash Bank 1 is 
mapped at address 0x0810 0000
1: Main Flash Bank 1 is mapped at address 0x0800 0000 and Main Flash Bank 0 is 
mapped at address 0x0810 0000

I tried setting both those bits with no success. The MCU just continues execution as if nothing happened.
I know option bytes have to be unlocked, I can change other values in option bytes without problems, so I assume I unlock the option bytes correctly.
I have not read anything about having to unlock syscfg registers. I just enabled the clock for the syscfg peripheral and tried to set the register but to no avail.

Does anyone have experience using dual flash banks on this GD32 MCU or GD32 in general?
Any help would be greatly appreciated.

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