Rarely I used ALL peripherals. But it is common for me to have a few SPIs, a couple UART, 4+ PWM channels, and a couple timers + 1-2 adc channels.
The incorporation of CPLD/FPGA into a mcu is certainly quite interesting. I was simply trying to get a sense as to how many of those peripherals you can create with 4 UDBs.
Here is an example from a device of mine.
This device has 9 8-bit PWMs, 4 16-bit PWMs, I2C port. Report of used resources:
Resource Type : Used : Free : Max : % Used
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Digital clock dividers : 1 : 3 : 4 : 25.00%
Pins : 36 : 0 : 36 : 100.00%
UDB Macrocells : 9 : 23 : 32 : 28.13%
UDB Unique Pterms : 15 : 49 : 64 : 23.44%
UDB Total Pterms : 21 : : :
UDB Datapath Cells : 3 : 1 : 4 : 75.00%
UDB Status Cells : 0 : 4 : 4 : 0.00%
UDB Control Cells : 0 : 4 : 4 : 0.00%
Interrupts : 1 : 31 : 32 : 3.13%
Comparator/Opamp Fixed Blocks : 0 : 2 : 2 : 0.00%
SAR Fixed Blocks : 0 : 1 : 1 : 0.00%
CSD Fixed Blocks : 0 : 1 : 1 : 0.00%
8-bit CapSense IDACs : 0 : 1 : 1 : 0.00%
7-bit CapSense IDACs : 0 : 1 : 1 : 0.00%
Temperature Sensor : 0 : 1 : 1 : 0.00%
Low Power Comparator : 0 : 2 : 2 : 0.00%
TCPWM Blocks : 4 : 0 : 4 : 100.00%
Serial Communication Blocks : 1 : 1 : 2 : 50.00%
Segment LCD Blocks : 0 : 1 : 1 : 0.00%
Although there are a lot of UDB macrocells left, but since 3/4 datapath cells are used, it'd say 3/4 of logic resources is used.
Opamps, ADC, CSD, IDACs, Comparators, LCD, and a communication block(I2c/serial/SPI...) are still free.
Note that sometimes there are more efficient user components than the ones that are in Creator by default. In this case those 9 8-bit PWMs are built from 3 UDB blocks while 4 16-bit PWMs are using dedicated TCPWM modules.
So in this case i needed a lot of PWMs and got them by using dedicated blocks + UDBs. in annother device those UDBs could be used for additional serial/i2c stuff or those dedicated TCPWM blocks could be used as counters.
Not sure if this is a good enough example to show PSoC flexibility, but i just started with PSoC and don't have anything more interesting.