How do I probe an MCU which needs pullups/downs on start-up?

[petemate]

Hi everyone,

I'm working on probing a system based on an ST10R172L MCU - Its an older device which is configured to run as 16 bit data and 24 bit address buses. This configuration is set by pullups/downs on PORT0(16 bits). Each pin in PORT0 has an internal pull-up, so the way to change config is to add external pull-downs, thus setting bits for various settings, e.g. data bus width, whether or not the bus is multiplexed and XTAL PLL multiplication factor. These values are read at reset/power-up, saved to a special register, and then PORT0 is configured according to whatever its config registers are set to(GPIO, special function, etc).

The problem is that when I hook up my logic analyzer, it loads the line enough to pull down all pins on PORT0, thus forcing an erroneous config.

Here is a waveform without the analyzer connected:



Here is a waveform with the analyzer connected:



Here is the equivalent circuit of the logic analyzer:



As you can see, the logic analyzer poses 100k to ground, so its quite puzzling that such a high value can pull down from 3.3V to 0.8V. However, it does match with the datasheet of the "PORT0 configuration current", which says that you can't pull more than 4uA and have the port read as high(am I reading that right?):



So my problem is, how the hell do I hook this PORT0 thing up to my logic analyzer without dragging down the config. Is there really nothing to do but to add some sort of buffer? This couldn't have been an uncommon a problem in the old days(pre JTAG, SWD and whatnot), so maybe some old-timers can tell me how to approach this?

Thanks!

[Kim Christensen]

I'd try adding some external pullup resistors on the lines loaded by your analyzer. Try maybe 10K?

[petemate]

I'd try adding some external pullup resistors on the lines loaded by your analyzer. Try maybe 10K?

Thats a a great idea - don't know why I didn't think of that! Thanks!