How does STM32F429ZI MAC controller know when collision occurs?

[syntax333]

Hi I am currently working on a project where I have to implement TCP/IP stack on STM32F429ZI 144 pin nucleo board.
Board has PHY chip.My question is how does the MAC controller knows when a jabber or collision event occurs since these events are handled by PHY chip.
PHY chip shown in schematic for nucleo board, has no connections other than RMII (like error interrupt pin?) to STM32 MCU.

[Scrts]

It depends on errors, but either CRS_DV (Data Valid) will not be raised within incoming RXD or RX_ERR will be raised.

[syntax333]

I thought maybe MAC controller reads status register after each transmission but without knowing status register offset and corresponding bits for error its highly unlikely

[Doc Daneeka]

If it's a regular 100 Mbit twisted pair PHY, there is no collision signal because there are no collisions: this type of Ethernet is point to point full duplex.