How Fast Could Serial Bits, Read from a Table in SRAM, Be outputted?

[KerimF]

Hi all,

Please note that the purpose of this topic is validating the well-known saying: “Necessity is the mother of invention... or innovation”.

I had an ATmega8 and an 8 MHz crystal for it. I needed to output as fast as possible a delta bit stream (its bits are stored as bytes in the MCU SRAM space) whose size could be 96 up to 103 bits.
The outputted serial bits are supposed to generate, after filtering, a sinewave signal.

I ended up, after many months (being not very smart), writing a code (not trivial) that outputs the bits (read from a SRAM table) at a rate of 4 MCU cycles (0.5 us). Therefore, in case of delta Nbits per cycle, the frequency of the generated sinewave is:
F_sine = 1 / (4 * MCU_cycle * Nbits)

Nbits= 96  ==> 20,833 Hz
Nbits= 97  ==> 20,619 Hz
Nbits= 98  ==> 20,408 Hz
Nbits= 99  ==> 20,202 Hz
Nbits= 100  ==> 20,000 Hz
Nbits= 101  ==> 19,802 Hz
Nbits= 102  ==> 19,608 Hz
Nbits= 103  ==> 19,417 kHz

Obviously, the sinewave loop, while running (generating the sinewave), needs to detect the last bit in the SRAM table and restart from the first bit without taking any extra MCU cycle.

For instance, while 96 bits are saved in 12 bytes (12*8-bit), the 97 to 103 bits per cycle have to be saved with an extra byte to include the extra bits, MOD(Nbits,8).
And, in a practical application, if Nbits is odd, the bit stream should be made for 2 sinewave cycles instead of one. For example, if Nbits=97, the size of the bit stream is 194 bits, saved in 24+1 bytes (the extra byte is for the remaining 2 bits).
 
Sorry, I don’t think any of the readers here has an idea now on how to write such a fast code; not because I am smarter than others but because no one likely ‘needed it’, as I did, in the first place. But, if someone did (needed it), he surely found out how to do it.
For instance, I will be surprised really if someone will be able to find the solution by searching it in the internet.

I will post my work after hearing some serious comments.

Have fun,
Kerim

Added:
Please note that I attached how I did the 4-cycle_per_bit.asm on reply #20

[DavidAlfa]

No idea what are you talking about. Where do these "stream bits" go to?
Are you making a sort-of pwm modulation with those bits?

"After many months"... Why? Using a prehistoric atmega in 2023 is totally no sense, you have lots of *much* faster, cheaper devices!

[bingo600]

Maybe Jesper's minidds

http://www.radanpro.com/Radan2400/mikrokontroleri/Jesper%27s%20AVR%20pages%20-%20MiniDDS.htm

[westfw]

I will be surprised really if someone will be able to find the solution by searching it in the internet.

Also 4 cycles/bit (including clock manipulation):  http://nerdralph.blogspot.com/2015/03/fastest-avr-software-spi-in-west.html
(Didn't find it by searching; I remember when Ralph announced it on AVRFreaks)
Using the hardware you can do 2 cycles/bit - people have used the UART (in "SPI Mode") to produce bit-banged video.

[KerimF]

No idea what are you talking about. Where do these "stream bits" go to?

They will go to a LPF (acting as a buffer too) as in the case of basic delta modulation/demodulation.
 

Are you making a sort-of pwm modulation with those bits?

No, I am just making the MCU acts as a conventional delta modulation at a relatively high rate (2 MHz in the presented example),
You surely heard of DDS (Direct Digital Synthesis). What I did could be called DSS (Delta Sinewave Synthesis).
While DDS requires an R-2R ladder, DSS just needs a somehow simple LPF, at one MCU pin, which can cover a relatively wide spectrum.
But there is always a price when the hardware is simplified, the DSS code for generating the delta stream table (satisfying a certain criteria) for every frequency is not simple at all, as it is the case for DDS. This explains why all programmers didn't think about it. Most of them, unlike I, have the privilege to use other advanced alternatives; exactly as you kindly point it out.

Just for knowledge, due to world's regulations made by the World's Elite Group since many decades ago, I don't have the privilege to order any component (I have to rely on the local retailers only) or access any site providing technical services (as advanced compilers for PCs or MCUs) to almost all engineers in the world, for free or paid. So, I have to use the prehistoric C compiler for DOS (of Borland C 3.1, I bought in the 80's) whenever I need to write a program for an in-house application. Naturally, I used to write all my MCU codes (for Z80, C51 then AVR lately) in assembly language only.

So be glad that you can get whatever you may need as tools and devices, for free or not.
On my side, I simply enjoy thinking out of the box every time I design a product for the local consumers while using prehistoric tools and components

[DavidAlfa]

Yeah, well, similar to pwm anyways.
Ah yeah, the world power countries are totally bullies.
Like China and EEUU right now.

[KerimF]

Maybe Jesper's minidds

http://www.radanpro.com/Radan2400/mikrokontroleri/Jesper%27s%20AVR%20pages%20-%20MiniDDS.htm

Thank you for the interesting site.

As you know, DDS hardware needs an R2R ladder.
What I try saying here is using just one MCU output to generate sinewaves covering a relatively wide spectrum (20 kHz, 96 bits, down to about 650 Hz, 3088 bits). One LPF works for all, by making the delta bit rate (2 MHz here) much higher than the generated frequencies. The MCU firmware acts as a basic delta modulation to synthesize sinewaves.

[langwadt]

No idea what are you talking about. Where do these "stream bits" go to?

They will go to a LPF (acting as a buffer too) as in the case of basic delta modulation/demodulation.
 

Are you making a sort-of pwm modulation with those bits?

No, I am just making the MCU acts as a conventional delta modulation at a relatively high rate (2 MHz in the presented example),
You surely heard of DDS (Direct Digital Synthesis). What I did could be called DSS (Delta Sinewave Synthesis).
While DDS requires an R-2R ladder, DSS just needs a somehow simple LPF, at one MCU pin, which can cover a relatively wide spectrum.
But there is always a price when the hardware is simplified, the DSS code for generating the delta stream table (satisfying a certain criteria) for every frequency is not simple at all, as it is the case for DDS. This explains why all programmers didn't think about it. Most of them, unlike I, have the privilege to use other advanced alternatives; exactly as you kindly point it out.

Don Lancaster wrote about "magic sinewaves" 20 years ago, https://www.tinaja.com/magsna1.shtml

[KerimF]

Yeah, well, similar to pwm anyways.

Sorry, I didn't know that a delta modulation with a bit rate of 2 MHz (using 8 MHz crystal) could be seen as PWM.

[KerimF]

Don Lancaster wrote about "magic sinewaves" 20 years ago, https://www.tinaja.com/magsna1.shtml

Thank you too for the interesting site.
I will have a look at it.
I am curious to know the fastest rate (in MCU clock) of the delta serial bits that was achieved... 20 years ago

[KerimF]

I will be surprised really if someone will be able to find the solution by searching it in the internet.

Also 4 cycles/bit (including clock manipulation):  http://nerdralph.blogspot.com/2015/03/fastest-avr-software-spi-in-west.html
(Didn't find it by searching; I remember when Ralph announced it on AVRFreaks)
Using the hardware you can do 2 cycles/bit - people have used the UART (in "SPI Mode") to produce bit-banged video.

Thank you for the good reference.

My first attempt to produce delta serial bits was by using SPI. Unfortunately, the SPI protocol adds an idle state (at best, 1 MCU cycle and half, low or high which depends on the SPI user's configurations) between two consecutive transmitted bytes. This complicated the generation of the delta bit streams to achieve a low THD sinewave in certain situations. I finally decided to drop SPI and found instead a direct way to output a bit in 4 cycles while outputting the cyclic sequence of the sinewave bits.
 

[DavidAlfa]

I guess you're using an atmega8L (Which is 8MHz limited by spec), but did you know you you can easily overclock it to 16MHz (And even more) powering it with 5-5.5v ?
https://www.edaboard.com/threads/raising-atmega8l-speed-to-16-mhz.11601/

So you can't access any technical information but you can access the web freely?
Couldn't you enter any site and download a compiler right now?
Or get it sent by someone to your email?

I had a friend in Cuba circa 2006 with the same issues, the libraries had literature about electronic valves (at best), I remember burning and sending him several DVDs with datasheets, books, programs, lots of stuff for PICs, even some PICs I had from free samples, but it arrived opened and empty.

[westfw]

Unfortunately, the SPI protocol adds an idle state (at best, 1 MCU cycle and half, low or high which depends on the SPI user's configurations) between two consecutive transmitted bytes.

The AVR UART in SPI mode doesn't have the extra bit (it's double-buffered on Xmit), which is why the video hackers used it instead of the SPI interface...

[peter-h]

Why not just have a table in RAM, DMA in circular mode, and either feed the internal 12 bit DAC (use a timer to set the sample rate) or get the DMA to send the data to SPI to feed an external DAC? I've done this and once you work out the config for everything, it is pretty easy and works great. Arbitrary waveform generation with no CPU software running whatsoever.

[KerimF]

I guess you're using an atmega8L (Which is 8MHz limited by spec), but did you know you you can easily overclock it to 16MHz (And even more) powering it with 5-5.5v ?
https://www.edaboard.com/threads/raising-atmega8l-speed-to-16-mhz.11601/

Thank you for your remark.
In my actual application, only the audio spectrum is of interest (20 kHz down to 20 Hz).
By using a 16 MHz crystal, I will get frequencies higher than 20 KHz [40 KHz and lower). This may be useful in some other applications.
 

So you can't access any technical information but you can access the web freely?
Couldn't you enter any site and download a compiler right now?

Yes, I can access the web pages. But, meanwhile, I got apologies from many technical sites for not being allowed to open their door for me; otherwise they break their rules.

Or get it sent by someone to your email?

I used to respect other's rules. So, I use only the genuine programs which I was able to download legally. For example, I use LTspice IV which I downloaded before Linear Technology was acquired by Analog Device, and AVR Studio 6.2, before Atmel was acquired by Microchip.

I had a friend in Cuba circa 2006 with the same issues, the libraries had literature about electronic valves (at best), I remember burning and sending him several DVDs with datasheets, books, programs, lots of stuff for PICs, even some PICs I had from free samples, but it arrived opened and empty.

It is good to know that you are friendly. Some Americans friends also offered me their help in this respect. They are kind, but I don't like using other's works if I am not allowed to download them directly from their source.

[KerimF]

Unfortunately, the SPI protocol adds an idle state (at best, 1 MCU cycle and half, low or high which depends on the SPI user's configurations) between two consecutive transmitted bytes.

The AVR UART in SPI mode doesn't have the extra bit (it's double-buffered on Xmit), which is why the video hackers used it instead of the SPI interface...

Thank you very much for this info. I missed it. Soon, I will have a look at this feature.
And, just to be sure, I guess you mean that this also applies on ATmega8L (or ATmega8A which could be available too at our local retailers).
Thank you.

[Sacodepatatas]

Why not just have a table in RAM, DMA in circular mode, and either feed the internal 12 bit DAC (use a timer to set the sample rate) or get the DMA to send the data to SPI to feed an external DAC? I've done this and once you work out the config for everything, it is pretty easy and works great. Arbitrary waveform generation with no CPU software running whatsoever.

I don't remember that the atmega8 had a DMA peripheral. But there is a ton of MCS51's that have high speed DMA, for example, those of the cypress FX2LP series.

[KerimF]

Why not just have a table in RAM, DMA in circular mode, and either feed the internal 12 bit DAC (use a timer to set the sample rate) or get the DMA to send the data to SPI to feed an external DAC? I've done this and once you work out the config for everything, it is pretty easy and works great. Arbitrary waveform generation with no CPU software running whatsoever.

Thank you for presenting this interesting method which is surely a more practical way to generate waveform by delta serial bits.

My problem is that I just have ATmega8 in quantity and it is not suitable for it.
Since I can't get advanced AVR MCUs or DAC ICs, I had to think out of the box to let the humble ATmega8 do the job.

For instance, I had to also write a code to generate/save the delta table of every sinewave frequency of interest (set by the delta Nbits per cycle). In the actual application, there are 970 frequencies, covering the audio spectrum. This is done while scanning a range of 'delta steps' to find out the sinewave that satisfies a certain criterion. For this code, and as an in-house tool, I had to get one ATmega32 for having 2K SRAM instead of 1K (ATmega8) since the largest Nbits is 3088, besides the space needed for the sine (and cosine) table from which the delta bits could be generated (for a certain 'delta step').

[KerimF]

Why not just have a table in RAM, DMA in circular mode, and either feed the internal 12 bit DAC (use a timer to set the sample rate) or get the DMA to send the data to SPI to feed an external DAC? I've done this and once you work out the config for everything, it is pretty easy and works great. Arbitrary waveform generation with no CPU software running whatsoever.

I don't remember that the atmega8 had a DMA peripheral. But there is a ton of MCS51's that have high speed DMA, for example, those of the cypress FX2LP series.

You are right.
Perhaps, someday, I will have the chance to order such MCUs; assuming I will be allowed to download the assembler of this advanced family.
I have C51 assembler for the ATMEL old MCUs.

[peter-h]

OK; being in Syria you probably can't get modern chips, which is sadly a sign of the times but understandable since they would get shipped straight to Russia... and then sent to Ukraine

[KerimF]

Although this is not important to many of you, but to complete the topic as I promised I attached my work ‘4-cycle_per_bit.asm’.
Thank you all for your valuable technical comments.

[ComradeXavier]

It got stuck in my mind that it should be possible to clock out a cyclic bit-stream in 2 cycles per bit, if a few caveats are allowed:

• The desired bitstream must be short enough to be preloaded into CPU registers (233 bits, in my code), avoiding any memory loads. Any memory load (I think) requires two cycles, which would be too much per-byte delay.
• The bitstream can be arranged so that each cycle starts on a repeated symbol. ijmp (and every other jump, I think) requires two cycles during which the CPU cannot prepare and clock out a bit. I expect this to be true of any interesting cyclic signal.
• There's no time to mask bits when writing to the port. None of the other pins on the output port can be used as outputs, and if used as inputs they cannot care about their internal pullup state.

On GitHub: https://github.com/comradex/avr-delta-mod-periodic. Key files also attached in case GitHub is not accessible.

[KerimF]

Key files also attached in case GitHub is not accessible.

Thank you for posting your interesting work here.

[Doctorandus_P]

Recently I came across a trick that apparently helps with smoothing PWM output a lot while adding minimal hardware.

The Idea is that you make an inverted copy  of the PWM signal, and then use a second RC combination, but with the resistor and capacitor in series, and then add that to the output of the original RC filter.

The Idea is that the AC part of the two "shark fin" signals cancel each other out, while maintaining the DC output, because the inverted channels is AC coupled. When you do this, you have to modify the RC time constant to fit your new circuit.

There is more about this in the X chapters of the art of electronics, chapter 4x.25. "Ripple reduction in PWM". page 383.

I'm having a lot of *&^%$#@! with Eclipse in getting an STM32 to get something useful, and as a fallback I want to run an ngSpice simulation but I have not figured out yet how to get an (ideal) inverter in ngSpice.

[KerimF]

\Recently I came across a trick that apparently helps with smoothing PWM output a lot while adding minimal hardware.

I have the impression that such a technique (that uses fixed resistors and capacitors) is practical for a single frequency and for a certain well-regulated Vcc.

By the way, the ATmega8 MCU, I have, can output simultaneously two PWMs with opposite polarity (at pins 15 & 16, OC1A and OC1B, controlled by the MCU 16-bit Timer 1).

And when I need to simulate two serial bit streams with opposite polarity, I simply use two 2-input XOR gates driven each by a single bit stream of interest. The second pin of the first XOR gate is grounded (setting it to non-inverting mode). The second pin of the second XOR gate is connected to Vcc (setting it to inverting mode).

[NorthGuy]

Perhaps, someday, I will have the chance to order such MCUs; assuming I will be allowed to download the assembler of this advanced family.
I have C51 assembler for the ATMEL old MCUs.

Do you have PIC16 or PIC18 MCUs? They're even older than AVR and should be available anywhere in the world. They have better command sets, so you should be able to do it with 2-instruction cycles. Or you can hard-code bits into the code which will give you 1-instruction cycles. 139 hard-coded sequences 100-command each will take 14k commands, which will easily fit in a relatively big PIC18.

[KerimF]

Do you have PIC16 or PIC18 MCUs? They're even older than AVR and should be available anywhere in the world. They have better command sets, so you should be able to do it with 2-instruction cycles. Or you can hard-code bits into the code which will give you 1-instruction cycles. 139 hard-coded sequences 100-command each will take 14k commands, which will easily fit in a relatively big PIC18.

Just to be sure that I understood you well, do you mean by using PIC instructions, it is possible to output serial bits (read from a table in loop) at a rate of 2-cycle or even 1-cycle per bit? Thank you.

I ask this just by curiosity. You kindly suggest me to use PIC MCUs. But since many decades ago, I don't have the privilege to download the PIC assembler (MPLAB?).

[westfw]

using PIC instructions, it is possible to output serial bits ... at a rate of 2-cycle or even 1-cycle per bit?

Don't forget that on the 8bit PICs, "1 cycle" is 4 clocks.  Many of them run at 64MHz max speed, so that turns out similar to a 16MHz AVR, but still...

[westfw]

Quote

Recently I came across a trick that apparently helps with smoothing PWM output a lot while adding minimal hardware.

As some of EDN's "Design Ideas"?
https://www.edn.com/cancel-pwm-dac-ripple-with-analog-subtraction-revisited/
https://www.edn.com/cancel-pwm-dac-ripple-with-analog-subtraction-but-no-inverter/
https://www.edn.com/double-up-on-and-ease-the-filtering-requirements-for-pwms/

[KerimF]

As some of EDN's "Design Ideas"?
https://www.edn.com/cancel-pwm-dac-ripple-with-analog-subtraction-revisited/
https://www.edn.com/cancel-pwm-dac-ripple-with-analog-subtraction-but-no-inverter/
https://www.edn.com/double-up-on-and-ease-the-filtering-requirements-for-pwms/

I am afraid that, as I mentioned earlier, these techniques seem not to work when the application (like of a sinewave generator) needs to generate frequencies in a relatively wide bandwidth; for example, from 20 KHz down to 650 Hz. But perhaps I am wrong.

For instance, I try using DSS (Delta Sinewave Synthesis) instead of DDS (Digital Direct Synthesis) to simplify the hardware by using the old AVR MCUs, I have (like ATmega8 or ATmega32), which can output 4-cycle per bit (delta clock= 2,000,000 Hz, 8 MHz crystal). In this case, one conventional active low pass filter only (3-degree type, for example) would be needed at the MCU output pin for all frequencies from 20 KHz to 650 Hz (no need for precise values for the circuit resistors and capacitors).

[NorthGuy]

Just to be sure that I understood you well, do you mean by using PIC instructions, it is possible to output serial bits (read from a table in loop) at a rate of 2-cycle or even 1-cycle per bit? Thank you.

Yes, one instruction (called BTFSC) tests the bit in RAM and depending on the result executes or skips the next instruction. The second instruction (called BTG) flips the output pin. You encode your data in RAM so that there's 1 where you need to flip the bit, or 0 where you need to keep the bit the same. You need to make room for looping, so you need to reserve some fixed place in your sine curve where the output doesn't change for few instruction times (that is at the peak of the sine wave) and use it to insert looping instructions which would jump back to the appropriate place depending on the duration of the sequence being generated. You would need to align each sine wave in RAM so that the position of the "jumping place" in all your waves is always the same.

1-instruction cycle is possible with any CPU, as long as you have an instruction allowing you to set the output to high and another instruction allowing you to set the output to low. You also need fixed instruction time of course. Then, when you need to create a sequence which lasts, say, 108 instruction cycles, you just write a sequence of 108 instructions which produce the sequence.

Then you look at what you've done and observe that some of the instructions will not change the output. Such instructions may be replaced with nops, or with other instructions to organize looping or to do other useful things.

If you need 139 different sequences, you only need enough ROM to place them all in, which is not that much. If you need thousands of different frequencies or the range of frequencies is wide, this would be no-go. However, you can generate additional frequencies by altering the CPU clock.

I ask this just by curiosity. You kindly suggest me to use PIC MCUs. But since many decades ago, I don't have the privilege to download the PIC assembler (MPLAB?).

You can download them from the Microchip web site. VPN should allow you downloading no matter where you are. They have archives of old software going many years back. You need older ones where they have MPASM assembler.

[voltsandjolts]

OK; being in Syria you probably can't get modern chips

I'm sure ali-express would still ship to Syria, along with other Chinese entities.
Surely that would negate the need for this thread?

[Doctorandus_P]

I am afraid that, as I mentioned earlier, these techniques seem not to work when the application (like of a sinewave generator) needs to generate frequencies in a relatively wide bandwidth; for example, from 20 KHz down to 650 Hz. But perhaps I am wrong.

A lot of the PWM filtering techniques are designed around the goal of creating an DC voltage with a very small to no ripple, and they do not help much if you want to make varying signals such as approximating a sine wave. Although that "cancel-pwm-dac-ripple-with-analog-subtraction-revisited" promises to be quite good with varying signal output too.

One method that always works of course is to use faster PWM, but you would need other hardware for that. microcontrollers that run at a few hundred MHz are no exception, and some have extra high resolution timers that can push the PWM frequency another few orders of magnitude higher.

If you want to stick with your AVR hardware, then upping it's frequency to the maximum helps. If you go from 8MHz to 16MHz, you double the PWM frequency, can also double the cutoff frequency of your RC filter, and that halves the ripple.

If you want to use some pulse shaping, pulse density, or dither technique, then abusing on of the peripherals is the most logical choice, and and SPI port is the most logical for an AVR. That way, you can let the peripheral shift out bits while the microcontroller is either fetching the next byte from a buffer or calculating the next set of 8 bits.

But if you want performance, the AVR's were quite nice microcontrollers 20 years ago, but there is so much much better (faster) stuff around, that trying to squeeze the last few percent of performance out of an AVR is not very practical. You can do it just for fun, or as a brain teaser how far you can push it, but if it's for the performance to cost ratio, or look at the hours it takes to get that extra bit of performance, then it's a waste of time.

[KerimF]

Yes, one instruction (called BTFSC) tests the bit in RAM and depending on the result executes or skips the next instruction. The second instruction (called BTG) flips the output pin...

Thank you for your detailed description.

You can download them from the Microchip web site. VPN should allow you downloading no matter where you are. They have archives of old software going many years back. You need older ones where they have MPASM assembler.

Microchip apologizes for not having the right to do so (to open any of their doors for me).
On the other hand, I used to enter from front doors always. And, since MPASM (or the like) is a propriety of Microchip and Microchip shouldn't provide any service to me, entering now any of their back doors is out of question to me. This may sound somehow silly, but this is how I am.

Salut,
Kerim

[voltsandjolts]

OK; being in Syria you probably can't get modern chips

I'm sure ali-express would still ship to Syria, along with other Chinese entities.
Surely that would negate the need for this thread?

I wish what you say could be true in reality now. But this was true in the golden years, before year 2011 (before the world's decided to also save the people among whom I was born and live). Now, small private businesses, as mine, are no more allowed to transfer any amount of money to order the goods they need for work, as electronic components (but, naturally, the bosses in the high class still have this privilege).

After all, you are right. In fact, if I was born where you are I would also see this topic as being somehow non-sense.

OK, so Chinese entities will still ship to Syria, but ability to pay them is the problem.
Genuine question:
What prevents you from paying, while the higher classes can do so? Is it your own government's rules (perhaps based on ethnicity?) or something else?
I understand if you prefer not to answer.
Thanks.

[voltsandjolts]

Well, you lost me there. Good luck with the arb gen.

[rstofer]

I would pull the SRAM address generation outside the uC with a synchronous reset parallel loadable binary counter to generate the address.  There would be an additional column to carry the counter reset signal which is true when the address is at the end of the pattern.  The clock would cause the counter to increment and when the reset signal went true, the next address would be reset to zero.

I would need some logic to allow the uC to reach the SRAM to set up the table but once initialized, no uC intervention required other than to generate the clock for the counter.  Even that could be pulled outside with one of the clock divider chips. (internal PLL, dividers, etc).

Zero overhead, one clock per bit.

[KerimF]

I would pull the SRAM address generation outside the uC with a synchronous reset parallel loadable binary counter to generate the address.  There would be an additional column to carry the counter reset signal which is true when the address is at the end of the pattern.  The clock would cause the counter to increment and when the reset signal went true, the next address would be reset to zero.

I would need some logic to allow the uC to reach the SRAM to set up the table but once initialized, no uC intervention required other than to generate the clock for the counter.  Even that could be pulled outside with one of the clock divider chips. (internal PLL, dividers, etc).

Zero overhead, one clock per bit.

Good solution, thank you.

It follows somehow the general rule:
Using more hardware helps getting better performance in some respects.
(much like, having more memory space helps writing faster code).

[PCB.Wiz]

Recently I came across a trick that apparently helps with smoothing PWM output a lot while adding minimal hardware.

The Idea is that you make an inverted copy  of the PWM signal, and then use a second RC combination, but with the resistor and capacitor in series, and then add that to the output of the original RC filter.

The Idea is that the AC part of the two "shark fin" signals cancel each other out, while maintaining the DC output, because the inverted channels is AC coupled. When you do this, you have to modify the RC time constant to fit your new circuit.

EDN has done two versions of this. The step response is faster than a second order filter, and the stop band is similar, but the stop band does rely on the null effect (ie component matching)
* Addit: I see this link is already given in #28 )

https://www.ednasia.com/cancel-pwm-dac-ripple-with-analog-subtraction-revisited/

[PCB.Wiz]

I am afraid that, as I mentioned earlier, these techniques seem not to work when the application (like of a sinewave generator) needs to generate frequencies in a relatively wide bandwidth; for example, from 20 KHz down to 650 Hz. But perhaps I am wrong.

They filter the PWM content frequency, the filtered output frequency has different constraints.

At 20kHz your limit is the finite number of samples per full cycle.
At 650Hz you get 30x as many X axis samples, but the step filtering in the Y axis may be limited by encoding or RAM sizes.