that is the problem with the chips from Atmel , Actel , Lattice and to some extent Xilinx
the tools are half-arsed or non existent , crazy contraptions that are not maintained , or plainly unusable unless you spring for the paying version.
download cables are hard to find.
i've been playing with FPGA and CPLD since the late 80's. i've seen and used almost any tool out there
viewdra, cupl, palasm,PLDworks (intel) , PEEL, ABel, Ise , MAxplus , quartus , you name it , i've used it.
i've thrown all of em away except quartus , and even with that one i limit myself to 10.something because of the on board simulator. i refuse to use modelsim.